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2018-01-12spi: fsl_qspi: support i.MX6UL/6ULLL/7DPeng Fan
The QSPI module on i.MX7D is modified from i.MX6SX. The module used on i.MX6UL/6ULL is reused from i.MX7D. They share same tx buffer size. The endianness is not set at qspi driver initialization. So if we don't boot from QSPI, we will get wrong endianness when accessing from AHB address directly. Add the compatible entry for 6ul/7d. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-12mx6: ddr: Do not access MMDC_P1_BASE_ADDR on i.MX6ULLFabio Estevam
i.MX6ULL also does not have a MMDC_P1_BASE_ADDR, so do not try to access it. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <ssbabic@denx.de>
2018-01-12pci: imx: request gpio before usePeng Fan
Before use GPIO, we need to request gpio first. Free gpio after use. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <ssbabic@denx.de>
2018-01-12imx: mx6sxsabresd: enlarge ENV offsetPeng Fan
The u-boot-dtb.imx size is about 519KB, so 8 * 64KB conflicts with u-boot-dtb.imx. Enlarge the offset to 14 * 64KB to fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12imx: mx6sxsabresd: config wdog pinmuxPeng Fan
Because kernel set WDOG_B mux before pad with the common pinctrl framwork now and wdog reset will be triggered once set WDOG_B mux with default pad setting, we set pad setting here to workaround this. Since imx_iomux_v3_setup_pad also set mux before pad setting, we set as GPIO mux firstly here to workaround it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12imx: mx6sxsabresd: Enable DM driverPeng Fan
Enable I2C/MMC/GPIO/REGUALTOR/PMIC/USB DM drivers. There are some dependency, such as when DM MMC enabled, USB compile error. Also the i.MX I2C MMC DM driver does not support legacy GPIO interface. So enable them all together. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12board: freescale: common: add pfuze dm codePeng Fan
Add pfuze dm code, this code could be enabled with CONFIG_DM_PMIC_PFUZE100. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12ARM: imx: Enable dts for i.MX6SX-SDBPeng Fan
Enable DTS and OF_CONTROL for i.MX6SX-SDB. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12ARM: imx: Introduce dts for i.MX6SX-SDBPeng Fan
Introduce dts from Kernel commit commit 71ee203389f7cb1c("Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi") Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12misc: mxc_ocotp: check fuse word before programming on i.MX7ULPPeng Fan
On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to write once, because they use ECC mode. Multiple writes may damage the ECC value and cause a wrong fuse value decoded when reading. This patch adds a checking before the fuse word programming, only can write when the word value is 0. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-12mx6: Support SKS-Kinkel sksimx6 BoardStefano Babic
Board has 1GB RAM and boots from SD Card U-Boot SPL 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54) BT_FUSE_SEL already fused, will do nothing Trying to boot from MMC1 U-Boot 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54 +0100) CPU: Freescale i.MX6DL rev1.2 996 MHz (running at 792 MHz) CPU: Commercial temperature grade (0C to 95C) at 40C Reset cause: POR I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC [PRIME] Signed-off-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12travis.yml: Support RISC-VRick Chen
Enable travis-ci support with a link having built. Signed-off-by: Chih-Mao Chen <cmchen@andestech.com> Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12riscv: doc: Add relative doc to describe RISC-VRick Chen
Add documents to describe NX25 and AE250. Also update other documents for RISC-V. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12riscv: Modify generic codes to support RISC-VRick Chen
Support common commands bdinfo and image format, also modify common generic flow for RISC-V. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-12riscv: Support standaloneRick Chen
Run hello_world successfully. U-Boot 2018.01-rc2-00033-gb265b91-dirty (Dec 22 2017 - 13:54:21 +0800) DRAM: 1 GiB MMC: mmc@f0e00000: 0 SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB In: serial@f0300000 Out: serial@f0300000 Err: serial@f0300000 Net: Warning: mac@e0100000 (eth0) using random MAC address - 0a:47:9b:f8:b4:f2 eth0: mac@e0100000 RISC-V # mmc rescan RISC-V # fatls mmc 0:1 318907 u-boot-ae250-64.bin 1252 hello_world_ae250_32.bin 328787 u-boot-ae250-32.bin 3 file(s), 0 dir(s) RISC-V # fatload mmc 0:1 0x600000 hello_world_ae250_32.bin reading hello_world_ae250_32.bin 1252 bytes read in 23 ms (52.7 KiB/s) RISC-V # go 0x600000 Example expects ABI version 9 Actual U-Boot ABI version 9 Hello World argc = 1 argv[0] = "0x600000" argv[1] = "$B@" Hit any key to exit ... RISC-V # Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12riscv: tools: Prelink u-bootRick Chen
Add prelink-riscv to arrange .rela.dyn and .rela.got in compile time. So that u-boot can be directly executed without fixup. Signed-off-by: Chih-Mao Chen <cmchen@andestech.com> Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12riscv: defconfig: Add nx25-ae250 defconfig to support RISC-VRick Chen
Add nx25-ae250 default configuration for RISC-V Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12riscv: configs: Add nx25-ae250.h to support RISC-VRick Chen
Add nx25-ae250 board configuartion options for RISC-V Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12riscv: board: Add nx25-ae250 to support RISC-VRick Chen
Add nx25-ae250 board to do platform initializations. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12riscv: Add Kconfig to support RISC-VRick Chen
Add Kconfig and makefile for RISC-V Also modify MAINTAINERS for it. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
2018-01-12riscv: nx25: include: Add header files to support RISC-VRick Chen
Add header files for RISC-V. Cache, ptregs, data type and other definitions are included. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12riscv: nx25: dts: Add AE250 dts to support RISC-VRick Chen
AE250 is the Soc using NX25 cpu core base on RISC-V arch. Details please see the doc/README.ae250. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12riscv: nx25: lib: Add relative lib funcs to support RISC-VRick Chen
Add makefile, interrupts.c and boot.c,... functions to support RISC-V arch. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
2018-01-12riscv: cpu: Add nx25 to support RISC-VRick Chen
Add Andes nx25 cpu core (called AndesStar V5) to support RISC-V arch Verifications: 1. startup and relocation ok. 2. boot from rom or ram both ok. 2. timer driver ok. 3. uart driver ok 4. mmc driver ok 5. spi driver ok. 6. 32/64 bit both ok. Detail verification message please see doc/README.ae250. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
2018-01-12mmc: remove hc_wp_grp_size from struct mmc if not neededJean-Jacques Hiblot
hc_wp_grp_size is needed only if hardware partitionning is used. On ARM removing it saves about 30 bytes of code space. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: don't read the size of eMMC enhanced user data area in SPLJean-Jacques Hiblot
This information is only used by the "mmc info" command. On ARM removing this information from SPL saves about 140 of code space. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: compile out erase and write mmc commands if write operations are not ↵Jean-Jacques Hiblot
enabled Also remove erase_grp_size and write_bl_len from struct mmc as they are not used anymore. On ARM, removing them saves about 100 bytes of code space in SPL. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: read ssr only if MMC write support is enabledJean-Jacques Hiblot
The content of ssr is useful only for erase operations. on ARM, removing sd_read_ssr() saves around 300 bytes. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: add a Kconfig option to enable the support for MMC write operationsJean-Jacques Hiblot
This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code needed only if write support is required. The option is added for u-boot and for SPL Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: reworked version lookup in mmc_startup_v4Jean-Jacques Hiblot
Using a table versus a switch() structure saves a bit of space Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: compile out more code if support for UHS and HS200 is not enabledJean-Jacques Hiblot
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: atmel: when sending a data command, use the provided block sizeJean-Jacques Hiblot
struct mmc_data contains the block size to use for the data transfer. Use this information instead of using the default value or the block length information stored in struct mmc. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12common: do not compile common fastboot code when building the SPLJean-Jacques Hiblot
This is not required as fastboot can't be started from SPL. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12am335x_hs_evm: Trim options in SPL to reduce binary sizeTom Rini
The am335x_hs_evm runs into size constraint problems at times with various toolchains as changes come in due to the config have a large number of options in SPL (to showcase what is possible) while also having rather constrained binary limits. Gain some of this room back by lowering the loglevel, disabling HW partition support and switching over to the tiny FIT image support. Cc: Andrew F. Davis <afd@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> --- I'd really appreciate a run-time test of this patch if at all possible as I'm a little worried about TINY_FIT being incompatible with all of the security options. Thanks!
2018-01-12dm: mmc: sandbox: Update SD card emulationJean-Jacques Hiblot
The SDcard initialization procedure does a few more things than it did earlier: * switch the bus width even for 1-bit bus width * check that speed has been properly set (in resp[4] of SD_CMD_SWITCH_FUNC) Update the SD simulator to handle those requests gracefully. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-12configs: omapl138_lcdk: decrease the loglevel to reduce the size of the SPLJean-Jacques Hiblot
The changes in the MMC stack have increased its footprint up to the point were its breaks the generation of the SPL for this platform. Fix this by reducing the loglevel. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Peter Howard <phoward@gme.net.au>
2018-01-12configs: openrd: removed support for eMMC hardware partitioningJean-Jacques Hiblot
builds are broken because the size of the binary exceeds the limit. Make some space by removing support for hardware partitioning as those boards don't have any eMMC. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: make optional the support for eMMC hardware partitioningJean-Jacques Hiblot
Not all boards have an eMMC and not all users have a need for this. Allow to compile it out. By default it is still included. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: make UHS and HS200 optionalJean-Jacques Hiblot
Supporting USH and HS200 increases the code size as it brings in IO voltage control, tuning and fatter data structures. Use Kconfig configuration to select which of those features should be built in. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: convert most of printf() to pr_err() and pr_warn()Jean-Jacques Hiblot
This allows to compile out the log message by tweaking the LOGLEVEL. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-12mmc: don't use malloc_cache_aligned()Jean-Jacques Hiblot
Not using this function reduces the size of the binary. It's replaces by a standard malloc() and the alignment requirement is handled by an intermediate buffer on the stack. Also make sure that the allocated buffer is freed in case of error. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: fix for old MMCs (below version 4)Jean-Jacques Hiblot
The ext_csd is allocated only for MMC above version 4. The compare will crash or fail for older MMCs. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: all hosts support 1-bit bus width and legacy timingsJean-Jacques Hiblot
Make sure that those basic capabilities are advertised by the host. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12mmc: Fixed a problem with old sd or mmc that do not support High speedJean-Jacques Hiblot
As the legacy modes were not added to the list of supported modes, old cards that do not support other modes could not be used. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12dm: mmc: update mmc_of_parse()Jean-Jacques Hiblot
* convert to livetree API * don't fail because of an invalid bus-width, instead default to 1-bit. * recognize 1.2v DDR and 1.2v HS200 flags Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: dump card and host capabilities if debug is enabledJean-Jacques Hiblot
This is a useful information while debugging the initialization process or performance issues. Also dump this information with the other mmc info if the verbose option is selected Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: meson_gx_mmc: fix the complie errorJaehoon Chung
mmc_set_clock() is changed. This patch is for fixing complie error. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-12dm: mmc: Add a library function to parse generic dt bindingKishon Vijay Abraham I
Add a new function to parse host controller dt node and set mmc_config. This function can be used by mmc controller drivers to set the generic mmc_config. This function can be extended to set other UHS mode caps once UHS mode support is added. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: add a library function to send tuning commandJean-Jacques Hiblot
HS200/SDR104 requires tuning command to be sent to the card. Add a simple function to send tuning command and to read and compare the received data with the tuning block pattern. This function can be used by platform driver to perform DLL tuning. This patch is similar to commit 996903de92f0 ("mmc: core: add core-level function for sending tuning commands") added in linux kernel. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12mmc: use the right voltage level for MMC DDR and HS200 modesJean-Jacques Hiblot
HS200 only supports 1.2v and 1.8v signal voltages. DDR52 supports 3.3v/1.8v or 1.2v signal voltages. Select the lowest voltage available when using those modes. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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