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2018-12-03Merge tag 'signed-rpi-next' of git://github.com/agraf/u-bootTom Rini
Patch queue for rpi - 2018-12-03 A few Raspberry Pi specific changes this time: - Allow 2nd MMC device - Support RPi 3 Model A+ - Allow UUID to find filesystem
2018-12-03Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini
Patch queue for efi - 2018-12-03 This release is fully packed with lots of glorious improvements in UEFI land again! - Make PE images more standards compliant - Improve sandbox support - Improve correctness - Fix RISC-V execution on virt model - Honor board defined top of ram (fixes a few boards) - Imply DM USB access when distro boot is available - Code cleanups
2018-12-03Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- MMC fixes for R-Car Gen3
2018-12-03Merge branch '2018-12-03-master-imports'Tom Rini
- Baltos platform updates - rtc m41t62 converted to DM. - PowerPC MPC8xx DM conversion - Verified boot updates
2018-12-03rpi: add 3 Model A+Jonathan Gray
Add Raspberry Pi 3 Model A+ to list of models, the revision code is 0xE according to the list on raspberrypi.org. Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-12-03rpi: add URL of official revision code listJonathan Gray
Replace various third party lists of Raspberry Pi revision codes in a comment with the list on raspberrypi.org. Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-12-03video: Allow driver to specify the line lengthSimon Glass
At present line_length is always calculated in video_post_probe(). But some hardware may use a different line length, e.g. with a 1366-wide display. Allow the driver to set this value if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-12-03spi, mpc8xx: migrate to DM_SPIChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03board_r: fix build with DM_SPIChristophe Leroy
CC common/board_r.o common/board_r.c:747:2: error: ‘initr_spi’ undeclared here (not in a function) initr_spi, ^ make[1]: *** [common/board_r.o] Error 1 Fixes: ebe76a2df9f6 ("dm: Remove spi_init() from board_r.c when using driver model") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03drivers: serial: get rid of non DM mpc8xx driverChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03board: MCR3000: migrate to DM_SERIALChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03drivers: serial: migrate mpc8xx to DMChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03board: MCR3000: use new DM watchdogChristophe Leroy
This patch switches MCR3000 board to the new DM watchdog. The change in u-boot.lds is because MCR3000.o grows a bit with this patch and doesn't fit anymore below env_offset on some versions of GCC. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03drivers: watchdog: add a DM driver for the MPC8xx watchdogChristophe Leroy
This patch adds a DM driver for the MPC8xx watchdog. Basically, the watchdog is enabled by default from the start and SYPCR register has to be writen once to set the timeout and/or deactivate the watchdog. Once written, it cannot be written again. It means that wdt_stop() can be called before wdt_start() to stop the watchdog, but cannot be called if wdt_start() has been called. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03board: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROLChristophe Leroy
Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03powerpc, mpc8xx: clear top of stackChristophe Leroy
Reported-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
2018-12-03test: vboot: clean its filePhilippe Reynes
This update the its file used in vboot test to respect the new node style name defined in doc/uImage.FIT (for example: replace kernel@1 by kernel and fdt@1 by fdt-1) Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03test: vboot: add padding pss for rsa signaturePhilippe Reynes
The padding pss is now supported for rsa signature. This add test with padding pss on vboot test. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03configs: sandbox: enable padding pss for rsa signaturePhilippe Reynes
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03doc: uImage.FIT: signature.txt: add option paddingPhilippe Reynes
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03rsa: add support of padding pssPhilippe Reynes
We add the support of the padding pss for rsa signature. This new padding is often recommended instead of pkcs-1.5. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03rsa: add a structure for the paddingPhilippe Reynes
The rsa signature use a padding algorithm. By default, we use the padding pkcs-1.5. In order to add some new padding algorithm, we add a padding framework to manage several padding algorithm. The choice of the padding is done in the file .its. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03rsa: use new openssl API to create signaturePhilippe Reynes
Previous implementation of the rsa signature was using the openssl API EVP_Sign*, but the new openssl API EVP_DigestSign* is more flexible. So we move to this new API. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03rtc: m41t62: Convert the RTC driver to support the driver model (DM)Lukasz Majewski
After this change the m41t62.c can be used with RTC subsystem (i.e. date command) which uses device model (DM). Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2018-12-03rtc: m41t62: Extract common RTC handling code to facilitate DM conversionLukasz Majewski
This change facilitates the conversion of m41t62 RTC driver to device model (DM). Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2018-12-03rtc: m41t62: Break i2c_write() arguments to fix checkpatch warningLukasz Majewski
No functional change for this commit. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2018-12-03Kconfig: Migrate CONFIG_RTC_M41T62 define to KconfigLukasz Majewski
This patch moves the RTC M41T62 config define to Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03eeprom: Add device model based I2C support to eeprom commandLukasz Majewski
After this change the 'eeprom' command can be used with DM aware boards. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-12-03arm: baltos: migrate Ethernet PHYs configuration to KconfigYegor Yefremov
Remove CONFIG_PHY_ATHEROS and CONFIG_PHY_SMSC from defconfig and select them in Kconfig. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03arm: baltos: move CONFIG_SYS_NAND_U_BOOT_OFFS to defconfigYegor Yefremov
Also get rid of CONFIG_SYS_NAND_SPL_KERNEL_OFFS as SPL_OS_BOOT feature won't be used. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03arm: baltos: remove unused headerYegor Yefremov
OnRISC Baltos series uses SoM with tps65910 PMIC, so remove "power/tps65217.h" header inclusion. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03arm: baltos: move the board to CONFIG_BLKYegor Yefremov
Use DM for both MMC and USB subsystems and use dedicated DTS for U-Boot configuration. Disable SPL support for GPIO and remove EVMSK leftover for DDR power control via GPIO. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03net: zynq_gem: Add check for 64-bit dma support by hardwareSiva Durga Prasad Paladugu
This patch throws an error if 64-bit support is expected but DMA hardware is not capable of 64-bit support. It also prints a debug message if DMA is capable of 64-bit but not using it. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2018-12-03net: zynq_gem: Added 64-bit addressing supportVipul Kumar
This patch adds 64-bit addressing support for zynq gem. This means it can perform send and receive operations on 64-bit address buffers. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2018-12-03arm64: zynqmp: Add new header file for zcu104 RevCT Karthik Reddy
Created a new header file for zcu104 RevC board and added below configurations to use MAC address from EEPROM. CONFIG_ZYNQ_GEM_EEPROM_ADDR CONFIG_ZYNQ_EEPROM_BUS Added CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 to xilinx_zynqmp_zcu104_revC_defconfig Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-12-03Merge tag 'u-boot-amlogic-20181203' of git://git.denx.de/u-boot-amlogicTom Rini
ARM: meson: Add regmap support for clock driver and sync DT with 4.19
2018-12-03ARM: meson: Add regmap support for clock driverLoic Devulder
This patch modifies the meson clock driver to use syscon/regmap like the Linux kernel does, as it is needed if we want to share the same DTS files. DTS files are synchronized from Linux 4.19. Signed-off-by: Loic Devulder <ldevulder@suse.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2018-12-03Merge tag 'arc-updates-for-2019.01-rc1' of git://git.denx.de/u-boot-arcTom Rini
We introduce much better automatic identification of ARC cores. 1. Try to match found HW features to known ARC core templates 2. Print CPU frequency for all ARC boards 3. Add more board-specific info
2018-12-03ARM: rmobile: Enable MMC HS400 on Salvator-X, ULCB, EbisuMarek Vasut
Enable the HS400 support code on H3, M3W, M3N Salvator-X(S) and ULCB boards as well as E3 Ebisu board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-03ARM: dts: rmobile: Enable HS400 on Salvator-X, ULCB, EbisuMarek Vasut
Enable the HS400 support in DT on H3, M3W, M3N Salvator-X(S) and ULCB boards as well as E3 Ebisu board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-03ARM: dts: rmobile: Enable SDR modes on E3 EbisuMarek Vasut
Add regulators and pinmuxes for SDHI0 and SDHI1 SD and microSD slots on E3 Ebisu and mark them as capable of up to SDR104 mode of operation. With the SDHI fixes in place, it is now possible to use SDR104. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-03ARM: dts: rmobile: Enable SDR104 on Salvator-X and ULCBMarek Vasut
Enable SDR104 modes on M3W and H3 boards. With the SDHI fixes in place, it is now possible to use SDR104. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-03ARM: dts: rmobile: Add eMMC DS pinmuxMarek Vasut
Add pinmux entry for the eMMC DS line, as it is connected on these boards. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-03mmc: tmio: sdhi: Add HS400 supportMarek Vasut
Add support for the HS400 mode to SDHI driver. This uses the up-tune mechanism from already supported HS200 tuning. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03mmc: tmio: sdhi: Move tap_pos to private dataMarek Vasut
Move the tap_pos variable, which is the HS200/HS400/SDR104 calibration offset, into private data, so it can be passed around. This is done in preparation for the HS400 mode, which needs to adjust this value. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03mmc: tmio: sdhi: Filter out HS400 on certain SoCsMarek Vasut
Filter out HS400 support on SoCs where HS400 is not supported yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03mmc: tmio: Reorder TMIO clock handlingMarek Vasut
Reorder the tmio_sd_set_clk_rate() function such that it handles all of the clock requiests correctly. Specifically, before this patch, clock request with (mmc->clock == 0 && mmc->clk_disable) could leave the clock enabled, as the function would exit on if (!mmc->clock) condition on top and will not handle the mmc->clk_disable at all. Rather than band-aid fixing just that particular problem, reorder the entire function to make it easier to understand and verify that all the cases are covered. The function has three sections now: First, if mmc->clock != 0, we calculate divider for the SD block. Second, if mmc->clock != 0 and SD block clock are enabled and current divider is not equal to the new divider, then stop the clock and update the divider. Third, if mmc->clk_disable is set, disable the clock, otherwise enable the clock. This happens independently of divider update now. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03mmc: tmio: Keep generating clock when clock are enabledMarek Vasut
The TMIO core has a feature where it can automatically disable clock output when the bus is not in use. While this is useful, it also interferes with switching the bus to 1.8V and other background tasks of the SD/MMC cards, which require clock to be enabled. This patch respects the mmc->clk_disable and only disables the clock when the MMC core requests it. Otherwise the clock are continuously generated on the bus. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03mmc: tmio: Do not set divider to 1 in DDR modeMarek Vasut
The TMIO core has a quirk where divider == 1 must not be set in DDR modes. Handle this by setting divider to 2, as suggested in the documentation. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03mmc: tmio: Switch to clock frameworkMarek Vasut
Switch the driver to using clk_get_rate()/clk_set_rate() instead of caching the mclk frequency in it's private data. This is required on the SDHI variant of the controller, where the upstream mclk need to be adjusted when using UHS modes. Platforms which do not support clock framework or do not support it in eg. SPL default to 100 MHz clock. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> --- V2: - Fix build on certain platforms using SPL without clock framework V3: - Turn clk_get_rate into a callback and fill it as needed on both renesas and socionext platforms
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