summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2013-07-31blackfin: gpio: Use proper mask for comparing functionAxel Lin
The function return from P_FUNCT2MUX(per) takes 2 bits, however for BF537_FAMILY with offset != 1 the function is 1 bit. Also has small refactor for better readability. In portmux_setup(), it looks odd having "muxreg &= ~(3 << 1);" while in current code we do muxreg |= (function << offset);. Signed-off-by: Axel Lin <axel.lin@ingics.com>
2013-07-31gpio: adi_gpio2: Unreserve gpio in special_gpio_free()Axel Lin
In special_gpio_free(), call unreserve() rather than reserve() to release gpio. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-07-31blackfin: gpio: Unreserve gpio in special_gpio_free()Axel Lin
In special_gpio_free(), call unreserve() rather than reserve() to release gpio. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-07-30cfi_flash: Add prototypes of overridable functionsMasahiro Yamada
This commit adds some prototypes into include/mtd/cfi_flash.h. These functions are defined with a weak attribute in drivers/mtd/cfi_flash.c. This means they can be overrided by board-specific ones if necessary. When defining such functions under board/ directory or somewhere, cfi_flash.h should be included. This makes sure that board-specfic cfi functions are defined in a correct prototype. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Stefan Roese <sr@denx.de>
2013-07-26powerpc/ppc4xx: Convert new gdsys files to SPDX license tagsTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-26Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxTom Rini
2013-07-26Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flashTom Rini
2013-07-25powerpc/ppc4xx: Remove CONFIG_SYS_FLASH_PROTECTION from gdsys boardsDirk Eibach
CONFIG_SYS_FLASH_PROTECTION was active on most gdsys boards by default, while hardware flash protection was not implemented. Hardware support was added recently and we get into trouble because backward compatibility is broken (u-boot can't unprotect the protected flash after a downgrade). So we decided to disable hardware flash protection for all our boards. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
2013-07-25powerpc/ppc4xx: Consider gdsys FPGA OSD sizeDirk Eibach
OSD size was constant 32x16 characters. Now the size is set as announced by the FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
2013-07-25powerpc/ppc4xx: Support gdsys multichannel iocon hardwareDirk Eibach
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
2013-07-25powerpc/ppc4xx: Add fpgad command for dumping gdsys fpga registersDirk Eibach
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
2013-07-25powerpc/ppc4xx: Add gdsys mclink interfaceDirk Eibach
mclink is a serial interface for communication between gdsys FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
2013-07-25powerpc/ppc4xx: Use generic accessor functions for gdsys FPGADirk Eibach
A set of accessor functions was added to be able to access not only memory mapped FPGA in a generic way. Thanks to Wolfgang Denk for getting this sorted properly. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
2013-07-25cfi_flash: use buffer length in unmap_physmem()Kuo-Jung Su
While the flash_detect_legacy() of drivers/mtd/cfi_flash.c feed unmap_physmem() with MAP_NOCACHE as 2nd parameter, the do_spi_flash_read_write() of common/cmd_sf.c feed unmap_physmem() with the length of the mapped buffer as 2nd parameter. It's apparently a bug, and I personally think the 2nd parameter should be the length of the mapped buffer. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Albert Aribaud <albert.u.boot@aribaud.net> CC: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2013-07-25Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini
2013-07-25qemu-malta: Update for SPDX license identifiersTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-25Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini
Conflict over SPDX changes means that one change was effectively dropped as it was fixing typos in a removed hunk of text. Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by: Tom Rini <trini@ti.com>
2013-07-25drivers/i2c: Update fti2c010.[ch], i2c_core.c to use SPDX identifiersTom Rini
Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
2013-07-25nds32: Enable FPU if the version of CPU supportedken kuo
Some version of Andes core support FPU coprocessor, if this is the case, and toolchain support FPU instruction set, we should enable it at low level initialization time. Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-25nds32: Update <asm/io.h> and <asm/setup.h> with SPDX license identifiersTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-25nds32: Convert Makefiles to use COBJS-y styleken kuo
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-24MIPS: mips32/cache.S: use v1 register for indirect function callsGabor Juhos
Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: mips32/cache.S: store cache line size in t8 registerGabor Juhos
Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: mips32/cache.S: save return address in t9 registerGabor Juhos
Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: xburst/start.S: rework relocation info checkGabor Juhos
Make it similar to the code in mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: xburst/start.S: use t8 register for dynamic relocationGabor Juhos
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: xburst/start.S: save gd in s0 registerGabor Juhos
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: xburst/start.S: save relocation offset in s1 registerGabor Juhos
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: xburst/start.S: save relocation address in s2 registerGabor Juhos
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: mips32/start.S: rework relocation info checkGabor Juhos
Make it similar to the code in mips64/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: mips32/start.S: use t8 register for dynamic relocationGabor Juhos
Synchronize the code with mips64/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: mips32/cache.S: remove superfluous register assignmentGabor Juhos
The t4 register already holds the cache line size, and the value of the register is not changed in mips_init_icache. Get the cache line size value from t4 for mips_init_dcache as well and remove the superfluous assignment of t5 register. Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
2013-07-24MIPS: remove obsolete TODO itemsGabor Juhos
The MIPS code uses centralized u-boot.lds script already, and dynamic relocation is supported as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: mips64/interrupt.c: remove superfluous includeGabor Juhos
Nothing is used from asm/mipsregs.h. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: mips32/time.c: fix checkpatch errors/warningsGabor Juhos
Checking mips32/time.c with checkpatch.pl shows this: arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required total: 1 errors, 1 warnings, 0 checks, 85 lines checked Fix the code to make checkpatch.pl happy. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: qemu-malta: bring up ethernetGabor Juhos
Qemu emulates a PCNET PCI card for the Malta CoreLV board. Enable the pcnet driver and add board specific ethernet initialization function to bring it up. Also enable the CONFIG_CMD_NET and CONFIG_CMD_PING options. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: qemu-malta: add PCI supportGabor Juhos
Qemu emulates the Galileo GT64120 System Controller which provides a CPU bus to PCI bus bridge. The patch adds driver for this bridge and enables PCI support for the emulated Malta board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: qemu-malta: setup GT64120 registers as done by YAMONGabor Juhos
Move the GT64120 register base to 0x1be00000 and setup PCI BAR registers as done by the original YAMON bootloader. This is needed for running Linux kernel. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: qemu-malta: enable flash supportGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: qemu-malta: add reset supportGabor Juhos
The MIPS Malta board has a SOFTRES register. Writing a magic value into that register initiates a board reset. Use this feature to implement reset support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: qemu-malta: add support for emulated MIPS Malta boardGabor Juhos
Add minimal support for the MIPS Malta CoreLV board emulated by Qemu. The only supported peripherial is the UART. This is enough to boot U-Boot to the command prompt both in little and big endian mode. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: start.S: emulate REVISION register for qemu-maltaGabor Juhos
On the origial Malta boards the REVISION register is accessible at the 0x1fc00010 address. The contents of this register gives information about the revision of the Malta and Core Boards. This register is used by the Linux kernel to identify the actual board it is running on. However the register is not emulated properly by Qemu, so put a hardcoded value into the flash to make Linux work. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: import gt64120.h header from LinuxGabor Juhos
The Linux specific register access macros, the extern function declarations and the UL suffixes has been removed. The header file will be used for the qemu-malta board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24net: pcnet: use pci_virt_to_mem to obtain buffer addressesGabor Juhos
The pcnet driver uses the pci_phys_to_mem function to get the memory address of the DMA buffers. This This assumes an 1:1 mapping between the PCI and physical memory which is not true on all platforms. On MIPS platform U-Boot is running within a mapped memory region, and the pci_phys_to_mem macro can't be used to obtain the memory address of the buffers. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24MIPS: mips64: fix typos in copyright text of start.STom Rini
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini
The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24Add eCos-2.0 SPDX-License-Identifier to source filesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-07-24Add LGPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-07-24Add LGPL-2.1+ SPDX-License-Identifier to source filesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>