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2016-02-02arm: vf610-twr: Add device tree file'sBhuvanchandra DV
- Add device tree files for NXP/Freescale VF610 Tower Board. - Enable lpuart support on NXP/Freescale VF610 Tower Board. - Use UART1 as stdout. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-02-02arm: colibri-vf: Enable serial supportBhuvanchandra DV
- Enable lpuart support on Toradex Colibri VF50/VF61 - Use UART0 for stdout. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-02-02arm: vybrid: Update the license stringBhuvanchandra DV
Since SPDX license is already there, drop the full one. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-02-02arm: vybrid: Enable lpuart supportBhuvanchandra DV
Add device tree node's for lpuart on Vybrid platform Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-02-02imx: mx6sxsabresd: Add MCIMX28LCD display supportYe Li
The i.MX6SX SABRESD board supports MCIMX28LCD (800x480x24) at LCDIF1 port, enable this display feature by adding relevant BSP codes and configurations. Signed-off-by: Ye Li <ye.li@nxp.com>
2016-02-02imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculationYe Li
The checking with max frequency supported is not correct, because the temp is calculated by max pre and post dividers. We can decrease any divider to meet the max frequency limitation. Actually, the calculation below the codes is doing this way to find best pre and post dividers. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2016-02-02imx: mx6sx: Fix issue in LCDIF clock enablementYe Li
Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always enter the -EINVAL return. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2016-02-02mx6slevk: Remove CONFIG_ETHPRIME optionFabio Estevam
As mx6slevk has only one Ethernet port, we don't need to declare CONFIG_ETHPRIME, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-02-02imx: MX6DQ{P}/DL:SABRESD Fix bmode eMMC failureYe Li
The BOOTCFG value used by bmode for SABRESD eMMC boot are actually for SD card. Fixed the value to correct one. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-02-02tqma6_wru4: Fix the reset delay for the the LAN8720 PHYFabio Estevam
According to the LAN8720 datasheet tpurstd (time that reset line should stay asserted) is 25ms. So do as suggested by the LAN8720 datasheet. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-02-02mx6slevk: Fix the reset delay for the the LAN8720 PHYFabio Estevam
Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is registered") Ethernet is no longer functional. This commit does not have an issue in itself, but it revelead a problem with the Ethernet initialization. According to the LAN8720 datasheet tpurstd (time that reset line should stay asserted) is 25ms. So do as suggested in order to have Ethernet working again. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-02-02imx: mx6sxsabreauto: Add support for mx6sx SABREAUTO boardYe Li
Initial version for mx6sx SABREAUTO board support with features: PMIC, QSPI, NAND flash, SD/MMC, USB, Ethernet, I2C, IO Expander. Signed-off-by: Ye Li <ye.li@nxp.com>
2016-02-02mx6: soc: Add ENET2 mac address supportYe Li
The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading MAC address from fuse for ENET2. Signed-off-by: Ye Li <ye.li@nxp.com>
2016-02-02tools: mxsboot: Use more portable cpu_to_le32()Bin Meng
Currently when building mxsboot on certain machines it reports: HOSTCC tools/mxsboot tools/mxsboot.c: In function 'mx28_create_sd_image': tools/mxsboot.c:560: warning: implicit declaration of function 'htole32' /tmp/cchLIV6q.o: In function 'main': mxsboot.c:(.text+0x6d8): undefined reference to 'htole32' mxsboot.c:(.text+0x6e7): undefined reference to 'htole32' mxsboot.c:(.text+0x6f6): undefined reference to 'htole32' mxsboot.c:(.text+0x705): undefined reference to 'htole32' mxsboot.c:(.text+0x711): undefined reference to 'htole32' /tmp/cchLIV6q.o:mxsboot.c:(.text+0x71d): more undefined references to 'htole32' follow collect2: ld returned 1 exit status make[1]: *** [tools/mxsboot] Error 1 make: *** [tools] Error 2 The solution is to use cpu_to_le32() instead which is more portable, just like other U-Boot tools [1] do. [1] http://lists.denx.de/pipermail/u-boot/2014-October/192919.html Suggested-by: Marek Vasut <marex@denx.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2016-02-02wandboard: fix variable name so PXE boot worksPeter Robinson
All boards that support PXE booting use the pxefile_addr_r variable. Standardise wandboard with this variable as pxe_addr_r isn't used anywhere else so it's a typo. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-02-02arm: imx6: Enable DDR calibration on NovenaMarek Vasut
Enable the DDR calibration functionality on Novena to deal with the memory SoDIMM on this board. Moreover, tweak the initial DDR DRAM parameters so the calibration works properly. Signed-off-by: Marek Vasut <marex@denx.de>
2016-02-02arm: imx6: Add DDR3 calibration code for MX6 Q/D/DLMarek Vasut
Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code fine-tunes the behavior of the MMDC controller in order to improve the signal integrity and memory stability. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2016-02-02Prepare v2016.03-rc1Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-02-02Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2016-02-02Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
2016-02-02board: atmel: sama5d2_xplained: add SPL supportWenyou Yang
The sama5d2 Xplained SPL supports the boot medias: spi flash and SD Card. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-02arm: at91/spl: mpddrc: use IP version to check configurationWenyou Yang
To remove the unnecessary #ifdef-endif, use the mpddrc IP version to check whether or not the interleaved decoding type is supported. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-02arm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM initializationWenyou Yang
The DDR3-SDRAM initialization sequence is implemented in accordance with the DDR3-SRAM/DDR3L-SDRAM initialization section described in the SAMA5D2 datasheet. Add registers and definitions of mpddrc controller, which is used to support DDR3 devices. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-02arm: at91/spl: mpddrc: add struct atmel_mpddrc_configWenyou Yang
Add struct atmel_mpddrc_config to accommodate the mpddrc register configurations, not using the mpddrc register map structure, struct atmel_mpddrc, in order to increase readability and reduce run-time memory use. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-02atmel_nand: Add 32 bit ecc support for sama5d2 chipJosh Wu
Also if minimum ecc requirment is bigger then what we support, then just use our maxium pmecc support. But it is not safe, so we'll output a warning about this. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-02atmel_nand_ecc: update pmecc registers according to sama5d2 chipJosh Wu
1. add the pmecc register mapping for sama5d2. 2. add the pmecc error location register mapping for sama5d2. 3. add some new field that is different from old ip. 4. add sama5d2 pmecc ip version number. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-01Makefile: Drop unnecessary -dtb suffixesSimon Glass
When OF_CONTROL is enabled, u-boot-dtb.* files are the same as u-boot.* files. So we can use the latter for simplicity. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2016-02-01Makefile: Make u-boot.img the same as u-boot-dtb.imgSimon Glass
Create u-boot.img even when OF_CONTROL is enabled, so that this file can be used in both cases. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2016-02-01socfpga: Simplify Makefile filenamesSimon Glass
We don't need the -dtb suffix anymore, so drop it. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2016-02-01tegra: Always build a boot image with the same filenameSimon Glass
Adjust the Makefile to build u-boot-tegra.bin which contains a device tree if OF_SEPARATE is enabled, and does not if not. This mirrors U-Boot's new approach of using u-boot.bin to handle both cases. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2016-02-01fdt: Build an SPL binary without device treeSimon Glass
At present u-boot-spl.bin holds the plain SPL binary without the device tree. This is somewhat annoying since you need either u-boot-spl.bin or u-boot-spl-dtb.bin depending on whether device tree is used. Adjust the build such that u-boot-spl.bin includes a device tree (if enabled), and the plain binary is in u-boot-spl-nodtb.bin. For now u-boot-spl-dtb.bin remains the same. Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2016-02-01fdt: Build a U-Boot binary without device treeSimon Glass
At present u-boot.bin holds the plain U-Boot binary without the device tree. This is somewhat annoying since you need either u-boot.bin or u-boot-dtb.bin depending on whether device tree is used. Adjust the build such that u-boot.bin includes a device tree (if enabled), and the plain binary is in u-boot-nodtb.bin. For now u-boot-dtb.bin remains the same. This should be acceptable since: - without OF_CONTROL, u-boot.bin still does not include a device tree - with OF_CONTROL, u-boot-dtb.bin does not change The main impact is build systems which are set up to use u-boot.bin as the output file and then add a device tree. These will have to change to use u-boot-nodtb.bin instead. Adjust tegra rules so it continues to produce the correct files. Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2016-02-01tegra: Clarify generation of -nodtb file with OF_CONTROLSimon Glass
Fix the ALL-y logic in the Makefile so that is clear that we always want the -nodtb file. Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2016-02-01mailmap: fix Ricardo's entryMasahiro Yamada
Commit df48b23428e9 (".mailmap: Add all the mail alias for Ricardo Ribalda") assigned two different proper names for the email address "ricardo.ribalda@uam.es". This is a completely wrong usage as the mailmap feature exists for coalescing together commits by the same person whose name is sometimes spelled differently. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-01mmc: add missing prototype for mmc_get_env_devClemens Gruber
This is a follow-up patch to e92029c0f4 and adds a prototype for the weak mmc_get_env_dev function. Cc: Tom Rini <trini@konsulko.com> Cc: Stephen Warren <swarren@nvidia.com> Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2016-02-01malloc: work around some memalign fragmentation issuesStephen Warren
Use of memalign can trigger fragmentation issues such as: // Internally, this needs to find a free block quite bit larger than s. // Once the free region is found, any unaligned "padding" immediately // before and after the block is marked free, so that the allocation // takes only s bytes (plus malloc header overhead). p = memalign(a, s); // If there's little fragmentation so far, this allocation is likely // located immediately after p. p2 = malloc(x); free(p); // In theory, this should return the same value for p. However, the hole // left by the free() call is only s in size (plus malloc header overhead) // whereas memalign searches for a larger block in order to guarantee it // can adjust the returned pointer to the alignment requirements. Hence, // the pointer returned, if any, won't be p. If there's little or no space // left after p2, this allocation will fail. p = memalign(a, s); In practice, this issue occurs when running the "dfu" command repeatedly on NVIDIA Tegra boards, since DFU allocates a large 32M data buffer, and then initializes the USB controller. If this is the first time USB has been used in the U-Boot session, this causes a probe of the USB driver, which causes various allocations, including a strdup() of a GPIO name when requesting the VBUS GPIO. When DFU is torn down, the USB driver is left probed, and hence its memory is left allocated. If "dfu" is executed again, allocation of the 32M data buffer fails as described above. In practice, there is a memory hole exactly large enough to hold the 32M data buffer than DFU needs. However, memalign() can't know that in a general way. Given that, it's particularly annoying that the allocation fails! The issue is that memalign() tries to allocate something larger to guarantee the ability to align the returned pointer. This patch modifies memalign() so that if the "general case" over-sized allocation fails, another allocation is attempted, of the exact size the user desired. If that allocation just happens to be aligned in the way the user wants, (and in the case described above, it will be, since the free memory region is located where a previous identical allocation was located), the pointer can be returned. This patch is somewhat related to 806bd245b1ab "dfu: don't keep freeing/reallocating". That patch worked around the issue by removing repeated free/memalign within a single execution of "dfu". However, the same technique can't be applied across multiple invocations, since there's no reason to keep the DFU buffer allocated while DFU isn't running. This patch addresses the root-cause a bit more directly. This problem highlights some of the disadvantages of dynamic allocation and deferred probing of devices. This patch isn't checkpatch-clean, since it conforms to the existing coding style in dlmalloc.c, which is different to the rest of U-Boot. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2016-02-01.travis.yml: rework according to new travis-ci infraRoger Meier
- install using addons.apt - remove MAKEALL - split mpc85xx boards - remove TEST_CONFIG_CMD, just info - fetch mips toolchain via buildman - remove --list-error-boards param - conditional script - use TOOLCHAIN instead of INSTALL_TOOLCHAIN - add aarch64 - enable notifications via email Signed-off-by: Roger Meier <r.meier@siemens.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Andreas Färber <afaerber@suse.de> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Heiko Schocher <hs@denx.de>
2016-02-01arm8: ls2080: Move the core errata defines out of board specific fileAshish kumar
Valid for core A57 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-01Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini
2016-02-01armv8: ls2080a: Implement workaround for core errata 829520, 833471Ashish kumar
829520: Code bounded by indirect conditional branch might corrupt instruction stream. Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect Predictor. 833471: VMSR FPSCR functional failure or deadlock. Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-01board: Enable ethernet, tftpboot support to pic32mzdask board.Purna Chandra Mandal
This adds ethernet, TFTP support for PIC32MZ[DA] Starter Kit. Also custom environment variables/scripts are added to help boot from network. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-02-01drivers: net: Add ethernet driver for Microchip PIC32.Purna Chandra Mandal
This driver implements MAC and MII layer of the ethernet controller. Network data transfer is handled by controller internal DMA engine. Ethernet controller is configurable through device-tree file. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-02-01drivers: net: phy: add SMSC LAN8740 Phy support.Purna Chandra Mandal
Add SMSC LAN8740 Phy support required for PIC32MZDA devices. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-02-01board: add SDHCI support for PIC32MZDASK board.Purna Chandra Mandal
Enable MMC, SDHCI, FAT_FS support for PIC32MZ[DA] StarterKit. Also add custom scripts, rules to boot Linux from microSD card. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-02-01drivers: mmc: add driver for Microchip PIC32 SDHCI controller.Andrei Pistirica
This driver implements platform specific glue and fixups for PIC32 internal SDHCI controller. Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com> Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01board: Add Microchip PIC32MZ[DA]-Starter-Kit board.Purna Chandra Mandal
This adds support for Microchip PIC32MZ[DA] StarterKit board based on a PIC32MZ[DA] family of microcontroller. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01MIPS: Add support for Microchip PIC32MZ[DA] SoC family.Purna Chandra Mandal
Add Microchip PIC32MZ[DA] SoC family support. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.Purna Chandra Mandal
This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module. DDR2 controller operates in half-rate mode (upto 533MHZ frequency). Signed-off-by: Paul Thacker <paul.thacker@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-01drivers: serial: add driver for Microchip PIC32 UART controller.Paul Thacker
This adds PIC32 UART controller support based on driver model. Signed-off-by: Paul Thacker <paul.thacker@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-01drivers: gpio: add driver for Microchip PIC32 GPIO controller.Purna Chandra Mandal
In PIC32 GPIO controller is part of PIC32 pin controller. PIC32 has ten independently programmable ports and each with multiple pins. Each of these pins can be configured and used as GPIO, provided they are not in use for other peripherals. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
generated by cgit (git 2.34.1) at 2024-12-29 14:40:54 +0000