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2018-01-15sunxi: arm64: correct usage of DT node address in FIT generationAndre Przywara
The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Adjust the FIT build script for 64-bit Allwinner boards to remove the bogus addresses from the node names and avoid the warnings. This avoids a warning with recent versions of the dtc tool. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15fix incorrect usage of DT node unit address in commentsAndre Przywara
The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Fix all occurences in the tree where node names were mentioned in comments, to not give bad examples to the reader. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15doc: fix incorrect usage of DT node unit addressAndre Przywara
The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Fix all occurences in various documentation files where this was not observed, to not give bad examples to the reader. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15doc: FIT image: fix incorrect examples of DT node unit addressAndre Przywara
The DT spec demands a unit-address of a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Fix all occurences in the FIT image example files where this was not observed, to not give bad examples to the reader. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15doc: FIT image: fix incorrect description of DT node unit addressAndre Przywara
The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Fix all occurences in the FIT image documentation files where this was not observed, to not give bad examples to the reader. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15binman: Run code coverage testsSimon Glass
Binman has 100% test coverage for the code as it is at present. To encourage it to stay that way, run the code-coverage test as part of the normal U-Boot tests. This is RFC because it requires the Python code coverage tools to be available. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15travis.yml: Run tests for toolsSimon Glass
Run tests for the Python tools used by U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15test: Run dtoc testsSimon Glass
Update the test script to run the dtoc tests also. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15test: Run buildman testsSimon Glass
Update the test script to run the buildman tests also. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15test: Run patman testsSimon Glass
Update the test script to run the patman tests also. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15test: Run binman testsSimon Glass
Update the test script to run the binman tests also. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15Merge git://git.denx.de/u-boot-netTom Rini
2018-01-15Merge git://git.denx.de/u-boot-imxTom Rini
2018-01-15db410c: on aarch64 the fdtfile is in per-vendor subdirectoryRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-01-15db410c: add reserved-memory node to dtsRob Clark
If lk lights up display and populates simple-framebuffer node, it will also setup a reserved-memory node (needed by simplefb on linux). But it isn't clever enough to cope when the reserved-memory node is not present. Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-01-15db410c: use the device tree parsed by the lk loader.Jorge Ramirez-Ortiz
We dont need to keep copies of the properties that we are going to fixup since we will be using the dtb provided by the firmware. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATERob Clark
Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-15db410c: replace reset driver with psciJorge Ramirez-Ortiz
this should be the norm for armv8 platforms. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15db410c: update wlan and bt mac addresses from firmwareJorge Ramirez-Ortiz
The firmware that runs before u-boot modifies u-boot's device tree adding the local-mac-address and local-bd-address properties for the compatibles "qcom,wcnss-bt" and "qcom,wcnss-wlan". This commit reads that firmware, retrieves the properties and fixups the device tree that is passed to the kernel before booting. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15db410c: configs: increase gunzip buffer size for the kernelJorge Ramirez-Ortiz
the kernel fails to boot when it goes over the limit. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15db820c: stop autoboot when vol- pressedJorge Ramirez-Ortiz
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15db820c: enable pmic gpios for pm8994Jorge Ramirez-Ortiz
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15db820c: add qualcomm dragonboard 820C supportJorge Ramirez-Ortiz
This commit adds support for 96Boards Dragonboard820C. The board is based on APQ8086 Qualcomm Soc, complying with the 96Boards specification. Features - 4x Kyro CPU (64 bit) up to 2.15GHz - USB2.0 - USB3.0 - ISP - Qualcomm Hexagon DSP - SD 3.0 (UHS-I) - UFS 2.0 - Qualcomm Adreno 530 GPU - GPS - BT 4.2 - Wi-Fi 2.4GHz, 5GHz (802.11ac) - PCIe 2.0 - MIPI-CSI, MIPI-DSI - I2S U-Boot boots chained from LK (LK implements the fastboot protocol) in 64-bit mode. For detailed build instructions see readme.txt in the board directory. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15arm: mach-snapdragon: refactor clock driverJorge Ramirez-Ortiz
In preparation to add support for the Dragonboard820c (APQ8096), refactor the current Snapdragon clock driver. No new functionality has been added. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15env: enable accessing the environment in an EXT4 partitionJorge Ramirez-Ortiz
For example to store the environment in a file named "/uboot.env" in MMC "0", where partition "1" contains the EXT4 filesystem, the following configs should be added to the board's default config: CONFIG_ENV_IS_IN_EXT4=y CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1" CONFIG_ENV_EXT4_FILE="/uboot.env" CONFIG_ENV_EXT4_INTERFACE="mmc" Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> [trini: Fix some line over 80 chars issues] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-15arm: ls1021atwr: Rework local commands to not be included in SPLTom Rini
Move some of the code for the "lane_bank" and "cpld" code local commands so that they are not built for SPL as they can only be used in full U-Boot. This means we can mark a few functions as static as well now. Cc: Alison Wang <alison.wang@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Alison Wang <alison.wang@nxp.com> Tested-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15powerpc: P1010RDB: Rework local command to not be included in SPLTom Rini
Add a CONFIG_SPL_BUILD guard around the code for the "mux" command so it is not included in SPL. Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
2018-01-15board/ls2081ard: Correct code to get QMAP value in checkboardPriyanka Jain
QMAP value contains information about QSPI chip-selects. These bits are used to display information of boot device in checkboard() function. QMAP value is stored in most significant 3-bits of 8-bit register brdcfg[0] in Qixis, this patch corrects code to get QMAP bits using below logic: (brdcfg[0] >> 5) & 0x7 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15board/ls2081ardb: Update board related printsPriyanka Jain
Remove Board Arch print as its value is always constant '1' and does not contain any important information to display during boot. Add print to display Board FPGA version. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15configs: SECURE_BOOT: Enable CONFIG_CMD_EXT4_WRITESumit Garg
As part of chain of trust with confidentiality along with distro boot, linux kernel image needs to be stored in encrypted form on ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of Secure boot on ARM based platforms. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15armv8/ls1088a: configure PMU's PCTBENR to enable WDTZhang Ying-22455
The SP805-WDT module on LS1088A requires configuration of PMU's PCTBENR register to enable watchdog counter decrement and reset signal generation. The watchdog clock needs to be enabled first. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15serial: lpuart: Proper device identificationSriram Dash
Identify and distinguish between platform device type of MX7ULP and LS1021A. This is a fix to commit 7edf5c45("serial: lpuart: add i.MX7ULP support"). Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15board: ls1012a: LS1012A-2G5RDB board supportBhaskar Upadhaya
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15armv8/kconfig: Align boards of same family at one placeBhaskar Upadhaya
Align boards belonging to LS1012A, LS2080A SoC at one place. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15phy: atheros: set auto-negotiation for AR8021Zhao Qiang
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: Add to Kconfig and convertNobuhiro Iwamatsu
This adds SH_ETHER to drivers/net/Kconfig and convert to Kconfig. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: Fix misaligned cache operation warningNobuhiro Iwamatsu
When we using network on board using sh-eth, it prints a lot of "CACHE: Misaligned operation at range" messages. This commit fixes this problem. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: Change read/write() param to struct sh_eth_infoNobuhiro Iwamatsu
This changes Change structure used in sh_eth_read and sh_eth_write function from struct sh_eth_dev to struct sh_eth_info. This is necessary to convert to Driver Model. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: Remove bd_t from sh_eth_config()Nobuhiro Iwamatsu
bd_t is not used in sh_eth_config(). This deletes bd_t from sh_eth_config() Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: Fix coding style checked by checkpatch.plNobuhiro Iwamatsu
This fixes the chord style checked by checkpatch.pl. Details of change details are as follows: - Fix typo Change from alligned to aligned. - Remove whitespace before ',' - Add spaces preferred around that '|' - Fix missing a blank line after declarations - Remove space after a cast declaration - Fix format of block comments - Add a blank line after function/struct/union/enum declarations Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: dhcp: Allow "MAY_FAIL" to still try each adapterJoe Hershberger
This change allows the "MAY_FAIL" DHCP option to still attempt to contact a DHCP server on each adapter and only give up once each adapter has failed once. To get the existing behavior, set the already-existing ethrotate=no variable. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Keng Soon Cheah <keng.soon.cheah@ni.com> Cc: Chen Yee Chew <chen.yee.chew@ni.com>
2018-01-15configs: Update Lamobo_R1 with B53 switch optionsFlorian Fainelli
Enable CONFIG_B53_SWITCH, define the CPU/management port number (8) and enable all 5 ports of the switch to be usable. Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15net: phy: b53: Add b53_reg read/write commandsFlorian Fainelli
Add a b53_reg read/write command which allows inspecting the switch registers. Because the Broadcom BCM53xx registers have different sizes, we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain expected results. Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15net: designware: Pad small packetsFlorian Fainelli
Make sure that we pad small packets to a minimum length of 60 bytes (without FCS). This is necessary to interface with Ethernet switches that will reject RUNT frames unless padded correctly. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15net: phy: Add Broadcom BCM53xx switch driverFlorian Fainelli
Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar to the Marvell MV88E617x. This takes care of configuring the minimum amount out of the switch hardware such that each user visible port (configurable) and the CPU port can forward packets between each other while preserving isolation with other ports. This is useful for e.g: the Lamobo R1 board featuring a Broadcom BCM53125 switch. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15net: designware: add clock supportPatrice Chotard
This implementation manages several clocks, disable and free all of them in case of error during probe and in remove callback. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15dm: core: add missing dev_count_phandle_with_args()Patrice Chotard
Add missing dev_count_phandle_with_args() to avoid compilation issue. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: mvneta - Fixed recv() when multiple packets have arrived.Jason Brown
This patch fixes a problem in the mvneta driver where if more than one packet arrives between calls to mvneta_recv(), the additional descriptors will be marked as free even though only one descriptor has been read and processed from the receive queue. This causes the additional packet(s) to be delayed until the next packet arrives. >From this point on all packets will be delayed because the receive queue will contain unprocessed packets but the hardware shows no busy descriptors. Signed-off-by: Jason Brown <jason.brown@apcon.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: miiphybb: fix casting errorChris Brandt
Since the return value is a signed int, if the leading MSB of rdreg is a 1, it will get signed extended and will return a negative value which is an error even though we read the correct value. Fixes: dfcc496ed7e2 ("net: mii: Changes not made by spatch") Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: remove sh_eth_offset_rz tableChris Brandt
First, this table could never be included in the build anyway because SH_ETH_TYPE_RZ is not defined until later in the file. Second, the register PIR was missing, so PHY MDIO never worked. Third, after adding the PIR register, the table is EXACTLY the same as sh_eth_offset_gigabit, so there is no value to it. Therefore, just delete it use the gigabit one. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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