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2017-08-13x86: qemu: Enable NVMe driverBin Meng
QEMU supports NVMe emulation. Enable the NVMe driver on QEMU x86. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13nvme: Handle zero Maximum Data Transfer Size (MDTS)Bin Meng
Maximum Data Transfer Size (MDTS) field indicates the maximum data transfer size between the host and the controller. The host should not submit a command that exceeds this transfer size. The value is in units of the minimum memory page size and is reported as a power of two (2^n). The spec also says: a value of 0h indicates no restrictions on transfer size. On the real NVMe card this is normally not 0 due to hardware restrictions, but with QEMU emulated NVMe device it reports as 0. In nvme_blk_read/write() below we have the following algorithm for maximum number of logic blocks per transfer: u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift); dev->max_transfer_shift being 0 will for sure cause lbas to overflow. Let's use 20. With this fix, the NVMe driver works on QEMU emulated NVMe device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13nvme: Fix number of blocks detectionJon Nettleton
NVMe should use the nsze value from the queried device. This will reflect the total number of blocks of the device and fix detecting my Samsung 960 EVO 256GB. Original: Capacity: 40386.6 MB = 39.4 GB (82711872 x 512) Fixed: Capacity: 238475.1 MB = 232.8 GB (488397168 x 512) Signed-off-by: Jon Nettleton <jon@solid-run.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13nvme: Detect devices that are class Storage ExpressJon Nettleton
This adds support to detect the catchall PCI class for NVMe devices. It allows the drivers to work with most NVMe devices that don't need specific detection due to quirks etc. Tested against a Samsung 960 EVO drive. Signed-off-by: Jon Nettleton <jon@solid-run.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13nvme: Add nvme commandsZhikang Zhang
Add nvme commands in U-Boot command line. 1. "nvme scan" - scan NVMe blk devices 2. "nvme list" - show all available NVMe blk devices 3. "nvme info" - show current or a specific NVMe blk device 4. "nvme device" - show or set current device 5. "nvme part" - print partition table 6. "nvme read" - read data from NVMe blk device 7. "nvme write" - write data to NVMe blk device Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13nvme: Add show routine to print detailed informationZhikang Zhang
This adds nvme_print_info() to show detailed NVMe controller and namespace information. Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13nvme: Add NVM Express driver supportZhikang Zhang
NVM Express (NVMe) is a register level interface that allows host software to communicate with a non-volatile memory subsystem. This interface is optimized for enterprise and client solid state drives, typically attached to the PCI express interface. This adds a U-Boot driver support of devices that follow the NVMe standard [1] and supports basic read/write operations. Tested with a 400GB Intel SSD 750 series NVMe card with controller id 8086:0953. [1] http://www.nvmexpress.org/resources/specifications/ Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13dm: blk: part: Add UCLASS_NVME and IF_TYPE_NVMEZhikang Zhang
This adds a new uclass id and block interface type for NVMe. Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jon Nettleton <jon@solid-run.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13arm: mvebu: ddr3_debug: remove self assignmentsxypron.glpk@gmx.de
Remove superfluous self assignements. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-13arm: mvebu: remove self assignmentxypron.glpk@gmx.de
Assigning dev_num to itself is superfluous. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-13tpm: add missing va_endxypron.glpk@gmx.de
va_start must always be matched by va_end. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13ARM: hisilicon: hikey: do not rely on random stack valuexypron.glpk@gmx.de
If CONFIG_MMC_DW is not defined the return value of init_dwmmc should not rely on a random stack value. Instead indicate that no error occured. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13stm32: remove redundant 'else if'xypron.glpk@gmx.de
The if in the else branch is superfluous. We can use a simple if. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13arm: mvebu: avoid possible NULL dereferencexypron.glpk@gmx.de
It does not make sense to check if info is NULL after dereferencing it. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-13armv7m: mpu_config add missing breakxypron.glpk@gmx.de
For DEVICE_NON_SHARED the newly assigned value of attr is overwritten due to a missing break. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13bcm281xx: clock: avoid possible NULL dereferencexypron.glpk@gmx.de
It does not make sense first to dereference c and then to check if it is NULL. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13arm: bcm235xx: clk_set_rate avoid possible NULL derefxypron.glpk@gmx.de
It does not make sense first to dereference c and then to check if it is NULL. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13arm: bcm235xx: avoid possible NULL dereferencexypron.glpk@gmx.de
It does not make sense to first dereference c and then check if it is NULL. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13arm: spear: do not return random value from stackxypron.glpk@gmx.de
If the NOR device is not available do not return a random value from the stack. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13api: remove superfluous assignmentxypron.glpk@gmx.de
No need to assign a value to sig if the next statement using sig is itself an assignment of a value to sig. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13Convert CONFIG_OMAP3_SPI to KconfigAdam Ford
This converts the following to Kconfig: CONFIG_OMAP3_SPI Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Minor comment tweaks] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-13rockchip: clk: remove RATE_TO_DIVKever Yang
Use DIV_ROUND_UP instead RATE_TO_DIV for all Rockchip SoC clock driver. Add or fix the div-field overflow check at the same time. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: clk: update dwmmc clock divKever Yang
dwmmc controller has default internal divider by 2, and we always provide double of the clock rate request by dwmmc controller. Sync code for all Rockchip SoC with: 4055b46 rockchip: clk: rk3288: fix mmc clock setting Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixup for 'missing DIV_ROUND_UP' conflict for clk_rk3288.c:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: rk322x: update max-frequency for mmc nodeKever Yang
mmc using 150000000 as max-frequency like what rk3288 sets. This can speed up the mmc read/write, the actual mmc clock is: Before this patch: 37.125M After this patch: 49.5M Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: dts: rk322x: add sdmmc device nodeKever Yang
add node for sdmmc in dts and rk3229-evb. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13scripts: setlocalversion: safely extract variables from auto.conf using awkPhilipp Tomsich
Moving SPL_LDSCRIPT to Kconfig triggered an unfortunate attempt of command substitution, as the sourced auto.conf may include $(ARCH) which tries to execute a command 'ARCH'. This showed up as a warning similar to the following: include/config/auto.conf: line 209: ARCH: command not found This change does no longer attempt to source auto.conf, but rather passes it through awk to retrieve the values for CONFIG_LOCALVERSION and CONFIG_LOCALVERSION_AUTO. This will also mitigate the risk of unintended command substitution. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reported-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
2017-08-13rockchip: rk322x: set the DDR region as non-secure in SPLKever Yang
Disable the ddr secure region setting in SPL and the ddr memory becomes non-secure, every one can access it. the trust firmware like OPTEE should have the correct setting for it after SPL if there is one. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: rk3288: fix EMMC_DIV_MASK definition in headerKever Yang
It should be '<<' instead of '<' for _MASK definition, fix it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: move SPL_LDSCRIPT to KconfigPhilipp Tomsich
With the new way of doing things (i.e. the hierarchical selection of SPL_LDSCRIPT via Kconfig) in place, this moves the SPL_LDSCRIPT setting for the RK3368 from defconfig back into Kconfig. With this done, there should be no lingering cases of SPL_LDSCRIPT outside of Kconfig files. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13spl: moveconfig: remove SPL_LDSCRIPT definitions for header-filesPhilipp Tomsich
With the hierarchical defaults set up, we remove these from the header files. To do so, I've run moveconfig on SPL_LDSCRIPT and this commits the changes. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13spl: add hierarchical defaults for SPL_LDSCRIPTPhilipp Tomsich
With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config node), all the lingering definitions in header files will cause warnings/errors due to the redefinition of the configuration item. As we don't want to pollute the defconfig files (and values should usually be identical for entire architectures), the defaults are moved into Kconfig. Kconfig will always pick the first default that matches, so please keep these values at the end of each file (to allow any board-specific Kconfig, which will be included earlier) to override with an unconditional default setting. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3188: rock: adjust for SPL/TPL splitPhilipp Tomsich
With the changes to split SPL/TPL for the RK3368, I apparently missed some needed adjustments to the RK3188 Kconfig and rock_defconfig. This fixes build-issues for the rock board after applying the RK3368 enablement (and SPL/TPL) set that resulted from TPL_SERIAL_SUPPORT, TPL_ROCKCHIP_BACK_TO_BROM and TPL_TINY_MEMSET being separate symbols now. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: remove the hard coded uart iomux setting for px5 evbAndy Yan
As the debug uart is marked as dm-pre-reloc, the pinctrl driver will handle the correct iomux setting. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: set Pre-reloc malloc pool size to 4kb for rk3368 based boardsAndy Yan
The default 1kb pre-reloc malloc pool is not enough for dm core to enable the dm-pre-reloc device drivers. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: add u-boot specific dts for rk3368 based boardsAndy Yan
Device drivers like debug serial, dmc should be enabled before relocation, so add u-boot.dtsi files to contain devices that should be marked as dm-pre-reloc. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: remove setup of secure timer from TPL/SPLPhilipp Tomsich
When using DM timers w/ the timer0 block within the RK3368, we no longer depend on the ARMv8 generic timer counting. This allows us to drop the secure timer initialisation from the TPL and SPL stages. The secure timer will later be set up by ATF, which starts the ARMv8 generic timer. Thus, there will be a dependency from Linux to the ATF through the ARMv8 generic timer... this seems reasonable, as Linux will require the ATF (and PSCI) to start up the secondary cores anyway (in other words: we don't add any new dependencies). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: lion-rk3368: defconfig: enable DM timer for all stagesPhilipp Tomsich
There is no reasonably robust way (this will be needed so early that diagnostics will be limited) to specify the base-address of the secure timer through the DTS for TPL and SPL. In order to allow us a cleaner way to structure our SPL and TPL stage, we now move to a DM timer driver. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13dts: rk3368: make timer0 accessible for SPL and TPLPhilipp Tomsich
To use it with the DM timer driver in SPL and TPL, timer0 needs to be marked as pre-reloc. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: timer: add device-model timer driver for RK3368 (and similar)Philipp Tomsich
This adds a device-model driver for the timer block in the RK3368 (and similar devices that share the same timer block, such as the RK3288) for the down-counting (i.e. non-secure) timers. This allows us to configure U-Boot for the RK3368 in such a way that we can run with the secure timer inaccessible or uninitialised (note that the ARMv8 generic timer does not count, if the secure timer is not enabled). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13dm: timer: normalise SPL and TPL supportPhilipp Tomsich
To fully support DM timer in SPL and TPL, we need a few things cleaned up and normalised: - inclusion of the uclass and drivers should be an all-or-nothing decision for each stage and under control of $(SPL_TPL_)TIMER instead of having the two-level configuration with TIMER and $(SPL_TPL_)TIMER_SUPPORT - when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can not be compiled in This normalises configuration to $(SPL_TPL_)TIMER and moves the config options to drivers/timer/Kconfig (and cleans up the collateral damage to some defconfigs that had SPL_TIMER_SUPPORT enabled). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13timer: add OF_PLATDATA support for timer-uclassPhilipp Tomsich
The timer-uclass depends on full OF_CONTROL through its interrogation of /chosen and the code to determine the clock-frequency. For the OF_PLATDATA case, these code-paths are disabled and it becomes the timer driver's responsibility to correctly set the clock-frequency in the uclass priv-data. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13configs: mpc85xx: fix fallout from SPL/TPL changesPhilipp Tomsich
Splitting the feature selection for SPL and TPL, caused a few build failures to mpx85xx boards. This fixes the fallout by adding the needed new option names to the respective defconfig files. Signed-off-byL Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: board: puma_rk3399: rename ATF firmwareKlaus Goger
prefix the bl31 firmware needed to build uboot.itb so it can coexist in the build area with ATFs from other boards (i.e. lion_rk3368) Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: board: puma-rk3399: fix warnings in puma_rk3399/fit_spl_atf.itsPhilipp Tomsich
The ITS file generated warnings due to @<num> designations in the naming which cause DTC to complain as follows: Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /images/atf@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /images/pmu@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /configurations/conf@1 has a unit name, but no reg property This removes the @<num> part from the names, as we only have a single image for each payload aspect (and only a single configuration) anyway. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZEPhilipp Tomsich
We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: mark TPL as not inheriting its stack, text-base and size ↵Philipp Tomsich
from SPL The RK3368 needs to have a different base-address and stack-pointer for its TPL stage. Now that we want to do this via Kconfig, we need to tick the appropriate 'TPL_NEEDS_...' boxes. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13armv8: TPL_STACK will always be defined, so test CONFIG_TPL_NEEDS_SEPARATE_STACKPhilipp Tomsich
Now that TPL_STACK has been moved off the whitelist (ok, I'm lying: the 'moving off the whitelist' part comes in once moveconfig runs... which will be a few commits down the line) and added to Kconfig, we need to test CONFIG_TPL_NEEDS_SEPARATE_STACK to see whether the value from TPL_STACK should be used or whether we try to inherit whatever SPL uses. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13spl: support TPL_STACK, TPL_MAX_SIZE and TPL_TEXT_BASE via KconfigPhilipp Tomsich
Let's clean up behind ourselves and move the (newly defined) TPL_STACK, TPL_MAX_SIZE and TPL_TEXT_BASE into Kconfig. Given that 0x0 might be considered to be valid values for TPL_TEXT_BASE and TPL_STACK, we need to introduce helper config options ("TPL_NEEDS_SEPARATE_...") to indicate that these symbols are used (and not inherited from their SPL variants) for any given target-platform. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368Philipp Tomsich
Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13spl: Kconfig: migrate $(SPL_TPL_)LDSCRIPT to KconfigPhilipp Tomsich
Now that we have split up SPL_LDSCRIPT into a SPL and TPL variant and have started to use the TPL-variant for the RK3368, it's time to clean up behind ourselves: move both variants into Kconfig and remove them from the whitelist. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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