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This adds the device tree to the DFU and bootmenu environment setting.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
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Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
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Signed-off-by: Stefano Babic <sbabic@denx.de>
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This fixes four small typos in the README file.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Test ofnode_by_prop_value()
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Adds ofnode_by_prop_value() to search for nodes with a given property
and value, an ofnode version of fdt_node_offset_by_prop_value().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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commit 30a90f56c3a2 ("dm: core: add functions to get memory-mapped I/O
addresses") introduced a devfdt_remap_addr_index() routine but it does
not make use of the index parameter.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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All Linux firmware drivers are put under "/firmware" node
and it has support to populate "/firmware" node by default.
u-boot and Linux can share same DTB. In this case, driver
probe for devices under "/firmware" will not be invoked
as "/firmware" does not have its own "compatible" property.
This patch scans "/firmware" node by default like "/clocks".
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Create separate function for scanning node by path and
move "/clock" node scan code into that function.
This will be usable if scanning of more node is required.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Add a CPU driver for the MPC83xx architecture.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Add a sandbox CPU driver, and some tests for the CPU uclass.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Add a method to probe all CPUs of the board.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Documentation in cpu.h is not in kernel-doc format. Change it to comply
with it.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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When the DM CPU drivers are active, printing information about a CPU
should be delegated to a matching driver.
Hence, add a static print_cpuinfo that implements this delegation when
DM CPU drivers are active.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Changed condition to CONFIG_IS_ENABLED(CPU):
Signed-off-by: Simon Glass <sjg@chromium.org>
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The documentation in init.h is not in kernel-doc format. Fix this.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Includes should be sorted.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Add a timer driver for the MPC83xx architecture.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Makefile entries should be sorted.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Add a clock driver for the MPC83xx architecture.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Add a sysreset driver for the MPC83xx platform.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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To print the reset status during boot, add a method print_resetinfo to
board_f, which is called in init_sequence_f[], that gets the reset
information from the sysreset driver (assuming there is only one seems
reasonable), and prints it.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Add some tests for sysreset_get_status.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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It's useful to have the reset status of the SoC printed out during reset
(e.g. to learn whether the reset was caused by software or a watchdog).
As a first step to implement this, add a get_status method to the
sysreset class, which enables the caller to get printable information
about the reset status (akin to get_desc in the CPU uclass).
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Define the read*_*/write*_* macros for the PowerPC platform to be able
to use the macros in wait_bit.h.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Add a RAM driver for the MPC83xx architecture.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Imply CONFIG_BITREVERSE for Sandbox.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Sandbox is not a real bootloader and it does require
a position independent code to be supported.
Thus, build it with -fPIC explicitly.
Fixes: 16940f720f9b ("Makefile: Don't generate position independent code")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reported-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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These comments were copied from the Linux kernel driver in
drivers/platform/x86/intel_scu_ipc.c
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Now that we have I2C#6 working, it's time to add a corresponsing
ACPI binding.
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Now that we have the pinctrl driver for Merrifield in place we can make
use of it and set I2C#6 pins appropriately.
Initial configuration came from the firmware. Which quite likely has
been used in the phones, where that is not part of Atom peripheral, is
in use. Thus we need to override the leftover.
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This API is going to be used to configure some pins that are protected
for simple modification.
It's not a comprehensive pinctrl driver but can be turned into one
when we need this in the future. Now it is planned to be used only
in one place. So that's why I decided not to pollute the codebase with a
full-blown pinctrl-merrifield nobody will use.
This driver reads corresponding fields in DT and configures pins
accordingly.
The "protected" flag is used to distinguish configuration of SCU-owned
pins from the ordinary ones.
The code has been adapted from Linux work done by Andy Shevchenko
in pinctrl-merrfifield.c
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix build warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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This interface will be used to configure properly some pins on
Merrifield that are shared with SCU.
scu_ipc_raw_command() writes SPTR and DPTR registers before sending
a command to SCU.
This code has been ported from Linux work done by Andy Shevchenko.
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This will add support for a baud rate of 57600.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This patch adds mcf5441x eSDHC support for the mcf5441x family.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
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On a
u32 val = __sw32(*addr);
multiple memory accesses are not welcome, since "addr" may
be an IO peripheral register address.
This patch changes __sw16/32 to perform a single memory
access for the source value.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
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Signed-off-by: Angelo Dureghello <angelo@sysam.it>
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The Gen2 TMU is fed with fixed 32.5 MHz signal from CP .
This is then divided by 4 in TMU. Fix the timer clock
setting in Gen2.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Replace those two functions with generic ones by defining the
timer macros in include/config/*.h .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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The code uses all in all three TMU registers, drop the massive
register layout structures and just define the required timer
registers and use them throughout the code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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The header contains only the TMU register layout, just inline it
into the TMU timer implementation and drop the header completely.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2,
while the old SH parts use CONFIG_SYS_CLK_FREQ directly.
Just put this into the TMU implementation and drop the
CONFIG_SH_TMU_CLK_FREQ config option.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant
directly instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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These functions are always called for timer = 0, so drop the
timer check. Since these functions are called from one place
only and they are reduced to one line of code, just inline
them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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