summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2018-03-30arm64: a37xx: dts: Add additional pinctrl definitionKen Ma
Add mmc pins, pcie pins and sdio pins definition and do these pins' configuration for DB board and espressobin board; Add uart2 pins configuration for DB board. Reviewed-on: http://vgitil04.il.marvell.com:8080/40914 Reviewed-by: Wilson Ding <dingwei@marvell.com> Tested-by: Wilson Ding <dingwei@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: dts: Add pinctrl configuration for ESPRESSOBin boardKen Ma
Reviewed-on: http://vgitil04.il.marvell.com:8080/40913 Reviewed-by: Wilson Ding <dingwei@marvell.com> Tested-by: Wilson Ding <dingwei@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: defconfig: Enable PINCTRL and GPIO support for ESPRESSOBin boardKen Ma
This patch enable the PINCTRL and GPIO support, including the GPIO command on the Armada 3720 espressobin board. Reviewed-on: http://vgitil04.il.marvell.com:8080/40746 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Wilson Ding <dingwei@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: dts: add gpio head file includingKen Ma
Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: mvebu: a8k: Add distro boot supportMark Kettenis
The various load address values are taken from the a37xx configuration and match the dowstream 'u-boot-2017.03-armada-17.10' release where appropriate. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30kwbimage: Fix out of bounds accessAlexander Graf
The kwbimage format is reading beyond its header structure if it misdetects a Xilinx Zynq image and tries to read it. Fix it by sanity checking that the header we want to read fits inside our file size. Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30configs: clearfog: enable random random MAC addressBaruch Siach
This makes the network devices usable when booting a blank board over UART, with no pre-configured MAC address stored in the environment area. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30dm: pcie: designware: add correct ATU handlingIgal Liberman
Currently, ATU (address translation unit) implementation doesn't support translate addresses > 32 bits. This patch allows to configure ATU correctly for different memory accesses (memory, configuration and IO). The same approach is used in Linux Kernel. Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30x86: zImage: Pass working device tree data to the kernelIvan Gorinov
On x86 platforms, U-Boot does not pass Device Tree data to the kernel. This prevents the kernel from using FDT loaded by U-Boot. Read the working FDT address from the "fdtaddr" environment variable and add a copy of the FDT data to the kernel setup_data list. Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: add #include <linux/libfdt.h> to zimage.c to fix build error] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30x86: mmc: Fix mapping of BAR memoryBernhard Messerklinger
Use dm_pci_map_bar function for BAR mapping. This has the advantage of clearing BAR flags and and only accepting mapped memory. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30dm: pci: Avoid setting a PCI region that has 0 sizeBin Meng
It makes no sense to set a PCI region that has 0 size. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-30dm: pci: Check board information pointer in decode_regions()Bin Meng
PCI enumeration may happen very early on an x86 board. The board information pointer should have been checked in decode_regions() as its space may not be allocated yet. With this commit, Intel Galileo board boots again. Fixes: 664758c ("pci: Fix decode regions for memory banks") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-30efi_stub: Fix GDT_NOTSYS checkAlexander Graf
The get_codeseg32() wants to know if a passed in descriptor has flag GDT_NOTSYS set (desc & GDT_NOTSYS), not whether desc and GDT_NOTSYS are not != 0 (desk && GDT_NOTSYS). This is an obvious typo. Fix it up. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30riscv: ae250: Support DT provided by the board at runtimeRick Chen
Enable CONFIG_OF_BOAD to support delivery dtb to u-boot at run time instead of embedded. There are two methods to delivery dtb. 1 Pass from loader: When u-boot boot from RAM, gdb or loader can pass dtb via a2 to u-boot dynamically. Of course gdb or loader shall be in charge of dtb delivery. 2 Configure CONFIG_SYS_FDT_BASE: It can be configured as RAM or ROM base statically, no mater u-boot boot from RAM or ROM. If it was configured as ROM base, dtb can be burned into ROM(spi flash) by spi driver. Meanwhile remove CONFIG_SKIP_LOWLEVEL_INIT which is useless in nx25-ae250 configuration. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30configs: Drop CONFIG_MMC_NDS32Rick Chen
Remove CONFIG_MMC_NDS32 from the three config (adp-ae3xx_defconfig, adp-ag101p_defconfig, nx25-ae250_defconfig). Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30mmc: ftsdc010: Merge nds32_mmc to ftsdc010Rick Chen
nsd32_mmc was created to support ftsdc010 dm. It is not necessary to separate both, so merge it to ftsdc010. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30mmc: ftsdc010: Migrate CONFIG_FTSDC010_SDIO to KconfigRick Chen
Convert CONFIG_FTSDC010_SDIO to Kconfig. So CONFIG_FTSDC010_SDIO can also be removed from config_whitelist.txt. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30Drop CONFIG_FTSDC010_NUMBERRick Chen
CONFIG_FTSDC010_NUMBER was not used anymore, can be removed now. So CONFIG_FTSDC010_NUMBER can also be removed from config_whitelist.txt. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30Drop CONFIG_FTSDC010_BASERick Chen
After drop non-dm code of ftsdc010, the sd register base definition can be droppped now. So CONFIG_FTSDC010_BASE and CONFIG_FTSDC010_BASE_LIST both can be removed from config_whitelist.txt Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30board: Drop ftsdc010 non-dm codeRick Chen
Remove board_mmc_init() in adp-ag101p, adp-ae3xx and nx25-ae250 boards. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30mmc: ftsdc010: Drop non-dm codeRick Chen
Only three defconfig(adp-ag101p_defconfig, adp-ae3xx_defconfig, nx25-ae250_defconfig) set CONFIG_FTSDC010=y. And they all also enable CONFIG_DM_MMC. So the non-dm code of ftsdc010 can be dropped now. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30nds32: dts: AG101P support sd High-Speed modeRick Chen
Enable High-Speed mode with cap-sd-highspeed in dts Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: dts: AE250 support sd High-Speed modeRick Chen
Enable High-Speed mode with cap-sd-highspeed in dts. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30mmc: ftsdc010: Support High-Speed modeRick Chen
ftsdc010 dm driver has been disable High-Speed mode as default to work around Andes AE3XX platform's problem, because of it does not support High-Speed mode in commit id 73cd56b2df213c629191139e5c6705e069b6214f. But other platforms or SoCs maybe support this function. So High-Speed mode can be enabled from dts with cap-mmc-highspeed or cap-sd-highspeed property. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30doc: ae250: Describe riscv-linux booting via u-bootRick Chen
Simply record riscv-linux booting steps and messages from bbl via u-boot on QEMU in README.ae250. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30tools: mkimage: Support RISC-V archRick Chen
Add riscv uimage arch to support riscv-linux booting. It can Convert riscv-linux to image which can be booted by bootm command. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: bootm: Remove ATAGSRick Chen
ATAGS is not supported and will be replaced by DT in riscv-linux. So can be removed now. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: bootm: Support to boot riscv-linuxRick Chen
riscv-linux should use BBL (Berkeley bootloader) for loading the Linux kernel. U-Boot can play as FSBL(first stage bootloader) to boot BBL and riscv-linux. In BBL's init_first_hart(), it will pass dtb with a1. So implement bootm to pass arguments to BBL correctly. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix static const char * array declarationsRick Chen
It is reported by checkpatch.pl WARNING: static const char * array should probably be static const char * const Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix missing a blank line after declarationsRick Chen
It is reported by checkpatch.pl WARNING: Missing a blank line after declarations. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix alignment should match open parenthesisRick Chen
It is reported by checkpatch.pl. CHECK: Alignment should match open parenthesis Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix use of volatileRick Chen
It is reported by checkpatch.pl WARNING: Use of volatile is usually wrong: see Documentation/process/volatile-considered-harmful.rst Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix Macro argument reuseRick Chen
It is CHECK reported by checkpatch.pl CHECK: Macro argument reuse 'PTE' - possible side-effects? Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-29Merge git://git.denx.de/u-boot-rockchipTom Rini
2018-03-28rockchip: sdhci: support 8bit bus-widthPhilipp Tomsich
The Rockchip-specific SDHCI wrapper does not process the 'bus-width' property in the SDHCI node. Consequently, the bus is always kept in 4bit mode, even if 8bit wide operation is available, supported and requested in the DTS. This change adds processing of the 'bus-width' property and sets the host capability flag for an 8bit wide bus, if set to 8. As the logic in sdhci.c does not support clearing the 4bit capability, we assume that 4bit operation is always supported. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: mmc: update MAINTAINERSPhilipp Tomsich
The Rockchip-specific wrappers to the DW-MMC and the SDHCI driver were not covered as part of what's maintained by the architecture maintainers. Add them here. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: defconfig: puma-rk3399: enable DMA for SDHCI controllerPhilipp Tomsich
For the RK3399-Q7, we have a fast eMMC connected in an 8 bit wide configuration to the SDHCI controller (sdhci@fe330000). Enable DMA within the SDHCI driver to get the best performance out of it. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: rk3399: set fdtfileMark Kettenis
Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: clk: rk3188: update dpll settings to make EMAC workAlexander Kochetkov
The patch set dpll settings for 300MHz to values used by binary blob[1]. With new values dpll still generate 300MHz clock, but EMAC work. Probably with new values dpll generate more stable clock. dpll on rk3188 provide clocks to DDR and EMAC. With current dpll settings EMAC doesn't work on radxa rock. EMAC sends packets to network, but it doesn't receive anything. ifconfig shows a lot of framing errors. [1] https://github.com/linux-rockchip/u-boot-rockchip/blob/u-boot-rk3288/ tools/rk_tools/3188_LPDDR2_300MHz_DDR3_300MHz_20130830.bin Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28video: rk3288_mipi: Combine NULL check into IS_ERR_OR_NULL()Punit Agrawal
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28video: rk3288_mipi: check in rk_mipi_ofdata_to_platdataHeinrich Schuchardt
The error checking should also catch the case that no range has beeen defined. syscon_get_first_range() returns NULL if no range is defined. cf. rk3399_mipi.c Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28video: rk3399_mipi: Combine NULL check into IS_ERR_OR_NULL()Punit Agrawal
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28video: rk3399_mipi: correct error checkingHeinrich Schuchardt
Pointers are never negative. Use macro IS_ERR() for checking. cf. rk3288_mipi.c Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28usb: rockchip: remove duplicate assignement.Heinrich Schuchardt
Assigning f_rkusb->reboot_flag twice doesn't make sense. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28driver: ram: rockchip: rk3399: missing counter incrementHeinrich Schuchardt
If we want to check the duration we need to increment the counter. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driverAlexander Kochetkov
Clean the iomux definitions at grf_rk3188.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3036: Move the iomux definitions into pinctrl-driverAlexander Kochetkov
Clean the iomux definitions at grf_rk3036.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3399: add support for I2C[123467]Philipp Tomsich
This adds support for the (to date unsupported) I2C controllers 1~4 and 6~7 (i.e. now all controllers except I2C5, which is not accessible on the RK3399-Q7, are supported by pinctrl). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3399: fix GPIO2B1 and GPIO2B2 shift valuePhilipp Tomsich
The shift values for GPIO2B1 and GPIO2B2 had in fact referred to GPIO2B0 and GPIO2B1, respectively. This substitutes the correct values. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-25Merge git://git.denx.de/u-boot-ubiTom Rini
generated by cgit (git 2.34.1) at 2024-12-28 16:35:11 +0000