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2018-04-04efi_loader: define GUIDS for event groupsHeinrich Schuchardt
Event groups are used to signal multiple events at the same time. They are identified by GUIDs. This patch provided the predefined GUIDs of UEFI specification 2.7. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: manage events in a linked listHeinrich Schuchardt
Lift the limit on the number of events by using a linked list. This also allows to have events with type == 0. This patch is based on Rob's patch efi_loader: fix events https://lists.denx.de/pipermail/u-boot/2017-October/309348.html Suggested-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: fix formatting errorsHeinrich Schuchardt
Fix formatting errors in efi_boottime.c indicated by scripts/checkpatch.py. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: clear signaled state in CheckEventHeinrich Schuchardt
CheckEvent must clear the signaled state. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: check parameter in InstallConfigurationTableHeinrich Schuchardt
Check that parameter guid is not NULL. This avoids a possible NULL pointer exception. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: correct input of special keysHeinrich Schuchardt
Don't set unicode_char if scan_code is set. Add support for page up, page down, and insert. Correct input of function keys. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_selftest: check installation of the device treeHeinrich Schuchardt
The unit test checks if a device tree is installed. It requires that the 'compatible' property of the root node exists. If available it prints the 'serial-number' property. The serial-number property is derived from the environment variable 'serial#'. This can be used to check if the image_setup_libfdt() function is executed. A Python test is supplied. It sets a value for serial# and checks that the selftest shows this as serial-number. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: support device tree for bootefi selftestHeinrich Schuchardt
The second argument of the bootefi command should always be usable to specify a device tree. This was missing for bootefi selftest and bootefi hello. Proper error handling is added. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: check initialization of EFI subsystem is successfulHeinrich Schuchardt
Up to now errors in the initialization of the EFI subsystems was not checked. If any initialization fails, leave the bootefi command. We do not retry initialization because this would require to undo all prior initalization steps. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: do_bootefi_exec should always return an EFI status codeHeinrich Schuchardt
The return type of do_bootefi_exec() is efi_status_t. So in case of an error we should always return an EFI status code. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: efi_get_time_init should return status codeHeinrich Schuchardt
All EFI initialization functions should return a status code. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: exit status for efi_reset_system_initHeinrich Schuchardt
efi_reset_system_init provides the architecture or board specific initialization of the EFI subsystem. Errors should be caught and signalled by a return code. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: simplify calling efi_init_obj_listHeinrich Schuchardt
efi_init_obj_list() should be executed only once. Rather than having the caller check this variable and the callee set it, move all access to the variable inside the function. This reduces the logic needed to call efi_init_obj_list(). Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: consistently return efi_status_t efi_watchdog_registerHeinrich Schuchardt
efi_watchdog_register() should always return a status code and not a boolean value. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: return efi_status_t from efi_net_registerHeinrich Schuchardt
Consistently return status codes form efi_net_register(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: return efi_status_t from efi_gop_registerHeinrich Schuchardt
All initialization routines should return a status code instead of a boolean. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> [agraf: Convert warnings to debug() prints] Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: efi_smbios_register should have a return valueHeinrich Schuchardt
Errors may occur inside efi_smbios_register(). - Return a status code. - Remove unused variables. - Use constants where applicable. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: provide new doc/README.uefiHeinrich Schuchardt
Provides information about - usage of the bootefi command - overview of UEFI - interaction between U-Boot and EFI drivers Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: delete doc/README.efiHeinrich Schuchardt
Delete README.efi. It is replaced by a further patch. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: Initial EFI_DEVICE_PATH_UTILITIES_PROTOCOLLeif Lindholm
Not complete, but enough for Shell.efi and SCT.efi. We'll implement the rest as needed or once we have SCT running properly so there is a way to validate the interface against the conformance test suite. Initial skeleton written by Leif, and then implementation by Rob. Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> [Fill initial skeleton] Signed-off-by: Rob Clark <robdclark@gmail.com> [Rebase on v2018.03-rc1] Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: remove deprecated ConsoleControlProtocolHeinrich Schuchardt
The console control protocol is not defined in the UEFI standard. It exists in EDK2's EdkCompatiblityPkg package. But this package is deprecated according to https://github.com/tianocore/tianocore.github.io/wiki/Differences-between-EDK-and-EDK-II Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04efi_loader: parameter checks for LoadImageHeinrich Schuchardt
Add parameter checks in efi_load_image(). Check memory allocation is successful in efi_load_image(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-02Prepare v2018.05-rc1Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-01Merge git://git.denx.de/u-boot-dmTom Rini
2018-04-01image.h: add forward declaration of struct fdt_regionMasahiro Yamada
This header needs to know 'fdt_region' is a struct for the fit_region_make_list() prototype. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-01fdt_region: remove unneeded fdt_internal.h inclusionMasahiro Yamada
fdt_region.c does not depend on anything in libfdt_internal.h Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-01libfdt: move FDT_RAMDISK_OVERHEAD to image-fdt.cMasahiro Yamada
This macro is locally referenced in common/image-fdt.c Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-01core: ofnode: Fix translation for #size-cells == 0Mario Six
Commit 286ede6 ("drivers: core: Add translation in live tree case") made dev_get_addr always use proper bus translations for addresses read from the device tree. But this leads to problems with certain busses, e.g. I2C busses, which run into an error during translation, and hence stop working. It turns out that of_translate_address() and fdt_translate_address() stop the address translation with an error when they're asked to translate addresses for busses where #size-cells == 0 (comment from drivers/core/of_addr.c): * Note: We consider that crossing any level with #size-cells == 0 to mean * that translation is impossible (that is we are not dealing with a value * that can be mapped to a cpu physical address). This is not really specified * that way, but this is traditionally the way IBM at least do things To fix this case, we check in both the live-tree and non-live tree-case, whether the bus of the device whose address is about to be translated has size-cell size zero. If this is the case, we just read the address as a plain integer and return it, and only apply bus translations if the size-cell size if greater than zero. Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Reported-by: Martin Fuzzey <mfuzzey@parkeon.com> Fixes: 286ede6 ("drivers: core: Add translation in live tree case") Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-01dm: core: make fixed-clock dt scan live dt compatibleAndy Yan
dm_scan_fdt_node can't work when live dt is active, we should use dm_scan_fdt_live instead. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-31fs: cbfs: fix locating the cbfs headerAndre Heider
The value at the end of the rom is not a pointer, it is an offset relative to the end of rom. Signed-off-by: Andre Heider <a.heider@gmail.com>
2018-03-31cmd: cbfs: fix reading the end_of_rom pointer for 64bit archsAndre Heider
The cast breaks the pointer on 64bit archs, so lets get rid of it. Signed-off-by: Andre Heider <a.heider@gmail.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-03-31pinctrl-uclass: convert to use live dtKever Yang
Use live dt interface for pinctrl_select_state_full() Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-31core: add uclass_get_device_by_phandle_id() apiKever Yang
Add api for who can not get phandle from a device property. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-30Merge git://git.denx.de/u-boot-marvellTom Rini
2018-03-30Merge git://git.denx.de/u-boot-x86Tom Rini
2018-03-30Merge git://git.denx.de/u-boot-riscvTom Rini
2018-03-30arm64: a37xx: defconfigs: enable PCI_CMD and E1000 driverKen Ma
Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: dts: enable pcie portWilson Ding
This patch enabled PCIe port on both devel-board and espressobin board. Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Wilson Ding <dingwei@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: defconfigs: enable aardvark pcie driverWilson Ding
Signed-off-by: Wilson Ding <dingwei@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: pci: add support for aardvark pcie driverWilson Ding
This patch introduced the Aardvark PCIe driver based driver model. The PCIe driver is supposed to work in Root Complex mode. It only supports X1 lane width. Signed-off-by: Wilson Ding <dingwei@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/38725 Reviewed-by: Victor Gu <xigu@marvell.com> Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: Hua Jing <jinghua@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: populate pcie memory regionWilson Ding
This patch added a new region of 32MiB AT 0xe800.0000 to Armada37x0's memory map. This region is supposed to be mapped in MMU in order to enable the access to the PCI I/O or MEM resources. Signed-off-by: Wilson Ding <dingwei@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/38724 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Victor Gu <xigu@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: remove old pinctrl implementationKen Ma
Since the new pinctrl/gpio driver is used, so this patch removes the old board specific pin control settings. Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30Revert "arm64: a37xx: dts: Add pin control nodes to DT"Ken Ma
The commit "arm64: mvebu: Add pinctrl nodes for Armada 3700" has added new pinctrl nodes. This reverts commit f7cab0f95b05ec6a66fe4796b9ad44406d0cc864. Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30doc: a37xx: Introduce pinctrl device tree bindingKen Ma
Reviewed-on: http://vgitil04.il.marvell.com:8080/43289 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: dts: Correct mpp definitionsKen Ma
This patch corrects below mpp definitions for armada 3720 DB board and ESPRESSOBin board: - "smi" pins group is added and "smi" function is set for eth0; - Now pcie pins are used as gpio to implement PCIe function in hardware, so "pcie" group function is changed to "gpio". Reviewed-on: http://vgitil04.il.marvell.com:8080/43287 Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: pinctrl: Correct mpp definitionsKen Ma
This patch corrects below mpp definitions: - The sdio_sb group is composed of 6 pins and not 5; - The rgmii group contains pins mpp2[17:6] and not mpp2[19:6]; - Pin of group "pmic0" is mpp1[6] but not mpp1[16]; - Pin of group "pmic1" is mpp1[7] but not mpp1[17]; - A new group "smi" is added in A0 with 2 pins - mpp2[19:18], its bitmask is bit4; - Group "pcie1" has 3 pins in A0 - mpp2[5:3], its bit mask is bit5 | bit9 | bit10 but not bit4; - Group "ptp" has 3 pins in A0 as Z1, but its bitmask is changed to bit11 | bit12 | bit13. Reviewed-on: http://vgitil04.il.marvell.com:8080/43288 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hua Jing <jinghua@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: pinctrl: Fix gpio pin offset in registerKen Ma
For armada_37xx_update_reg(), the parameter offset should be pointer so that it can be updated, otherwise offset will keep old value, and then when offset is larger than or equal to 32 the mask calculated by "BIT(offset)" will be 0 in gpio chip hook functions, it's an error, this patch set offset parameter of armada_37xx_update_reg() as pointer. Reviewed-on: http://vgitil04.il.marvell.com:8080/43287 Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: pinctrl: Fix the pin 23 on south bridgeKen Ma
Pin 23 on South bridge does not belong to the rgmii group. It belongs to a separate group which can have 3 functions. Due to this the fix also have to update the way the functions are managed. Until now each groups used NB_FUNCS(which was 2) functions. For the mpp23, 3 functions are available but it is the only group which needs it, so on the loop involving NB_FUNCS an extra test was added to handle only the functions added. The bug was visible when the gpio regulator used the gpio 23, the whole rgmii group was setup to gpio which broke the Ethernet support on the Armada 3720 DB board. Thanks to this patch, the UHS SD cards (which need the vqmmc) _and_ the Ethernet work again. Reviewed-on: http://vgitil04.il.marvell.com:8080/43284 Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: dts: Fix the number of GPIO on south bridgeKen Ma
The number of pins in South Bridge is 30 and not 29. There is a fix for the driver for the pinctrl, but a fix is also need at device tree level for the GPIO. Reviewed-on: http://vgitil04.il.marvell.com:8080/43286 Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30arm64: a37xx: pinctrl: Fix number of pin in south bridgeKen Ma
On the south bridge we have pin from 0 to 29, so it gives 30 pins (and not 29). Reviewed-on: http://vgitil04.il.marvell.com:8080/43285 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hua Jing <jinghua@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
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