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2020-05-10nand: enable the Randomizer module for i.mx7 and i.mx8Alice Guo
To enable the Randomizer module, set GPMI_ECCCTRL[RANDOMIZER_ENABLE] to 1, then set GPMI_ECCCOUNT[RANDOMIZER_PAGE] to select randomizer page number needed to be randomized. Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10mxs_nand: don't check zero count when ECC reading with randomizerHan Xu
When enabled randomizer during ECC reading, the controller reported it's erased page. Checking zero count will cause data get modified to all 0xFF. Stop checking during randomizer to workaround this issue. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10MXS_NAND: Add clock support for iMX8Ye Li
Since iMX8 has enabled clock uclass, we can parse the clocks from DTB and enable them in GPMI driver. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10mtd: nand: support GPMI NAND driver for i.MX8Peng Fan
enable the GPMI NAND driver for i.MX8, i.MX8 use similar controller as i.MX8M - register definition for i.mx8 - DMA structure must be 32bit address Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10nand: mxs_nand: make imx8mm can use hardware BCH and randomizerAlice Guo
imx8mm needs to BCH encode and set NAND page number needed to be randomized modify conditional compilation Use CONFIG_IMX8M, so it apply to imx8mq/mm/mn Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10mtd: mxs_nand: fix the gf_13/14 definition issueHan Xu
gf_13/14 mask was not set correctly in register definition. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10mtd: nand: mxs_nand: add i.MX6QP compatible stringHan Xu
add the dedicate compatible string for i.MX6QP Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10mxs_nand: Update compatible string for i.MX6SXYe Li
The iMX6SX uses compatible string "fsl,imx6sx-gpmi-nand" for gpmi node in DTS, so update the driver for the string Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10nand: Update SPL MXS NAND mini driverYe Li
Update the mini driver to add support for getting ecc info from ONFI and support read image data from page unaligned NAND address. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10mxs_nand: Add support for i.MX8MYe Li
Update the gpmi/apbh_dma/bch drivers and relevant registers for i.MX8M. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10nand: mxs: correct bitflip for erased NAND pagePeng Fan
This patch is a porting of http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/ commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38 " i.MX6QP and i.MX7D BCH module integrated a new feature to detect the bitflip number for erased NAND page. So for these two platform, set the erase threshold to gf/2 and if bitflip detected, GPMI driver will correct the data to all 0xFF. Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q with the one for i.MX6QP. " In this patch, i.MX6UL is added and threshold changed to use ecc_strength. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10nand: mxs: fix the bitflips for erased page when uncorrectable errorPeng Fan
This patch is porting from linux: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/ ?h=imx_4.1.15_1.0.0_ga&id=3d42fcece496224fde59f9343763fb2dfc5b0768 " We may meet the bitflips in reading an erased page(contains all 0xFF), this may causes the UBIFS corrupt, please see the log from Elie: ----------------------------------------------------------------- [ 3.831323] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.845026] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.858710] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.872408] UBI error: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read 16384 bytes ... [ 4.011529] UBIFS error (pid 36): ubifs_recover_leb: corrupt empty space LEB 27:237568, corruption starts at 9815 [ 4.021897] UBIFS error (pid 36): ubifs_scanned_corruption: corruption at LEB 27:247383 [ 4.030000] UBIFS error (pid 36): ubifs_scanned_corruption: first 6569 bytes from LEB 27:247383 ----------------------------------------------------------------- This patch does a check for the uncorrectable failure in the following steps: [0] set the threshold. The threshold is set based on the truth: "A single 0 bit will lead to gf_len(13 or 14) bits 0 after the BCH do the ECC." For the sake of safe, we will set the threshold with half the gf_len, and do not make it bigger the ECC strength. [1] count the bitflips of the current ECC chunk, assume it is N. [2] if the (N <= threshold) is true, we continue to read out the page with ECC disabled. and we count the bitflips again, assume it is N2. (We read out the whole page, not just a chunk, this makes the check more strictly, and make the code more simple.) [3] if the (N2 <= threshold) is true again, we can regard this is a erased page. This is because a real erased page is full of 0xFF(maybe also has several bitflips), while a page contains the 0xFF data will definitely has many bitflips in the ECC parity areas. [4] if the [3] fails, we can regard this is a page filled with the '0xFF' data. " Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10mtd: gpmi: provide the option to use legacy bch geometryYe Li
Provide an option in DT to use legacy bch geometry, which compatible with the 3.10 kernel bch setting. To enable the feature, adding "fsl,legacy-bch-geometry" under gpmi-nand node. NOTICE: The feature must be enabled/disabled in both u-boot and kernel. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10mtd: gpmi: change the BCH layout setting for large oob NANDYe Li
The code change updated the NAND driver BCH ECC layout algorithm to support large oob size NAND chips(oob > 1024 bytes) and proposed a new way to set ECC layout. Current implementation requires each chunk size larger than oob size so the bad block marker (BBM) can be guaranteed located in data chunk. The ECC layout always using the unbalanced layout(Ecc for both meta and Data0 chunk), but for the NAND chips with oob larger than 1k, the driver cannot support because BCH doesn’t support GF 15 for 2K chunk. The change keeps the data chunk no larger than 1k and adjust the ECC strength or ECC layout to locate the BBM in data chunk. General idea for large oob NAND chips is 1.Try all ECC strength from the minimum value required by NAND spec to the maximum one that works, any ECC makes the BBM locate in data chunk can be chosen. 2.If none of them works, using separate ECC for meta, which will add one extra ecc with the same ECC strength as other data chunks. This extra ECC can guarantee BBM located in data chunk, of course, we need to check if oob can afford it. Previous code has two methods for ECC layout setting, the legacy_calc_ecc_layout and calc_ecc_layout_by_info, the difference between these two methods is, legacy_calc_ecc_layout set the chunk size larger chan oob size and then set the maximum ECC strength that oob can afford. While the calc_ecc_layout_by_info set chunk size and ECC strength according to NAND spec. It has been proved that the first method cannot provide safe ECC strength for some modern NAND chips, so in current code, 1. Driver read NAND parameters first and then chose the proper ECC layout setting method. 2. If the oob is large or NAND required data chunk larger than oob size, chose calc_ecc_for_large_oob, otherwise use calc_ecc_layout_by_info 3. legacy_calc_ecc_layout only used for some NAND chips does not contains necessary information. So this is only a backup plan, it is NOT recommended to use these NAND chips. Signed-off-by: Han Xu <b45815@freescale.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10misc: scu: Increase the timeout for MU communicationYe Li
When power on some sources in Video system, current timeout 10ms is too short and returns before SCU response. So increase the timeout to 1s. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10misc: fuse: Update imx8 fuse driver for 8QMYe Li
Add the second ECC fuse area for 8QM which is different with 8QXP Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: cpu: support tmuPeng Fan
Support tmu when print cpu info Signed-off-by: peng Fan <peng.fan@nxp.com>
2020-05-10imx: regs: add more fuse bank structurePeng Fan
Add more fuse bank structure for use. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx8mp: Set default SNSR25C for TMU probe1Ye Li
So far u-boot only load SNSR25C for TMU main probe (probe 0). However, kernel enables two probes. So it also needs to set default SNSR25C of TCALIV1 for blank samples. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: load calibration parameters from fuse for i.MX8MPYe Li
i.MX8MP thermal which has two probes and supports temperature range from -40 to 125. The driver still uses default 1p HW calibration at 25C and loads calibration parameters from fuse. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: i.MX8MN: Enable loading TASR and TCALIV from fuseYe Li
Like iMX8MM, iMX8MN also needs SW to load TMU TASR and TCALIV registers value from fuse before enabling TMU calibration. Otherwise the calibration is not exact. Reviewed-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx8mm: Load fuse for TMU TCALIV and TASRYe Li
On iMX8MM, the default value of TMU registers TCALIV and TASR need be loaded from fuse. HW won't do this, it expect SW loads them before using TMU. Reviewed-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10thermal: imx_tmu: support i.MX8MPPeng Fan
Support i.MX8MP thermal which has two probes and supports temperature range from -40 to 125. Still uses default 1p HW calibration at 25C and loads calibration parameters from fuse. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10thermal: imx_tmu: Check the TEMP range for iMX8MMPeng Fan
On iMX8MM, the V flag in TRISTR register only reflect the state of SNSR value, not the calibrated TEMP value. So checking this flag is not reliable. Per IC suggestion, change to read the TEMP/AVG_TEMP directly and check whether it in valid range 10-125C. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10thermal: imx_tmu: Fix for temperature out of rangePeng Fan
When the temperature is out of sensor's range, the Valid bit won't be set in TRITSR register. So the polling loop won't go out. Change the codes to retry 10 times with 100ms interval for the Valid bit. If the timeout, we give a warning for the invalid data. Modifed from Ye's NXP patch Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10thermal: imx_tmu: support TMU arch level initializationPeng Fan
i.MX8MM TMU needs to load some registers from fuse, this is arch dependent operation and may vary on different platforms. So add a interface for arch level initialization. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10thermal: imx_tmu: Add support for thermal sensor on iMX8MMPeng Fan
The analog sensors on iMX8MM are new, used for 14LPP process. So the Temperature Sensor Monitoring Unit (TMU) has some change accordingly. We use version 2 in TMU driver to represent the new TMU, so the one driver can service for both i.MX8MQ/M. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10thermal: Add thermal driver for i.MX8MPeng Fan
The driver is ported form Linux Kernel and support driver model. Users need to provide the tmu node and sensors nodes in DTB. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10thermal: imx_scu_thermal: Update driver for i.MX8QM thermal sensorYe Li
Add iMX8QM thermal compatible string and its driver data. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10eQos: Implement the read_rom_hwaddr callbackYe Li
Implement the read_rom_hwaddr callback to load MAC address from fuse for imx8m platforms. Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10fec: Move imx_get_mac_from_fuse declare to imx fileYe Li
imx_get_mac_from_fuse is used to load MAC address from fuse. On imx8mp, we have two different ENET controllers and both need to call this function. So decouple its declare from fec driver. Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: eqos: implement callbaks to get interface and set txclk rateFugang Duan
Implement the callbacks to get phy mode interface and txclk rate configuration. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: dwc_eth_qos: add dwc eqos for imx supportFugang Duan
Add dwc eqos for imx support. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: phy: realtek: add rx delay support for RTL8211FFugang Duan
Add RX delay enable support for RTL8211F PHY. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: Update eQos driver and FEC driver to use eth phy interfacesYe Li
Update eQoS and fec ethernet drivers to support shared MDIO framework Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: Add eth phy generic driver for shared MDIOYe Li
For dual ethernet controllers, the HW design may connect ETH phys to one MDIO ports. So two different ethernet drivers have to share MDIO bus. Since two ethernet drivers are independent, we can't ensure their probe order. To resolve this problem, introduce an eth phy generic driver and uclass. After eth-uclass binds, we search the mdio node and binds the phy node with the eth-phy-generic driver. When one eth driver get its phy device, the parent of phy device will probe prior than phy device. So this ensure the eth driver ownes the MDIO bus will be probed before using its MDIO. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: eth-uclass: add return value checkPeng Fan
Add return value check Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10pinctrl: nxp: scu: Check the pad partition before set pinmuxYe Li
If a pad is not owned by current partition we should not set its pinmux. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx8mq_phanbell: Run SPL with caches enabledFabio Estevam
It is safe to run SPL with caches enabled on i.MX8M, so remove such restriction. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-05-10net: fec: add fuse checkPeng Fan
Add fuse check for fec. If the fuse indicates the module will not work in the SoC, let's fail the initialization. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-10usb: mx6: add fuse checkPeng Fan
Add fuse check for USB. If the fuse indicates the module will not work in the SoC, let's fail the initialization. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10i2c: mxc: add fuse checkPeng Fan
Add fuse check for I2C. If the fuse indicates the module will not work in the SoC, let's fail the initialization. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: add module fuse supportPeng Fan
There are different parts from one SoC. Take i.MX6ULL for example, some part might not have ENET, some might have; some might not have USB, some might have. The information could be got from OCOTP, to make one image support the different parts, we need runtime disable linux kernel dts node and uboot driver probe if the corresponding module not exists in the part. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10ARM: imx: pico-imx8mq: Add support for Technexion Pico-iMX8MQMarek Vasut
Add initial support for Technexion Pico-iMX8MQ SoM on PicoPI carrier board. Currently working is ethernet, serial, eMMC. DT is imported from Linux 5.4.28 ("462afcd6e7ea") . Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-05-10Merge branch 'master' of git://git.denx.de/u-bootStefano Babic
2020-05-10cmd: efidebug: fix -Werror=type-limits warningHeinrich Schuchardt
Compiling with -Wtype-limits yields: cmd/efidebug.c:968:32: error: comparison is always false due to limited range of data type [-Werror=type-limits] 968 | if (*endp != '\0' || bootnext > 0xffff) { | Remove the superfluous check. Fixes: 59df7e7e77e7 ("cmd: add efidebug command") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-09net: ethernet: ti: am65-cpsw-nuss: enable 10Mbps link speed in rgmii modeMurali Karicheri
In RGMII mode the 10Mbps link speed is supported only when CPSW2G MAC SL is configured for External Control ("in band") mode CPSW_PN_MAC_CONTROL_REG.CTL_EN(18) = 1 Hence update am65_cpsw_update_link() to follow documentation. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-05-09configs: ti: Fix usage of undefined variable overlay_filesSuman Anna
The env variable overlay_files is used while adding the environment support commands for FIT loading, but it was cleaned up just prior in commit ee53b59511a6 ("configs: Remove unneeded overlay_files environment variable"). Fix this by replacing the undefined variable with the proper name_overlays env variable. Fixes: 76470b6929d5 ("configs: ti: Add environment support commands for FIT loading") Signed-off-by: Suman Anna <s-anna@ti.com>
2020-05-09doc: add Unicode functions to API descriptionHeinrich Schuchardt
Add include/charset.h to generated HTML documentation Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-09lib: charset: correct function descriptionsHeinrich Schuchardt
Change function descriptions to match kernel doc style. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>