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2015-04-21QE/DeepSleep: add QE deepsleep support for mpc85xxZhao Qiang
Muram will power off during deepsleep, and the microcode of qe in muram will be lost, it should be reload when resume. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21drivers:usb: Check if USB Erratum A005697 is applicable on BSC913xNikhil Badola
Check if USB Erratum A005697 is applicable on BSC913x and add corresponding property in the device tree via device tree fixup which is used by linux driver Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21pci/layerscape: fix link and class issues to support ls2085aMinghuan Lian
1. LS2085a provides PCIE_LUT_DBG register rather than PCIE_LDBG to show the link status, so the patch fixes it. 2. Increase the delay time to make sure that link training has finished. 3. Return invalid value when accessing multi-function device 4. For LS2085a DBI_RO_WR_EN bit is cleared as default, so we must set this bit before change DBI register value. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21pci/layerscape: remove unnecessary pcie_layerscape.hMinghuan Lian
The patch uses the common function name ft_pci_setup to replace ft_pcie_setup, then removes unnecessary pcie_layerscape.h because all the functions have been declared in common.h. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21drivers:usb:fsl: Add affected SOCs for USB Erratum A007792Nikhil Badola
Add following affected SOCs and their personalities for USB Erratum A007792 : T1040 Rev 1.1 T1024 Rev 1.0 Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21drivers:usb: Add device-tree fixup to identify socs having dual phyNikhil Badola
Identify soc(s) having dual phy so as to add "utmi_dual" as phy_mode for all these socs. This is required for supporting deel-sleep feature in linux for usb driver Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21Add bootscript support to esbc_validate.gaurav rana
1. Default environment will be used for secure boot flow which can't be edited or saved. 2. Command for secure boot is predefined in the default environment which will run on autoboot (and autoboot is the only option allowed in case of secure boot) and it looks like this: #define CONFIG_SECBOOT \ "setenv bs_hdraddr 0xe8e00000;" \ "esbc_validate $bs_hdraddr;" \ "source $img_addr;" \ "esbc_halt;" #endif 3. Boot Script can contain esbc_validate commands and bootm command. Uboot source command used in default secure boot command will run the bootscript. 4. Command esbc_halt added to ensure either bootm executes after validation of images or core should just spin. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21ls102xa: ddr4: Use LPUART as console output to verify DCU driverAlison Wang
On QDS board with DDR4 DIMM, LPUART is used as console output to verify DCU driver. This patch adds ls1021aqds_ddr4_nor_lpuart_defconfig for this support. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21ls1021atwr: add hwconfig setting to do pin muxYao Yuan
Freescale LS1021ATWR share some pins. Hwconfig option is used to allows users to choose the pin functions. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> [York Sun: revised commit message] Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21arm/ls102xa:Add support of conditional workaround implementation as per SoC verAlison Wang
For LS102xA, some workarounds are only used in VER1.0, so silicon version detection are added for QDS and TWR boards. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21serial: pl01x: fix PL010 regressionLinus Walleij
commit aed2fbef5e9a0ab5a7cd01e742039a962f0b24ef "dm: serial: Tidy up the pl01x driver" caused a regression on (real hardware) PL010 by omitting to update the line control register when switching baudrate. Fix this by inlining the missing write to the baud control register. Also renaming the set_line_control() function to pl011_set_line_control() since this function is clearly PL011-specific, and it won't suffice to call that to set up line control. Tested on the Integrator/AP hardware. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-21kconfig: remove duplicated CMD_DNS optionAndrey Skvortsov
two CMD_DNS options were added by commit 60296a835cb17 ("commands: add more command entries in Kconfig") Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-04-20Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2015-04-20net: pch_gbe: Fix pch_gbe device nameBin Meng
The name "pch_gbe.%x" exceeds the limit of the name in the 'struct eth_device'. Rename it as just "pch_gbe". Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-04-20net: gem: Use correct type for castingMichal Simek
Use phys_addr_t which is used in function prototype in system.h. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-20net/phy: fixup for get_phy_idShengzhou Liu
commit 3c6928fd7b0f84 "net: phy: fix warnings with W=1" caused some PHYs(e.g. CS4315/CS4340) not working. This patch fixes the warning and make those special PHYs working as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2015-04-20net: phy: micrel: add support for KSZ8081MNXLuca Ellero
This patch adds a support for KSZ8081MNX in MII mode. Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com> Acked-by: Pavel Machek <pavel@denx.de>
2015-04-20mii: add read-modify-write option to mii commandTim James
When accessing PHY registers it is often desirable to only update selected bits, so it is necessary to first read the current value before writing back an modified value with the relevant bits updated. To simplify this and to allow such operations to be incorporated into simple shell scripts propose adding a 'modify' option to the existing mii command, which takes a mask indicating the bits to be updated in addition to a data value containing the new bits, ie, <updated> = (<data> & <mask>) | (<current> & ~<mask>). Signed-off-by: Tim <tim.james@macltd.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@konsulko.com> Cc: Tim <tim.james@macltd.com>
2015-04-20Update MAINTAINERS and git-mailrc for netJoe Hershberger
Update to my corporate email and make the supported filter and aliases more accurate. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-20net: rtl8169: Build warning fixes for 64-bitThierry Reding
Turn ioaddr into an unsigned long rather than a sized 32-bit variable. While at it, fix a couple of pointer to integer cast size mismatch warnings by casting through unsigned long going from pointers to integers and vice versa. Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-20net: phy: realtek: Disable interrupt on Realtek Ethernet PHY driversCodrin Ciubotariu
Some Realtek Ethernet PHYs, like RTL8211D(G/N) and RTL8211E(G), have interrupts enabled by default. If the interrupt is not treated later by the OS and the PHY's interrupt line is enabled and shared with other interrupts, the system will get an interrupt storm. This patch disables the interrupt for PHY devices that use one of the current Realtek Ethernet PHY drivers. Some of Realtek Ethernet PHYs, such as RTL8211B(L) have the interrupt masked. In this case, the functionality of the PHY should not be afected since this patch brings INER and INSR registers to their default values. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-20Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
2015-04-20powerpc/mpc8641hpcn: Move environment to avoid conflictScott Wood
U-Boot on this board grew a long time ago past the 384 KiB that it reserves for the U-Boot image, before the environment. Thus, saveenv overwrites the U-Boot image and bricks the board. I tried to find out when U-Boot grew beyond this point, but there is a long stretch in the history where this board did not build -- and AFAICT when it did fit in 384 KiB, it was missing vital features such as fdt support. Turning off CONFIG_VIDEO was not enough to make it fit. Thus, I don't think we have any choice other than to move the environment. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20board/t2080rdb: enable CONFIG_PHY_AQUANTIAShengzhou Liu
CONFIG_PHY_AQ1202 is no longer needed, use CONFIG_PHY_AQUANTIA. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20powerpc/mpc85xx: Remove some dead codeScott Wood
U-Boot does not have system calls (the services it exposes to standalone commands use a different mechanism), so the syscall handler is dead code. It's also broken code, as it assumes it is located at 0xc00 -- while even before the patch to stop relocating exception vectors to 0, U-Boot had the syscall at 0x900. The critical and machine check return paths are never called -- the regular exception return path is used instead, which works because xSRR0/1 have already been saved and can be restored via the regular SRR0/1 (we don't care too much in U-Boot about taking a critical/mcheck inside another exception prolog/epilog). Also remove a few other small unused functions. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20powerpc/mpc85xx: Don't relocate exception vectorsScott Wood
Booke does not require exception vectors to be located at address zero. U-Boot was doing so anyway, simply because that's how it had been done on other PPC. The downside of this is that once the OS is loaded to address zero, the exception vectors have been overwritten -- which makes it difficult to diagnose a crash that happens after that point. The IVOR setup and trap entry code is simplified somewhat as a result. Also, there is no longer a need to align individual exceptions on 0x100 byte boundaries. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20powerpc/t2080rdb: update ddr to support 1866MT/sShengzhou Liu
Support SODIMM D3XP12081XL10AA 1866MT/s on T2080RDB. Enable CONFIG_CMD_MEMTEST as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20T4240RDB: Enable CONFIG_SYS_CORTINA_FW_IN_NOR configChunhe Lan
Now cortina driver uses macro CONFIG_SYS_CORTINA_FW_IN_NOR to define that firmware of cortina driver is stored in the nor flash. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20board/t208xrdb: VID supportYing Zhang
The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20powerpc/t2080: enable erratum_a007186 for t2080 rev1.1Shengzhou Liu
T2080 rev1.1 also needs erratum a007186. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20qemu-ppce500: Add support for 64bit CCSR mapAlexander Graf
QEMU 2.3 changes the address layout of the CCSR map in the PV ppce500 machine to reside in higher address space. Unfortunately, this exposed a glitch in u-boot for ppce500: While providing a function to dynamically evaluate the CCSR region's position in physical address space, we never used it. Plus we forgot to support 64bit physical addresses. This patch fixes that mishap, making u-boot work fine with latest QEMU again. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20MPC8541/MPC8555: Enable SS_EN in DDR_SDRAM_CLK_CNLT registerCurt Brune
According to the MPC8555/MPC8541 reference manual the SS_EN (source synchronous enable) bit in the DDR_SDRAM_CLK_CNLT register must be set during initialization. >From section 9.4.1.8 of that manual: Source synchronous enable. This bit field must be set during initialization. See Section 9.6.1, "DDR SDRAM Initialization Sequence," details. 0 - Reserved 1 - The address and command are sent to the DDR SDRAMs source synchronously. In addition, Freescale application note AN2805 is also very clear that this bit must be set. This patch reverts a change introduced by commit 457caecdbca3df21a93abff19eab12dbc61b7897. Testing Done: Compiled targets CONFIG_TARGET_MPC8555CDS and CONFIG_TARGET_MPC8541CDS and inspected the generated assembly code to verify the SS_EN bit was being set. There is one extra instruction emitted: fff9b774: 65 29 80 00 oris r9,r9,32768 Compiled the CONFIG_TARGET_MPC8548CDS target and verified that no additional instructions were emitted related to this patch. Booted an image on a MPC8541 based board successfully. Signed-off-by: Curt Brune <curt@cumulusnetworks.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2015-04-20video, lg4573: add support for the lg4573 displayHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2015-04-20video, ipu: make ldb clock frequency overwritable through board codeHeiko Schocher
the ldb clock can be setup in board code (for example set through PLL5). Update the ldb_clock rate also through board code. This should be removed, if a clock framework is availiable. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
2015-04-20video, ipu: make ldb_clock configurableHeiko Schocher
make the ldb_clock configurable through the new define CONFIG_SYS_LDB_CLOCK. This is needed as the ldb clock is not always 650000000, for example on the aristainetos2 board, where the ldb clock derives from PLL5 clock. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
2015-04-19sandbox: add config_distro_defaults and config_distro_bootcmdSjoerd Simons
Make the sandbox setup more generic/examplary by including config_distro_defaults.h and config_distro_bootcmd.h. Among other things this makes it easy to test whether images will boot though with the standard distro bootcmds by running e.g: u-boot -c 'host bind 0 myimage.img ; boot' By default there are 2 target host devices to emulate device with multiple storage devices (e.g. internal ("host 0") and external ("host 1") and verify that the prioritization and fallbacks do work correctly. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19config: Add default client arch defines for intel architecturesSjoerd Simons
Define default PXE client architecture identifiers for IA32 (0x0 aka Intel x86PC) and Intel x86-64 (0x9 aka EFI x86-64). This prepares for usage for config_distro_defaults in the sandbox architecture Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2015-04-19pxe: Ensure all memory access is to mapped memorySjoerd Simons
Properly map memory through map_sysmem so that pxe can be used from the sandbox. Tested in sandbox as well as on jetson-tk1, odroid-xu3, snow as peach-pi boards Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19config_distro_bootcmd.h: Add shared block definition for the host interfaceSjoerd Simons
Define the common shared block environment for the host interface in preperation for the sandbox build to use config_distro_bootcmd. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2015-04-19sandbox: Implement host dev [device]Sjoerd Simons
A common pattern to check if a certain device exists (e.g. in config_distro_bootcmd) is to use: <interface> dev [device] Implement host dev [device] so this pattern can be used for sandbox host devices. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19sandbox: Renamed sb command to hostSjoerd Simons
As suggested by Simon Glass, rename the sb command to host but keep the old sb command as an alias Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19sandbox: Add support for bootzSjoerd Simons
Add dummy bootz_setup implementation allowing the u-boot sandbox to run bootz. This recognizes both ARM and x86 zImages to validate a valid zImage was loaded. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19sandbox: Split bootm code out into lib/bootmSjoerd Simons
Follow the convention of other architectures and move the platform specific linux bootm code into sandbox/lib/bootm.c. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19sandbox: only do sandboxfs for hostfs interfaceSjoerd Simons
Only do sandbox filesystem access when using the hostfs device interface, rather then falling back to it in all cases. This prevents confusion situations due to the fallback being taken rather then an unsupported error being raised. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-18Merge branch 'buildman' of git://git.denx.de/u-boot-x86Tom Rini
2015-04-18patman: cover letter shows like 00/xx if more than 10 patchesWu, Josh
Make cover letter shows like 0/x, 00/xx and 000/xxx etc. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-18buildman: Make -V (verbose_build) really be verboseTom Rini
The help text for -V says we will pass V=1 but all it really did was not pass in -s. Change the logic to pass make V=1 with given to buildman -V or -s to make otherwise. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-18buildman: Keep more outputs with the --keep-outputs flagTom Rini
When told to keep outputs, be much more liberal in what files we keep. In addition to adding 'MLO', keep anything that matches u-boot-spl.* (so that we keep the map file as well) and anything we generate about 'u-boot itself. A large number of bootable formats now match this and thus it's easier to build many targets and then boot them afterwards using buildman. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-18buildman: Allow comparison of build configurationSimon Glass
It is useful to be able to see CONFIG changes made by commits. Add this feature to buildman using the -K flag so that all CONFIG changes are reported. The CONFIG options exist in a number of files. Each is reported individually as well as a summary that covers all files. The output shows three parts: green for additions, red for removals and yellow for changes. Signed-off-by: Simon Glass <sjg@chromium.org>