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2019-07-11spl: Fix typo in kernel docMiquel Raynal
Fix a tiny typo in boot_from_devices() kernel doc. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11test: pci_ep: add basic pci_ep testsRamon Fried
Add basic PCI endpoint sandbox testing. Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11pci_ep: add pci endpoint sandbox driverRamon Fried
Add a dummy PCI endpoint for sandbox. Supporting only a single function, it allows setting and reading header configuration. Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11pci_ep: add Cadence PCIe endpoint driverRamon Fried
Add Cadence PCIe endpoint driver supporting configuration of header, bars and MSI for device. Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11drivers: pci_ep: Introduce UCLASS_PCI_EP uclassRamon Fried
Introduce new UCLASS_PCI_EP class for handling PCI endpoint devices, allowing to set various attributes of the PCI endpoint device, such as: * configuration space header * BAR definitions * outband memory mapping * start/stop PCI link Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11arm: mvebu: set 38x and 39x AVS on lower frequencyBaruch Siach
Reduce Auto Voltage Scaling VDD limit when core frequency is lower than 1600MHz. This reduces core voltage level from 1.25V to 1.15V, which saves power. The code is taken from Marvell's U-Boot 2013.01 revision 18.06. Reviewed-by: Chris Packham <judge.packham@gmail.com> Tested-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11km/spi: remove deprecated SPI flash driver code for KM Kirkwood boardsPascal Linder
KM Kirkwood boards now implement the driver model for its SPI flash interface. Therefore, the old board specific claim and release functions can be deleted. The preprocessor definition CONFIG_SYS_KW_SPI_MPP is yet unused as well. All its appearances and dependencies are removed in the kirkwood_spi driver, header files and finally the configuration whitelist. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11km/spi: activate driver model for SPI flash on KM Kirkwood boardsPascal Linder
The corresponding configurations are selected in the common Kconfig file. This is easier than changing every affected board default configuration file. The default configuration for the PORTL2 board, however, still needs some modifications to correctly use the driver model. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11km/spi: add SPI configuration to KM Kirkwood device treePascal Linder
In order to migrate the SPI flash interface to the driver model, the SPI configuration needs to be added in the KM Kirkwood device tree file. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11km/spi: overwrite kirkwood_spi weak functions for KM Kirkwood boardsPascal Linder
As the SPI NOR and NAND devices share the same hardware pins, the MPP configuration has to be changed when claiming/releasing the bus. The current configuration is saved when claiming and restored when releasing. Furthermore, a general-purpose output is used to switch the chip-select signal. This is now also implemented for the DM part of the kirkwood_spi driver. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11km/spi: add weak functions to kirkwood_spi driver (DM part)Pascal Linder
The weak functions, known from the legacy code, are added to the DM part as well. For this purpose, the release operation first needs to be implemented. KM Kirkwood boards will overwrite those weak functions to change the MPP configuration when claiming/releasing the bus, because the hardware pins are shared between the SPI NOR and NAND devices. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11km: modify Kconfig file organization for KM boardsPascal Linder
As preparation for the upcoming transferring of configurations from header files to Kconfig, a common Kconfig file for all KM boards was created. For the moment, it only sources the other three, more specific, Kconfig files. Therefore, the architecture Kconfig files now include the common Kconfig file. Also, the configuration selection for KM boards was moved from the architecture Kconfig files to the board specific Kconfig files. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Cc: Mario Six <mario.six@gdsys.cc> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11ARM: mvebu: Enable FIT support for db-xc3-24g4xgChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: crs305-1g-4s: Enable CMD_BOOTZ and increase SYS_BOOTM_LENLuka Kovacic
This change enables CMD_BOOTZ and increases SYS_BOOTM_LEN to make it easier to work with kernel images. Signed-off-by: Luka Kovacic <me@lukakovacic.xyz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: turris_omnia: fix rescue mode bootcmd bootargs settingMarek Behún
Rescue mode bootcmd currently only appends the "omniarescue" parameter to the bootargs variable. We do not want the user to be able to change rescue mode bootargs. Therefore change this so that bootcmd sets the bootargs variable in an absolute way (adding console device information and the omniarescue paramterer). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: turris_omnia: call pci_init from board init codeMarek Behún
We always want to enumerate PCIe devices, because withouth this they won't work in Linux. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: turris_omnia: prefer SCSI booting before USBMarek Behún
If SCSI and USB boot options are both available, try to boot from SCSI first. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: turris_omnia: remove unneeded macro from board configMarek Behún
This is not needed here since Omnia is using DM_PCI now. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: turris_omnia: change environment address in SPI flashMarek Behún
The U-Boot partition is 1 MiB and environment is 64 KiB. It does not make sense to have environment at 0xc0000 when it could be at 0xf0000 and we can have more space for U-Boot binary. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: turris_omnia: fix adapters MAC addressesMarek Behún
The board code reads MAC addresses from the ATSHA204A cryptochip. For compatibility reasons the ethernet adapters on this SOC are not enumerated in register address order. But when Omnia was first manufactured this was done differently. Change setting of MAC addresses to conform to the description on the stickers sticked on actual Omnias. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: turris_omnia: set default ethernet adapterMarek Behún
Set default value for the ethact variable to the WAN port. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: clearfog: document boot from SATABaruch Siach
Document the main U-Boot image offset when booting from SATA disk on the Clearfog board. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: clearfog: set U-Boot offset for SATA bootBaruch Siach
See the offset of U-Boot in raw SATA disk to the same value as the MMC offset. That is 0x140 sectors from the beginning of the SPL, which is 0x141 sectors from the beginning of the device (after the MBR sector). Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: clearfog: enable SATA in SPLBaruch Siach
Enable SATA peripherals in SPL to allow boot from SATA. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: add support for boot from SATABaruch Siach
Add the required Kconfig and macro definitions to allow boot from SATA on Armada 38x systems. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11arm: mvebu: fix ahci mbus config in SPLBaruch Siach
SPL does not initialize mbus_dram_info. Don't change the ahci mbus settings of the ROM. This allows the ahci to work in SPL. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11spl: sata: don't force FS_FAT supportBaruch Siach
Allow the code to build when FS_FAT is not enabled, and thus spl_load_image_fat() is not provided. A subsequent patch should add alternative raw access U-Boot main image load method. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11spl: sata: fix build with DM_SCSIBaruch Siach
The init_sata() routine is only present when DM_SCSI is not enabled. Don't call init_sata() when DM_SCSI is enabled. The code will fall back to scsi_scan() in this case. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11spl: sata: add default partition and image nameBaruch Siach
Add sensible defaults for the FAT partition selection and the main U-Boot image file name. This allows spl_sata to build when the board headers does not select them explicitly. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-10trace: trace buffer may exceed 2GiBHeinrich Schuchardt
Correct the debug output for the trace buffer size to accommodate trace buffers exceeding 2GiB. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10trace: do not limit trace buffer to 2GiBHeinrich Schuchardt
There is no good reason to limit the trace buffer to 2GiB on a 64bit system. Adjust the types of the relevant parameters. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10drivers: pci: add API to issue FLR on a PCI function if supportedAlex Marginean
Adds dm_pci_flr API that issues a Function Level reset on a PCI-e function, if FLR is supported. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10test: dm: Add a test for PCI Enhanced AllocationAlex Marginean
This test is built on top of the existing swap_case driver. It adds EA capability structure support to swap_case and uses that to map BARs. BAR1 works as it used to, swapping upper/lower case. BARs 2,4 map to a couple of magic values. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10drivers: pci: add map_bar support for Enhanced AllocationAlex Marginean
Makes dm_pci_map_bar API available for integrated PCI devices that support Enhanced Allocation instead of the original PCI BAR mechanism. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10pci: fixed dm_pci_map_bar commentAlex Marginean
The comment now indicates that the input argument bar is a register offset, not a BAR index. It also mentions which BARs are supported for type 0/1 and that the function can return 0 on error. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10trace: make call depth limit customizableHeinrich Schuchardt
Up to now we had hard coded values for the call depth up to which trace records are created: 200 for early tracing, 15 thereafter. UEFI applications reach a call depth of 80 or above. Provide customizing settings for the call trace depth limit and the early call trace depth limit. Use the old values as defaults. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10trace: conserve gd registerHeinrich Schuchardt
An UEFI application may change the value of the register that gd lives in. But some of our functions like get_ticks() access this register. So we have to set the gd register to the U-Boot value when entering a trace point and set it back to the application value when exiting the trace point. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10trace: undefined reference to `trace_early_init'Heinrich Schuchardt
Compiling with TRACE but without TRACE_EARLY results in an error aarch64-linux-gnu-ld.bfd: common/built-in.o:(.rodata.init_sequence_f+0x10): undefined reference to `trace_early_init' trace_early_init() should not be called if CONFIG_TRACE_EARLY is not defined. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10dm: doc: add documentation for pre-reloc properties in SPL and TPLPatrick Delaunay
Add documentation for the pre-reloc property in SPL and TPL device-tree: - u-boot,dm-pre-proper - u-boot,dm-pre-reloc - u-boot,dm-spl - u-boot,dm-tpl Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10fdt: Allow indicating a node is for U-Boot proper onlyPatrick Delaunay
This add missing parts for previous commit 06f94461a9f4 ("fdt: Allow indicating a node is for U-Boot proper only") At present it is not possible to specify that a node should be used before relocation (in U-Boot proper) without it also ending up in SPL and TPL device trees. Add a new "u-boot,dm-pre-proper" boolean property for this. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10test: check u-boot properties in SPL device treePatrick Delaunay
Add a test to check the management of the U-boot relocation properties for device tree SPL generation (fdtgrep result) and platdata: - 'dm-pre-proper' and 'dm-tpl' not included in SPL - 'dm-pre-reloc' and 'dm-spl' included in SPL Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10fdtdec: test: Fix memory leakThierry Reding
Free the memory allocated to store the test FDT upon test completion to avoid leaking the memory. We don't bother cleaning up on test failure since the code is broken in that case and should be fixed, in which case the leak would also go away. Reported-by: Tom Rini <tom.rini@gmail.com> Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10drivers: serial: lpuart: Enable Little Endian SupportVabhav Sharma
By default LPUART driver with compatible string "fsl,ls1021a-lpuart" support big-endian mode.On NXP SoC like LS1028A LPUART IP is little-endian,Added support to Fetch LPUART IP Endianness from lpuart device-tree node. Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10spi: Avoid using malloc() in a critical functionSimon Glass
In general we should avoid calling malloc() and free() repeatedly in U-Boot lest we turn it into tianocore. In SPL this can make SPI flash unusable since free() is often a nop and allocation space is limited. In any case, these seems no need for malloc() since the number of bytes is very small, perhaps less than 8. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: d13f5b254a (spi: Extend the core to ease integration of SPI memory controllers)
2019-07-10blk: Allow control of the block cache in TPLSimon Glass
Generally block devices are not enabled in TPL, but in case they are, add a Kconfig option for the block cache. This allows the setting (default off) to be found with CONFIG_IS_ENABLED(). Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10bootstage: Add support for TPL record countSimon Glass
If bootstage is enabled in TPL it lacks a record count and so does not build. Fix this by adding a new Kconfig option. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10x86: Add a forward struct declaration in coreboot_tables.hSimon Glass
This struct is not defined in this header file. Add a forward declaration so that it can be included in any context. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10sandbox: Add documentation on how to run valgrindSimon Glass
U-Boot sandbox can run with valgrind to check memory allocations. Add documentation on how to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10sandbox: Correct spi flash operationSimon Glass
Since the SPI nor conversion, 'sf probe' does not work on sandbox. Fix this by using the expected compatible string in the flash node. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: cd35365762 (mtd: sf_probe: remove spi-flash compatible)
2019-07-10sandbox: Add a memory {} nodeSimon Glass
Add a memory node which indicates the size of sandbox memory. Signed-off-by: Simon Glass <sjg@chromium.org>
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