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2018-05-08board: sama5d2_ptc_ek: adjust the smc timings of nandEugen Hristev
To fix the issue of write the rootfs.ubi, adjust the smc timings configuration of the nand controller. Based on original work by Wenyou Yang Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08gpio: atmel_pio4: give a full configuration when muxing pinsLudovic Desroches
When a pin is muxed to a peripheral or as a GPIO, the only configuration that can be set is the pullup. It is too restrictive so this patch allows to give a full configuration. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08board: atmel: sama5d2_ptc_ek: update pin configuration for NANDLudovic Desroches
The drive strength has to be set to medium for the NAND data lines. With a low drive, we can get some data corruption. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08gpio: atmel_pio4: add drive strength macrosLudovic Desroches
Macros for drive strength configuration were missing. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08pci: intel: Add Intel FPGA PCIe controller driverLey Foon Tan
Add PCIe driver for Intel FPGA PCIe IP. This driver operates the PCIe IP in rootport mode only, the EP mode is not supported. The driver is tested with the Intel e1000e NIC driver. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-08arm64: Add SMC and HVC commandsMichalis Pappas
This patch adds smc and hvc commands, that allow issuing Secure Monitor Calls and Hypervisor Calls conforming to the ARM SMC Calling Convention. Add Kconfig items to allow each command can be individually enabled. Signed-off-by: Michalis Pappas <mpappas@fastmail.fm> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08pinctrl: meson: Update pinmux with new Linux bindingsNeil Armstrong
The pinctrl bindings has changed for Amlogic Meson SoCs since Linux 4.13, update the pinctrl driver to take this in account. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08ARM64: meson: Sync DT and Bindings with Linux 4.16Neil Armstrong
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.16.0. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08ARM: meson: rename GXBB to GXNeil Armstrong
Taking into account the Amlogic Family name starts with GX, including the GXBB, GXL and GXM SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08clk: clk_stm32f: Use PLLSAIP as USB 48MHz clockPatrice Chotard
On all STM32F4 and F7 SoCs family (except STM32F429), PLLSAI output P can be used as 48MHz clock source for USB and SDMMC. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Tested By: Bruno Herrera <bruherrera@gmail.com>
2018-05-08dm: led: add testcase for "default-state" propertyPatrick Bruenn
Add two more gpio-leds to sandbox test device tree with default-state property set to "on"/"off". Add dm_test_led_default_state() to check that these new LED's are set to LEDST_ON and LEDST_OFF. dm: led: add testcase for "default-state" property Add two more gpio-leds to sandbox test device tree with default-state property set to "on"/"off". Add dm_test_led_default_state() to check that these new LED's are set to LEDST_ON and LEDST_OFF. Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08dm: led: auto probe() LEDs with "default-state"Patrick Bruenn
To avoid board specificy LED activation code, automatically activate gpio-leds with "default-state" property during bind(). Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08dm: led: Support "default-state" propertyPatrick Bruenn
Add support for the device tree property "default-state". This feature might be useful for LEDs indicating "power on" or similar states. Note: Even with this commit gpio-leds remain in reset state. That's because the led_gpio is not probed until DM_FLAG_ACTIVATED is set. Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08mmc: support writing sparse imagesJassi Brar
Provide an alternate path for sparse-images to be written to MMC. For example, via tftp on platforms that don't support fastboot protocol. Or when an image is to written at some offset, rather than the start of a partition. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> [trini: Guard with CONFIG_FASTBOOT_FLASH tests, use LBAF for lbaint_t printing] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-08power: pwm regulator: support live treeAndy Yan
Use live tree compatible api for pwm regulator. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2018-05-08dm: mmc: socfpga: call dwmci_probe()Patrick Bruenn
On a socfpga_cyclone5 based board the SD card, was never powered up. For other dw_mmc based SoCs dwmci_probe() is called in the platform specific probe(). It seems this call is missing for socfpga_dw_mmc. With this change DWMCI_PWREN is set by dmwci_init(). Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08mmc: Kconfig: add the MMC_TRACE config in KconfigJaehoon Chung
Add the MMC_TRACE config in Kconfig. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08mmc: add the debug message in mmc_set_clockJaehoon Chung
Add the debug message for checking the mmc clock status. It's helpful to debug the controlling clock. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08mmc: add the MMC_CLK_ENABLE/DISABLE macro in mmc.hJaehoon Chung
mmc_set_clock() function has the disable argument as bool type. When mmc_set_clock is called, it might be passed to "true" or "false". But it's too confusion whether clock is enabled or disabled with only "true" and "false". To prevent the confusion, replace to MMC_CLK_ENABLE/DISABLE macro from true/false. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08lib: fdtdec: drop the old compatible about max77686Jaehoon Chung
Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2018-05-08power: pmic_max77686: remove the old pmic_max77686 fileJaehoon Chung
max77686 pmic is supporting with max77686.c under pmic/ and regulator/ direnctroy. Remove pmic_max77686.c what didn't use anywhere. Instead, enable CONFIG_DM_REGULATOR_MAX77686 and CONFIG_DM_PMIC_MAX77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08configs: trats2: enable the max77686 regulator configJaehoon Chung
Enable the CONFIG_DM_REGULATOR_MAX77686 for using regulator driver. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08ARM: uniphier: enable CONFIG_PINCONFMasahiro Yamada
Enable the pin configuration feature for UniPhier 64 bit SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08pinctrl: uniphier: add ethernet TX pin data for LD20Masahiro Yamada
These are necessary to optimize the drive-strength of the pins. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08pinctrl: uniphier: support drive-strength configurationMasahiro Yamada
This allows our DT to specify drive-strength property. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08pinctrl: uniphier: support per-pin configuration via DTMasahiro Yamada
Currently, the UniPhier pinctrl drivers expose only the pin-group interface to device tree. Provide .get_pins_count, .get_pin_name, .pinconf_set hooks to support pin configuration via 'pins' DT property. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08pinctrl: uniphier: include <linux/build_bug.h> instead of <linux/bug.h>Masahiro Yamada
The #include <linux/bug.h> is here to use BUILD_BUG_ON_ZERO(). By replacing it with <linux/build_bug.h>, we can reduce the number of headers pulled in. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08pinctrl: uniphier: replace printf() with dev_err()Masahiro Yamada
dev_err() is more suitable for printing error messages. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08pinctrl: uniphier: remove unneeded pin data of LD6b SoCMasahiro Yamada
Since commit f73cfb4d0dee ("pinctrl: uniphier: simplify input enable and delete pin arrays"), these data are no longer used in any useful way. Remove. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07fastboot: sparse: make write_sparse_image useable for non-fastbootJassi Brar
write_sparse_image could be useful for non-fastboot users. For ex a platform, without usb-device/fastboot support, could get sparse images over tftp and write using the mmc command. Or non-android systems could also leverage the sparse format. Towards that, this patch removes anything fastboot specific from the write_sparse_image implementation. Which includes making the function return integer as error code and calls for fastboot logging via an optional callback function 'mssg'. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-05-07fastboot: sparse: remove redundant argument to write_sparse_imageJassi Brar
'sz' has no use for write_sparse_image, remove it simplifying the api. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-05-07arm: v7R: Add support for enabling cachesLokesh Vutla
Cache maintenance procedure is same for v7A and v7R processors. So re-use cache-cp15.c file except for mmu parts. Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-07arm: v7R: Add support for MPULokesh Vutla
The Memory Protection Unit(MPU) allows to partition memory into regions and set individual protection attributes for each region. In absence of MPU a default map[1] will take effect. Add support for configuring MPU on Cortex-R, by reusing the existing support for Cortex-M processor. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/I1002400.html Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-07arm: v7R: Add initial supportMichal Simek
The Cortex-R* processors are a mid-range CPUs for use in deeply-embedded, real-time systems. It implements the ARMv7-R architecture, and includes Thumb-2 technology for optimum code density and processing throughput. Except for MPU(Memory Protection Unit) and few CP15 registers, most of the features are compatible with v7 architecture. So,reuse the same armv7 folder and introduce a new config CPU_V7R in order to differentiate from v7 based platforms. Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07arm: v7: Kconfig: Introduce SYS_ARM_CACHE_CP15Lokesh Vutla
Certain ARM architectures like ARMv7-A, ARMv7-R has support for enabling caches using CP15 registers. To have a common support for all these architectures, introduce a Kconfig symbol SYS_ARM_CACHE_CP15 that selects cache-cp15.c Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07arm: v7: Kconfig: Add entry for MMULokesh Vutla
Add a Kconfig entry for MMU and imply for all platforms using cache-cp15.c containing MMU setup. Using imply instead of select so that MMU can be disabled by defconfigs when not needed. Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07arm: v7: Kconfig: Rename CPU_V7 as CPU_V7ALokesh Vutla
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under armv7 folder. This led to a misconception of creating separate folders for armv7m and armv7r. There is no reason to create separate folder for other armv7 based architectures when it can co-exist with few Kconfig symbols. As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and can co exist in the same folder. Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07arm: v7: Update VBAR only if availableLokesh Vutla
Not all ARM V7 based cpus has VBAR for remapping vector base address. So, update VBAR only if it available. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07test: ofnode: test ofnode_device_is_compatible()Masahiro Yamada
Test ofnode_device_is_compatible(), and also ofnode_path(). Requested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07test: regmap: test Linux-compatible syscon_node_to_regmap()Masahiro Yamada
Like Linux, syscon_node_to_regmap() allows a node to work as a syscon provider without binding it to a syscon driver. Test this. Requested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07syscon: add Linux-compatible syscon APIMasahiro Yamada
The syscon implementation in U-Boot is different from that in Linux. Thus, DT files imported from Linux do not work for U-Boot. In U-Boot driver model, each node is bound to a dedicated driver that is the most compatible to it. This design gets along with the concept of DT, and the syscon in Linux originally worked like that. However, Linux commit bdb0066df96e ("mfd: syscon: Decouple syscon interface from platform devices") changed the behavior because it is useful to let a device bind to another driver, but still work as a syscon provider. That change had happened before U-Boot initially supported the syscon driver by commit 6f98b7504f70 ("dm: Add support for generic system controllers (syscon)"). So, the U-Boot's syscon works differently from the beginning. I'd say this is mis-implementation given that DT is not oriented to a particular project, but Linux is the canon of DT in practice. The problem typically arises in the combination of "syscon" and "simple-mfd" compatibles. In Linux, they are orthogonal, i.e., the order between "syscon" and "simple-mfd" does not matter at all. Assume the following compatible. compatible = "foo,bar-syscon", "syscon", "simple-mfd"; In U-Boot, this device node is bound to the syscon driver (driver/core/syscon-uclass.c) since the "syscon" is found to be the most compatible. Then, syscon_get_regmap() succeeds. However, compatible = "foo,bar-syscon", "simple-mfd", "syscon"; does not work because this node is bound to the simple-bus driver (drivers/core/simple-bus.c) in favor of "simple-mfd" compatible. The compatible string "syscon" is just dismissed. Moreover, compatible = "foo,bar-syscon", "syscon"; works like the first case because the syscon driver populates the child devices. This is wrong because populating children is the job of "simple-mfd" (or "simple-bus"). This commit ports syscon_node_to_regmap() from Linux. This API does not require the given node to be bound to a driver in any way. Reported-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07regmap: change regmap_init_mem() to take ofnode instead udeviceMasahiro Yamada
Currently, regmap_init_mem() takes a udevice. This requires the node has already been associated with a device. It prevents syscon/regmap from behaving like those in Linux. Change the first argumenet to take a device node. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07dm: ofnode: add ofnode_device_is_compatible() helperMasahiro Yamada
device_is_compatible() takes udevice, but there is no such a helper that takes ofnode. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07regmap: clean up regmap allocationMasahiro Yamada
Putting zero length array at the end of struct is a common technique to embed arbitrary length of members. There is no good reason to let regmap_alloc_count() branch by "if (count <= 1)". As far as I understood the code, regmap->base is an alias of regmap->ranges[0].start, but it is not helpful but make the code just ugly. Rename regmap_alloc_count() to regmap_alloc() because the _count suffix seems pointless. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: fixup cpu_info-rcar.c] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07psci: arm: remove armv7 function psci_save_target_pcPatrick Delaunay
This function is no more used, and replaced by psci_save which save also context id as requested by PSCI requirements. Even if the context id is not used by Linux, it should be saved and restored in r0 when the CPU_ON is performed. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07sunxi: psci: save context id in cpu_on commandPatrick Delaunay
Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07uniphier: psci: save context id in cpu_on commandPatrick Delaunay
Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07tegra: psci: save context id in cpu_on commandPatrick Delaunay
Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-05-07imx7: psci: save context id in cpu_on commandPatrick Delaunay
Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07ls102xa: psci: save context id in cpu_on commandPatrick Delaunay
Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>