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2018-02-19mmc: omap_hsmmc: Reduce the max timeout for reset controller fsmJean-Jacques Hiblot
>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines reset procedure section in TRM suggests to first poll the SRD/SRC bit until it is set to 0x1. But looks like that bit is never set to 1 and there is an observable delay of 1sec everytime the driver tries to reset DAT/CMD. (The same is observed in linux kernel). Reduce the time the driver waits for the controller to set the SRC/SRD bits to 1 so that there is no observable delay. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: Workaround for errata id i802Jean-Jacques Hiblot
According to errata i802, DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure. The DCRC interrupt, occurs when the last tuning block fails (the last ratio tested). The delay from CRC check until the interrupt is asserted is bigger than the delay until assertion of the tuning end flag. Assertion of tuning end flag is what masks the interrupts. Because of this race, an erroneous DCRC interrupt occurs. The suggested workaround is to disable DCRC interrupts during the tuning procedure which is implemented here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: Add tuning supportJean-Jacques Hiblot
HS200/SDR104 requires tuning command to be sent to the card. Use the mmc_send_tuning library function to send the tuning command and configure the internal DLL. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: Enable DDR mode supportKishon Vijay Abraham I
In order to enable DDR mode, Dual Data Rate mode bit has to be set in MMCHS_CON register. Set it here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: set MMC mode in the UHSMS bit fieldJean-Jacques Hiblot
Use the timing parameter set in the MMC core to set the mode in UHSMS bit field. This is in preparation for adding HS200 support in omap hsmmc driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: add support to set default io voltageKishon Vijay Abraham I
"ti,dual-volt" is used in linux kernel to set the voltage capabilities. For host controller dt nodes that doesn't have "ti,dual-volt", it's assumed 1.8v is the io voltage. This is not always true (like in the case of beagle-x15 where the io lines are connected to 3.3v). Hence if "no-1-8-v" property is set, io voltage will be set to 3v. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: cleanup omap_hsmmc_set_iosKishon Vijay Abraham I
No functional change. Move bus width configuration setting to a separate function and invoke it only if there is a change in the bus width. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: cleanup clock configurationJean-Jacques Hiblot
Add a separate function for starting the clock, stopping the clock and setting the clock. Starting the clock and stopping the clock can be used irrespective of setting the clock (For example during iodelay recalibration). Also set the clock only if there is a change in frequency. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: use pr_* log functionsMasahiro Yamada
Use pr_* log functions from Linux. They can be enabled/disabled via CONFIG_LOGLEVEL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-19mtd: ubi: Fix worker handlingRichard Weinberger
Fixes a bug found on thuban boards, which were for 2 years in a long-term test with varying temperatures. They showed problems in u-boot when attaching the ubi partition: U-Boot# run flash_self_test Booting from nand set A... UBI: attaching mtd1 to ubi0 UBI: scanning is finished data abort pc : [<87f97c3c>] lr : [<87f97c28>] reloc pc : [<8012cc3c>] lr : [<8012cc28>] sp : 85f686e8 ip : 00000020 fp : 000001f7 r10: 8605ce40 r9 : 85f68ef8 r8 : 0001f000 r7 : 00000001 r6 : 00000006 r5 : 0001f000 r4 : 85f6ecc0 r3 : 00000000 r2 : 44e35000 r1 : 87fcbcd4 r0 : 87fc755b Flags: nZCv IRQs off FIQs on Mode SVC_32 Resetting CPU ... Reason is, that accidentially the U-Boot implementation from __schedule_ubi_work() did not check the flag ubi->thread_enabled and started with wearleveling work, but ubi did not have setup all structures at this point and crashes. Solve this problem by splitting work scheduling and processing. Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Heiko Schocher <hs@denx.de>
2018-02-19i2c: mvtwsi.c: Fix set speedStefan Mavrodiev
Previous patch for this driver breaks i2c initialization. commit 8bcf12ccce89 ("i2c: mvtwsi.c: Avoid NULL dereference") If actual_speed is passed as NULL in this function: static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed, int slaveadd, uint *actual_speed) than __twsi_i2c_set_bus_speed never get called. This causes i2c clock to run on default speed - 2MHz (measured with oscilloscope). This is issue on some boards, sunxi for example, since on I2C0 bus PMU is connected. The bootlogs with and without the patch are as follows: Wihtout the patch: U-Boot SPL 2018.03-rc2 (Feb 13 2018 - 09:23:17 +0200) DRAM: 1024 MiB Failed to set core voltage! Can't set CPU frequency Trying to boot from FEL U-Boot 2018.03-rc2 (Feb 13 2018 - 09:23:17 +0200) Allwinner Technology CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 With the patch: U-Boot SPL 2018.03-rc2-00001-g838ff85 (Feb 13 2018 - 09:24:34 +0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from FEL U-Boot 2018.03-rc2-00001-g838ff85 (Feb 13 2018 - 09:24:34 +0200) Allwinner Technology CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2018-02-18sandbox: Add 64-bit sandboxMario Six
To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-18sandbox: Rename 'num-gpios' property to avoid dtc warningSimon Glass
At present dtc produces these warnings when compiling sandbox: arch/sandbox/dts/test.dtb: Warning (gpios_property): Could not get phandle node for /base-gpios:num-gpios(cell 0) arch/sandbox/dts/test.dtb: Warning (gpios_property): Missing property '#gpio-cells' in node /reset-ctl or bad phandle (referred from /extra-gpios:num-gpios[0]) Both are due to it assuming that the 'num-gpios' property holds a phandle pointing to a GPIO node. To avoid these warnings, rename the sandbox property so that it does not include the string 'gpios'. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-18sandbox: Correct dtc warning in /chosen nodeSimon Glass
At present dtc produces these warnings when compiling sandbox: arch/sandbox/dts/test.dtb: Warning (reg_format): "reg" property in /chosen/chosen-test has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #address-cells value for /chosen/chosen-test arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #size-cells value for /chosen/chosen-test Add the missing properties to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: f200680 (dm: core: parse chosen node)
2018-02-18fdt: Fixup only valid memory banksThierry Reding
Memory banks with address 0 and size 0 are empty and should not be passed to the OS via device tree. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2018-02-18fdt: Implement weak arch_fixup_fdt()Alexey Brodkin
Only ARM and in some configs MIPS really implement arch_fixup_fdt(). Others just use the same boilerplate which is not good by itself, but what's worse if we try to build with disabled CONFIG_CMD_BOOTM and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was apparently implemented in arch/xxx/lib/bootm.c. Now with weak arch_fixup_fdt() right in image-fdt.c where it is used we get both items highlighted above fixed. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-18mx6sabresd: Select the CONFIG_EFI_PARTITION optionFabio Estevam
With fastboot support enabled, it is useful to be able to list the eMMC EFI partitions, so select the CONFIG_EFI_PARTITION option. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-18mx6: fix MAINTAINERS for Engicam i.CoreM6 1.5 MIPIStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jagan Teki <jagan@amarulasolutions.com>
2018-02-18net: sh_eth: Fix DT base address fetchingMarek Vasut
Drop the whole map/unmap_physmem stuff and just use the address already obtained from DT in ofdata_to_platdata(), instead of repeating that, wrongly, in probe. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18net: sh_eth: Fix checkpatch warningMarek Vasut
Fix minor checkpatch warning about udelay(3000) being too long and should be replaced by mdelay(3). Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18net: sh_eth: Return directly from sh_eth_recv_startMarek Vasut
Drop the len variable, it's useless. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18net: sh_eth: Zap port variableMarek Vasut
Inline this variable which is quite useless. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-17Merge git://git.denx.de/u-boot-shTom Rini
2018-02-17ARM: rmobile: Fix broken reset code on PorterMarek Vasut
The 'reset' command did not work on Porter because the reset code was accessing the wrong PMIC address over broken I2C bus driver. Replace the code with DM-aware code and fix up the PMIC address. This makes the 'reset' command work again. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17ARM: rmobile: Replace SH I2C with IIC on PorterMarek Vasut
Get rid of the SH I2C driver on Porter and enable the IIC driver instead . The old SH I2C is completely broken on Porter anyway and the DM/DT capable IIC driver allows access to the PMIC too. Use the DM/DT capable driver instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17ARM: dts: rmobile: Enable I2C6 on PorterMarek Vasut
Enable I2C6 bus on Porter to access the PMIC , ie. to reset the board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17i2c: rcar_iic: Allow IIC on RCar Gen2Marek Vasut
The IIC on Gen2 is compatible with this driver as well, allow it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17ARM: rmobile: Set FDT/initramfs limits on PorterMarek Vasut
Set those limits to inform U-Boot about FDT and initramfs placement. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17ARM: rmobile: Enable convenient commands on PorterMarek Vasut
Enable cache and time commands, which are convenience tools for doing benchmarks and various boot tests. Also enable FIT support for booting fitImage. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17ARM: rmobile: Reset ethernet PHYMarek Vasut
Toggle the PHY reset GPIO to bring the ethernet PHY out of reset properly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- NOTE: This should be moved to the SH ethernet driver, but it's quite late in the cycle, so this is something to be done in 2018.05.
2018-02-17ARM: dts: rmobile: Move the u-boot,dm-pre-reloc into u-boot DTS on porterMarek Vasut
Fix ommission where the u-boot,dm-pre-reloc DT bit was pulled into the common DT, not the U-Boot specific DT part. Move it to U-Boot DT part. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16Merge git://git.denx.de/u-boot-shTom Rini
2018-02-16Merge git://git.denx.de/u-boot-socfpgaTom Rini
2018-02-16Merge git://git.denx.de/u-boot-usbTom Rini
2018-02-16env: restore old env_get_char() behaviourGoldschmidt Simon
With multiple environments, the 'get_char' callback for env drivers does not really make sense any more because it is only supported by two drivers (eeprom and nvram). To restore single character loading for these drivers, override 'env_get_char_spec'. Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-02-16env: Fix env_load_locationYork Sun
Commit 7d714a24d725 ("env: Support multiple environments") added static variable env_load_location. When saving environmental variables, this variable is presumed to have the value set before. In case the value was set before relocation and U-Boot runs from a NOR flash, this variable wasn't writable. This causes failure when saving the environment. To save this location, global data must be used instead. Signed-off-by: York Sun <york.sun@nxp.com> CC: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-16ARM: rmobile: Enable autocompletion on Gen2Marek Vasut
This makes the shell so much more pleasant to use, so enable it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16ARM: rmobile: Convert Porter to SPLMarek Vasut
Due to size limitations of the MERAM, switch U-Boot to SPL. The SPL is loaded by the SPI_LOADER into MERAM and then loads U-Boot proper into DRAM. This way U-Boot can freely grow in size in DRAM, as there is plenty of it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- NOTE: To update U-Boot, first install u-boot.img to 0x140000 in SPI NOR, then use the Minimon to flash u-boot-spl.srec using ls,2,e6304000. To generate u-boot-spl.srec, use objcopy: arm-linux-gnueabi-objcopy -O srec spl/u-boot-spl u-boot-spl.srec
2018-02-16ARM: dts: rmobile: Make PFC and RST available before relocMarek Vasut
Those two nodes are needed to configure pinmux before relocation and to configure clock before relocation, since CPG/MSSR needs access to RST node. This is not noticable on Gen3, but on Gen2 this causes problems in SPL if they are not available early. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16ARM: dts: rmobile: Make scif0 available before reloc on PorterMarek Vasut
Make the SCIF available before relocation and in SPL on R8A7791 Porter. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16serial: Replace CONFIG_ with CONFIG_IS_ENABLEDMarek Vasut
Cosmetic change, replace CONFIG_* with CONFIG_IS_ENABLED(*) . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16ARM: rmobile: Enable autocompletion on Gen3Marek Vasut
This makes the shell so much more pleasant to use, so enable it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16ARM: rmobile: Enable DTO support on Gen3Marek Vasut
Enable support for applying DT overlays on Gen3. This is convenient for handling extra additional hardware, like ie. the Kingfisher. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16net: ravb: Initialize PHY in probe() onceMarek Vasut
Reset and initialize the PHY once in the probe() function rather than doing it over and over again is start() function. This requires us to keep the clock enabled while the driver is in use. This significantly reduces the time between transfers as the PHY doesn't have to restart autonegotiation between transfers, which takes forever. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-16clk: rmobile: Assure SD-IF clock are configured correctlyMarek Vasut
The SD driver calls clk_set_rate() before clk_enable(), yet clk_set_rate() implementation in the clock driver does not set the SD-IF divider. Fix it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-15Merge git://git.denx.de/u-boot-arcTom Rini
2018-02-15RPi: Add myself as board maintainerAlexander Graf
Commit 958d55f26ce ("MAINTAINERS: Take over BCM2835 maintainership") put me in as maintainer for the RPi soc, but forgot to update the board MAINTAINERS file. Add me there too. Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-15arm: socfpga: use imply instead of select where applicableSimon Goldschmidt
Kconfig should only 'select' features that are required for an arch. Standard features that can be disabled without breaking board support should use 'imply' instead, to allow users to disable it. These options are changed for mach-socfpga: - DM_SPI & DM_SPI_FLASH: only required with QSPI support enabled - SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION: the boot rom supports a partitionless mode also, where SPL is located at address 0 - HW_WATCHDOG: while all mainline board defconfigs use it, U-Boot should still work without it. Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15Convert socfpga: select CONFIG_HW_WATCHDOG support for ARCH_SOCFPGALukasz Majewski
All Socfpga boards from ./include/configs/socfpga_* define CONFIG_HW_WATCHDOG. To ease CONFIG_HW_WATCHDOG conversion to Kconfig select it in config ARCH_SOCFPGA (arch/arm/Kconfig) section. Signed-off-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15arm: socfpga: fix qspi flash compatible (add "spi-flash")Simon Goldschmidt
This patch adds "spi-flash" to the compatible list of the qspi flash chip for all socfpga boards. This is required to make qspi work on these boards on top of the recent fixes. Without the "spi-flash" compatible string for the flash chip, the speed cannot be read and a speed of 0Hz is used (which results in a divide-by-zero on these boards). Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
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