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2008-01-09POST: Execute SPR test after relocationStefan Roese
On LWMON5 we now use d-cache as init-ram and stack. The SPR POST test uses self modifying code and this doesn't work with stack in d-cache, since I can't move the code from d-cache to i-cache. We move the SPR test to be executed a little later, after relocation. Then stack is located in SDRAM and this self-modifying code is no problem anymore. Signed-off-by: Stefan Roese <sr@denx.de>
2008-01-09ppc4xx: Change LWMON5 to not use OCM for init-ram and POST anymoreStefan Roese
This patch configures the LWMON5 port to use d-cache as init-ram and the unused GPT0_COMP6 as POST WORD storage. Signed-off-by: Stefan Roese <sr@denx.de>
2008-01-09ppc4xx: Add CFG_POST_ALT_WORD_ADDR to support non OCM POST WORD storageStefan Roese
The privious 4xx POST implementation only supported storing the POST WORD in OCM. Since we need to reserve the OCM on LWMON5 for the logbuffer we need to store the POST WORD in some other non volatile location. This patch adds CFG_POST_ALT_WORD_ADDR to specify an address for such a location. Signed-off-by: Stefan Roese <sr@denx.de>
2008-01-09ppc4xx: Add 44x cache locking to better support init-ram in d-cacheStefan Roese
This patch adds support for locking the init-ram/stack in d-cache, so that other regions may use d-cache as well Note, that this current implementation locks exactly 4k of d-cache, so please make sure that you don't define a bigger init-ram area. Take a look at the lwmon5 440EPx implementation as a reference. Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-29Merge branch 'for-1.3.2-ver2'Stefan Roese
Conflicts: cpu/ppc4xx/fdt.c include/configs/kilauea.h include/configs/sequoia.h Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-28ppc4xx: Coding style cleanupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-28ppc4xx: Complete PMC440 board supportMatthias Fuchs
This patch brings the PMC440 board configuration file. Finally it enables the PMC440 board support. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-28ppc4xx: Add FPGA support and BSP commands for PMC440 boardsMatthias Fuchs
This patch adds some BSP commands and FPGA booting support for esd's PMC440 boards. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-28ppc4xx: Add initial esd PMC440 board filesMatthias Fuchs
This patch adds the first files for the new esd PMC440 boards. The next two patches will complete the PMC440 board support. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-28ppc4xx: Add EEPROM write protection for PLU405 boards + misc. updatesMatthias Fuchs
- add EEPROM write protection for esd PLU405 boards. - initialize NAND GPIOs - use correct io accessors - cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-28ppc4xx: use correct io accessors for esd's LCD codeMatthias Fuchs
This patch fixes esd's LCD dectection code to work correctly with newer gcc versions. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-28ppc4xx: Maintenance patch for VOH405 boardsMatthias Fuchs
- add EEPROM write protection - initialize NAND GPIOs - use correct io accessors - slow down I2C clock to 100kHz - enable ext. I2C bus - cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-28ppc4xx: Enable 405EP PCI arbiter per default on all boardsStefan Roese
In an attmemt to clean up the 4xx start.S file, I removed the enabling of the internal 405EP PCI arbiter. This is needed for multiple other 405EP platforms, like most of the esd 405EP. Now the internal PCI arbiter is enabled again per default as it has been before. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-28ppc4xx: Fix bug in cpu_init.c (405EP instead of 450EP)Stefan Roese
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-28ppc4xx: Fix compilation problem of kilauea/haleakala nand booting targetStefan Roese
Use correct link to nand_ecc now located in drivers/mtd/nand/ for the platforms mentioned above. Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27Merge branch 'master' of /home/stefan/git/u-boot/u-boot into for-1.3.2-ver2Stefan Roese
2007-12-27Remove CPCI440 boardMatthias Fuchs
This board never left prototyping state and it became a millstone round my neck. So remove it. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-27Add support for Korat PPC440EPx boardLarry Johnson
These patches add support for the PPC440EPx-based "Korat" board to U-Boot. They are based primarily on support for the Sequoia board. Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Add configuration file for Korat boardLarry Johnson
This patch supplies the configuration file for the Korat PPC440EPx- processor board. Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Add denali_data_eye.o and denali_spd_ddr2.o to PPC4xx MakefileLarry Johnson
Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Add 440EPx DDR2 SPD DIMM supportLarry Johnson
This patch adds SPD DDR2 support for the 440EPx ("Denali") SDRAM controller. It should also work on the 440GRx. It is based on the DDR2 SPD code for the 440EP/440EPx, but makes no provision for DDR1 support. This code has been tested on prototype Korat boards with three Kingston DIMMS: 512 MiB ECC (one rank), 512 MiB non-ECC (one rank) and 1 GiB ECC (two ranks). The Korat board has a single DIMM socket, but support has been provided (though not tested) for boards with two DIMM sockets. Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Copy 440EPx/GRx SDRAM data-eye search to common directoryLarry Johnson
This patch creates a non-board-specific file for performing the SDRAM data-eye search. It also adds ECC error checking to the test of valid data on readback when ECC is enabled. Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Add definitions for 440EPx/GRx SDRAM controller to ppc440.hLarry Johnson
This patch adds the Denali SDRAM controller definitions to "ppc440.h". It also fixes two typos in the definitions, so the board-specific "sdram.h" files containing these definitions are also fixed to avoid compiler warnings. Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Add Ethernet 1000BASE-X support for PPC4xxLarry Johnson
This patch adds a new switch: "CONFIG_PHY_DYNAMIC_ANEG". When this symbol is defined, the PHY will advertise it's capabilities for autonegotiation based on the capabilities shown in the PHY's status registers, including 1000BASE-X. When "CONFIG_PHY_DYNAMIC_ANEG" is not defined, the PHY will advertise hard-coded capabilities, as before. Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Add driver for National Semiconductor LM73 temperature sensorLarry Johnson
This driver is based on the driver for the LM75. Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Add driver for STMicroelectronics M41T60 RTCLarry Johnson
This driver is based on the driver for the M41T11. In the intended application, the RTC will be powered by a large capacitor, rather than a battery. The driver therefore checks to see whether the RTC has lost power. The chip's OUT bit is normally reset from its power-up state. If the OUT bit is read as set, or if the date and time are not valid, then the RTC is assumed to have lost power, and its date and time are reset to 1900-01-01 00:00:00. Support for adjusting the speed of the clock to improve accuracy is provided through an environment variable. Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Use out_be32() and friends to access memory-mapped registers in sequoia.cLarry Johnson
Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Use definitions from "asm-ppc/mmu.h" in init.S for SequoiaLarry Johnson
Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27Cosmetic changes to ECC POST for AMCC Denali coreLarry Johnson
Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27ppc4xx: Fix compilation problem in 405 cache POST testStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27ppc4xx: Move virtual address of POST cache test to bigger addressStefan Roese
On Sequoia & LWMON5 the virtual address of the POST cache test is now moved to a bigger address. This enables usage of more memory on those boards. Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27ppc4xx: Fix problem in 44x cache POST routineStefan Roese
As repoted by Larry Johnson, running "diag run cache" caused a crash in U-Boot. This problem was introduced by a patch that removed the TLB entry for the cache test after the test has completed. Since this TLB was only setup once, a 2nd attempt to run this cache test failed with a crash. Now this TLB entry is created every time the routine is called. Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27ppc4xx: Update Makalu fdt supportStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27ppc4xx: Add fdt support to AMCC Katmai eval boardStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27ppc4xx: fdt: Cleanup setup of cpu node setupStefan Roese
Now the cpu node setup ("timebase-frequency" and "clock-frequency") is without using the absolute path to the cpu node. This makes it possible to use this U-Boot version with both versions of cpu-node naming "cpu@0" and the former "PowerPC,440EPx@0". Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27ppc4xx: Fix lwmon5 compilation problemStefan Roese
Now that the 440EPx ECC test is not board specific anymore remove this Makefile. Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27Fix ppc4xx clear_bss() codeAnatolij Gustschin
ppc4xx clear_bss() fails if BSS segment size is not divisible by 4 without remainder. This patch provides fix for this problem. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2007-12-27PPC4xx: Minimal changes to add vxWorks supportNiklaus Giger
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
2007-12-27ppc4xx: Add CONFIG_BOOTP_SUBNETMASK to Sequoia board configMarkus Klotzbücher
When using dhcp/bootp the "netmask" environment variable is not set because CONFIG_BOOTP_SUBNETMASK is not defined. But usually this is desireable, so the following patch adds this this option to the board config. Signed-off-by: Markus Klotzbuecher <mk@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27Fix/enhance ECC POST for 440EPx/GRxLarry Johnson
This patch allows the ECC POST to be used for different boards with the PPC440 Denali SDRAM controller. Modifications include skipping the test if ECC is not enabled (as for non-ECC DIMMs) and adding synchronization to prevent timing errors. Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27PPC4xx: Move/rename ECC POST for 440EPx/GRxLarry Johnson
Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27ppc4xx: use correct io accessors for 4xx ethernet POSTMatthias Fuchs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-27ppc4xx: fix flush + invalidate_dcache_range argumentsMatthias Fuchs
flush + invalidate_dcache_range() expect the start and stop+1 address. So the stop address is the first address behind (!) the range. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-27ppc4xx: fdt: use fdt_fixup_ethernet()Stefan Roese
By using aliases in the dts file, the ethernet node fixup is much easier with the recently added functions. Please note that the dts file needs the aliases for this to work. Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27ppc4xx: Bring 4xx fdt support up-to-dateStefan Roese
This patch update the 4xx fdt support. It enabled fdt booting on the AMCC Kilauea and Sequoia for now. More can follow later quite easily. Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk
2007-12-27Some configuration updates for the TQM5200 based TB5200 board:Martin Krause
- enable command line history - increase malloc space (because of bigger flash sectors) Signed-off-by: Martin Krause <martin.krause@tqs.de>
2007-12-27TQM8xx: use the CFI flash driver on all TQM8xx boardsMartin Krause
Signed-off-by: Martin Krause <martin.krause@tqs.de>
2007-12-27TQM885D: adjust for doubled flash sector size + some minor fixesMartin Krause
Signed-off-by: Martin Krause <martin.krause@tqs.de>
2007-12-27TQM885D: Exchanged SDRAM timing by a more relaxed timing.Jens Gehrlein
CAS-Latency=2, Write Recovery Time tWR=2 The max. supported bus frequency is 66 MHz. Therefore, changed threshold to switch from 1:1 mode to 2:1 from 80 MHz to 66 MHz. Signed-off-by: Martin Krause <martin.krause@tqs.de>
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