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2020-04-29board: ls1088ardb: transition to DM_ETHIoana Ciornei
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2 Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH is activated. Also, force the PCI devices to be enumerated at probe time. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29drivers: net: fsl-mc: add support for CONFIG_DM_ETHIoana Ciornei
Make any adjustments necessary in order to support DPAA2 devices probed using CONFIG_DM_ETH. While at it, fixup some styling issues aroung the switch-case statement. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29drivers: net: ldpaa: add DTS based probing supportIoana Ciornei
When CONFIG_DM_ETH is enabled DPAA2 network interfaces will now probe based on DTS nodes with the "fsl,qoriq-mc-dpmac" compatible. In this case, transform the ldpaa_eth driver into a UCLASS_ETH driver and reuse the _open()/_tx()/_stop() functions already inplemented. For the moment, the ldpaa_eth driver will support both configurations: with or without CONFIG_DM_ETH enabled. Any 'struct eth_device' occurrence now has a matching 'struct udevice' made mutually exclusive based on the state of CONFIG_DM_ETH. Signed-off-by: Florin Laurentiu Chiculita <florinlaurentiu.chiculita@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29drivers: net: add Layerscape mEMAC MDIO driverIoana Ciornei
Add a driver for the MDIO interface integrated in the mEMAC (Multi-rate Ethernet Media Access Controller) and the Fman 10G Ethernet MACs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29ARM: dts: rmobile: Scrub unused DT nodesMarek Vasut
Remove DT nodes which are not used by U-Boot, like audio and video in/out nodes. This saves about 35 kiB on the resulting U-Boot binary without any impact on functionality. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28Merge branch 'migrate-various-PHY-options'Tom Rini
- Finish migration of CONFIG_PHYLIB and a number of related symbols to defconfig files.
2020-04-28configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-29rk3399: Add boot flash script offset, sizeJagan Teki
Most of the SPI flash devices in rockchip (rk3399) are 16MiB size. So, let's use the script offset at the end of 8K.  This way it cannot overlap any offsets being used by software components in flash layout. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-29environment: distro: Add SF distro commandJagan Teki
Add distro boot command support for SPI flash (SF). This distro boot will read the boot script at specific location at the flash and start sourcing the same. This file need to include on required include/config file. Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-29spi: spi-mem: Add SPI_MEM_NO_DATA to the spi_mem_data_dir enumTudor Ambarus
Commit: 0ebb261a0b2d ("spi: spi-mem: Add SPI_MEM_NO_DATA to the spi_mem_data_dir enum") in linux. When defining spi_mem_op templates we don't necessarily know the size that will be passed when the template is actually used, and basing the supports_op() check on op->data.nbytes to know whether there will be data transferred for a specific operation is not possible. Add SPI_MEM_NO_DATA to the spi_mem_data_dir enum so that we can base our checks on op->data.dir instead of op->data.nbytes. This also fixes a bug identified with the atmel-quaspi driver. The spi-nor core, when erasing sectors, fills the spi_mem_op template using SPI_MEM_OP_NO_DATA, which initializes all the data members with value zero. This is wrong because data.dir is treated as SPI_MEM_DATA_IN, which translates in our driver to read accesses for erases (RICR), while the controller expects write accesses (WICR). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29mtd: nand: spi: add support for Toshiba TC58CVG2S0HRAIJRobert Marko
Toshiba recently launched new revisions of their serial SLC NAND series. TC58CVG2S0HRAIJ is a refresh of previous series with minor improvements. Basic parameters are same so lets add support for this new revision. Datasheet: https://business.kioxia.com/info/docget.jsp?did=58601&prodName=TC58CVG2S0HRAIJ Signed-off-by: Robert Marko <robert.marko@sartura.hr> Tested-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29mtd: spi-nand: Import Toshiba SPI-NAND supportRobert Marko
Linux has good support for Toshiba SPI-NAND, so lets import it. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Tested-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29mtd: spi-nor: Enable dual and quad read for s25fl256s0Bacem Daassi
The s25fl256s0 supports dual and quad read like s25fl256s1. Enable it by adding SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ flags to the flash_info entry. Tested on real silicon and confirmed to be working. Signed-off-by: Bacem Daassi <Bacem.Daassi@cypress.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu*Kuldeep Singh
Commit 658df8bd9464 ("mtd: spi-nor-core: Add octal mode support") enables octal mode(1-1-8) support in spi-nor framework. mt35xu512aba and mt35xu02g supports SINGLE and OCTAL I/O. Hence, enable SPI_NOR_OCTAL_READ flag for these flashes. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29spi: cadence-qspi: Move ref clock calculation to probePratyush Yadav
"assigned-clock-parents" and "assigned-clock-rates" DT properties take effect only after ofdata_to_platdata() when clk_set_defaults() is called in device_probe(). Therefore clk get rate() would return a wrong value in ofdata_to_platdata() when compared with probe. Hence it needs to be moved to probe. Tested on u-boot-ti/next. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29spi: use is_power_of_2 instead of hweight32 in spi_nor_write()Rasmus Villemoes
hweight32 is a somewhat expensive way to check for power-of-2. Use the is_power_of_2 helper, which does the standard and cheap idiom foo&(foo-1)==0. add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-96 (-96) Function old new delta spi_nor_write 388 292 -96 Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29spi: Transform the FSL QuadSPI driver to use the SPI MEM APIKuldeep Singh
To support the SPI MEM API, instead of modifying the existing U-Boot driver, this patch adds a port of the existing Linux driver. This also has the advantage that porting changes and fixes from Linux will be easier. Porting of driver left most of the functions unchanged while few of the changes are: -Remove lock(mutexes) and irq handler as u-boot is a single core execution. -Remove invalid masterid as it was required specially for multicore execution in LS2088ARDB which is not the case in u-boot. -Remove clock support as changing spi speed is not supported in uboot and nor in linux. Currently tested on LS1088ARDB, LS1012ARDB, LS1046ARDB, LS1046AFRWY, LS1043AQDS, LS1021ATWR, LS2088ARDB, I.MX6ULL EVK. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-28Convert CONFIG_PHYLIB et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_PHYLIB CONFIG_BITBANGMII CONFIG_MV88E6352_SWITCH CONFIG_MV88E61XX_SWITCH CONFIG_PHYLIB_10G CONFIG_PHY_AQUANTIA CONFIG_PHY_ATHEROS CONFIG_PHY_BROADCOM CONFIG_PHY_CORTINA CONFIG_PHY_DAVICOM CONFIG_PHY_ET1011C CONFIG_PHY_LXT CONFIG_PHY_MARVELL CONFIG_PHY_MICREL CONFIG_PHY_NATSEMI CONFIG_PHY_REALTEK CONFIG_RTL8211X_PHY_FORCE_MASTER CONFIG_PHY_SMSC CONFIG_PHY_TERANETICS CONFIG_PHY_TI CONFIG_PHY_VITESSE CONFIG_PHY_XILINX Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28sunxi: Fix PHY regression on A20-OLinuXino-Lime2 and A20-Olimex-SOM-EVBTom Rini
When moving the PHYLIB PHY drivers around in Kconfig we did not at the same time perform a careful migration of the related drivers and sub-options. This lead to the case where previously Kconfig-enabled driver choices were now disabled on some platforms. Correct this by enabling both the PHY driver and sub-option on the above referenced platforms. Fixes: af2cbfd6b982 ("drivers: net: Provide Kconfig menu for PHYLIB") Fixes: 8728c97eff5b ("configs: Re-sync") Reported-by: Dario <dario86@tutamail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28Prepare v2020.07-rc1Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28kbuild: SPL/TPL: generate separate asm-offsets.h for SPL and TPLMasahiro Yamada
Currently generic-asm-offsets.h and asm-offsets.h are generated based on U-Boot proper config options. The same asm-offsets headers are used for building U-Boot SPL/TPL, which causes potential offset mismatch if U-Boot proper has different config options from U-Boot SPL/TPL. This commit adds: spl/include/generated/(generic-)asm-offsets.h tpl/include/generated/(generic-)asm-offsets.h spl/include/generated/(generic-)asm-offsets.h is generated if CONFIG_SPL=y, and included when building SPL. tpl/include/generated/(generic-)asm-offsets.h is generated if CONFIG_TPL=y, and included when building TPL. They are created before Kbuild descends into SPL/TPL object directories and builds $(obj)/dts/dt-platdata.o because $(obj)/dts/dt-platdata.c includes a bunch of headers. Prepend -I$(obj)/include to $(UBOOTINCLUDE) so (generic-)asm-offsets.h is searched in {spl,tpl}/include/generated/. Requested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-28ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.6.2Marek Vasut
Synchronize R-Car Gen3 device trees with Linux 5.6.2, commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.6.2Marek Vasut
Synchronize R-Car Gen2 device trees with Linux 5.6.2, commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28ARM: rmobile: Unify Gen3 Salvator-X(S) and ULCB defconfigsMarek Vasut
The r8a779{5,6,65}_salvator-x and r8a779{5,6,65}_ulcb_defconfig were building the same target, except for the default DT. The default DT is however only a detail, as the actual DT to be used to configure U-Boot is detected automatically based on the CPU ID, hence the default DT is not meaningful. Unify each three defconfigs per board to reduce the duplication. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28Merge tag 'u-boot-amlogic-20200428' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - fix sd-emmc controller A init on G12A/G12B/SM1 SoCs - add GXBB USB PHY driver - enable access to SPI NOR Flash on VIM2 and VIM3/VIM3L boards - fix USB PHYs Power-Up on on VIM3/VIM3L boards
2020-04-28Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
- DWC2/DWC3 improvements - Assorted bugfixes
2020-04-28Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2020-04-28Merge tag 'dm-pull-27apr20' of git://git.denx.de/u-boot-dmTom Rini
Move Python tools to use absolute paths Minor buildman fixes for new features Make libfdt code more similar to upsteam
2020-04-28lx2160a : Update eMMC boot environment variableMeenakshi Aggarwal
Update mcinitcmd and bootcmd environment variable for emmc boot. Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28configs: ls208xa: Enable GIC_V3_ITS configHou Zhiqiang
Enable GIC_V3_ITS config to initialize the GIC redistributor tables. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28configs: ls1028a: Enable GIC_V3_ITS configHou Zhiqiang
Enable GIC_V3_ITS config to initialize the GIC redistributor tables. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28configs: ls1088a: Enable GIC_V3_ITS configHou Zhiqiang
Enable GIC_V3_ITS config to initialize the GIC redistributor tables. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28fsl-layerscape: Move GIC RD tables init to soc.cHou Zhiqiang
Move GIC redistributor tables initialization to CPU setup function. This patch introduces a GIC redistributor tables init function, and moves the function of reserving memory for GIC redistributor tables to soc.c and adds a argument for the memory size to reserve, BTW rename the function so that it is more readable. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28fsl-layerscape: Kconfig: Select RESV_RAM if GIC_V3_ITSHou Zhiqiang
The GIC redistributor tables initialization depends on RESV_RAM config, so select RESV_RAM if GIC_V3_ITS is enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28board: lx2160a: Align RD tables address to 64KBHou Zhiqiang
As the lower 16bit of the redistributor pending table is reserved for describing the memory attributes, we must give a 64KB aligned address to the GIC LPI initialization function. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28board: lx2160a: Add check in GIC RD tables initHou Zhiqiang
Program the GIC redistributor tables only when succeeded to reserve memory for them, otherwise kernel will lose the chance to program them using allocated memory. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28fsl-layerscape: Add RESV_RAM check in resv_ram addrHou Zhiqiang
The initialization of gd->arch.resv_ram pointer should depend on if the RESV_RAM config is enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28armv8: ls1046ardb: update the DIMM WRLVL_START valueYuantian Tang
The WRLVL_START values are optimized for old DDR MTA18ASF1G72AZ. Update DDR struct to set new WRLVL_START values so that the new DIMM MTA18ADF2G72AZ get optimized and the old DIMM still works. Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28configs: ls1021a: Append CMA configuration to bootargsAlison Wang
The default reserved memory for CMA is high memory. If LPAE is enabled, highmem pages are non-remapped and can not be used with dma_alloc_coherent. Reserving low memory for CMA is needed for LS1021A. This patch appends the related CMA configuration to bootargs. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28include/configs: ls1012afrwy: support dhcp bootBiwen Li
Add support of dhcp boot for ls1012afrwy Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28usb: host: dwc3-sti-glue: Use UCLASS_NOP instead of UCLASS_MISCPatrice Chotard
dwc3-sti-glue has been broken since MISC uclass has been modified to scan DT sub-nodes after bind. Fixing it by a using the no-op uclass. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-28usb: host: dwc2: add trace to have clean usb startPatrick Delaunay
Solve issue for the display of "usb start" command on stm32mp1 because one carriage return is missing in DWC2 probe. Before the patch: STM32MP> usb start starting USB... Bus usb-otg@49000000: Bus usbh-ehci@5800d000: USB EHCI 1.00 after the patch: STM32MP> usb start starting USB... Bus usb-otg@49000000: USB DWC2 Bus usbh-ehci@5800d000: USB EHCI 1.00 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28usb: host: dwc2: force reset assertPatrick Delaunay
Assert reset before deassert in dwc2_reset; this patch solve issues when the DWC2 registers are already initialized with value incompatible with host mode. Force a hardware reset of the IP reset all the DWC2 registers at default value, the host driver start with a clean state (Core Soft reset doen in dwc_otg_core_reset is not enought to reset all register). The error can occurs in U-Boot when DWC2 device gadget driver force device mode (called by ums or dfu command, before to execute the usb start command). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28usb: host: dwc2: add clk supportPatrick Delaunay
Add support for clock with driver model. This patch don't added dependency because when CONFIG_CLK is not activated the clk function are stubbed. Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28usb: host: dwc2: add phy supportPatrick Delaunay
Use generic phy to initialize the PHY associated to the DWC2 device and available in the device tree. This patch don't added dependency because when CONFIG_PHY is not activated, the generic PHY function are stubbed. Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28dm: clk: add stub when CONFIG_CLK is deactivatedPatrick Delaunay
Add stub for functions clk_...() when CONFIG_CLK is deactivated. This patch avoids compilation issues for driver using these API without protection (#if CONFIG_IS_ENABLED(CLK)) For example, before this patch we have undefined reference to `clk_disable_bulk') for code: clk_disable_bulk(&priv->clks); clk_release_bulk(&priv->clks); Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28usb: ether: avoid NULL check before free()Heinrich Schuchardt
free() checks if its argument is NULL. Do not duplicate this check. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-28usb: avoid NULL check before freeHeinrich Schuchardt
The free() function checks if the argument is NULL. Do not duplicate this check. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-28usb: dwc3-meson-g12a: add power-on/off of the PHYsNeil Armstrong
Power on/off the PHYs to enable power to the USB ports, fixing USB support on Khadas VIM3/VIM3L boards. The G12A USB complex has at least 2 USB2 PHYs, but one is muxed between the DWC2 and DWC3 controller and the other one directly connected to the DWC3 controller. The USB3+PCIe combo PHY is muxed between the DWC3 controller and a DW-PCIE controller. All PHYs are optional, but it's type (usb2/usb3) and position are important to determine it's capabilities, thus they are stored in a fixed size array and the phy-name determines it's position, it's position determining it's type and functionnalities. This is why we need to loop over the array to power on all the DT provided PHYs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Marek Vasut <marex@denx.de>
2020-04-28configs: khadas-vim3: enable support for SPI NOR flashNeil Armstrong
Enable the necessary configs to make usage of the SPI NOR Flash. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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