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2019-05-20sun50i: h6: Fix Beelink GS1 board configClément Péron
SPL_TEXT_BASE has been moved to Kconfig with commit: f89d6133ee configs: move CONFIG_SPL_TEXT_BASE to Kconfig But Beelink GS1 config file has been introduced in the same time without this modification. Fix this by settings the CONFIG_SPL_TEXT_BASE Suggested-by: Jonas Smedegaard <dr@jones.dk> Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-20arm: sunxi: h6: fix reset using r_wdogClément Péron
Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-15Prepare v2019.07-rc2Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-15Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
- micrel, ti PHY fixes - rtl8169, mtk-eth fixes
2019-05-15Merge tag 'u-boot-stm32-mcu-20190514' of https://github.com/pchotard/u-bootTom Rini
STM32 MCUs update: _ Add MPU region for SPI NOR memory mapped region _ Add missing QSPI flash compatible for STM32 F7 boards _ Update spi-tx-bus-width and spi-rx-bus-width properties _ Add QSPI support for STM32F469 Discovery board
2019-05-14eth: mtk-eth: fix incorrect read of phy-handleWeijie Gao
In mt7629-rfb.dts, the phy-handle is a reference to the node phy0, not the node itself: phy-handle = <&phy0>; phy0: ethernet-phy@0 { reg = <0>; } However the driver used ofnode_find_subnode("phy-handle") to read the node. It will always fail. This patch replaces ofnode_find_subnode with dev_read_phandle_with_args to make sure the node can be read correctly. Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-14net: rtl8169: Support RTL-8168h/8111hThierry Reding
This version of the RTL-8168 is present on some development boards and is compatible with this driver. Add support for identifying this version of the chip so that U-Boot won't complain about it being unknown. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-14net: rtl8169: Implement ->hwaddr_write() callbackThierry Reding
Implement this callback that allows the MAC address to be set for the Ethernet card. This is necessary in order for the device to be able to receive packets for the MAC address that U-Boot advertises. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-14phy: ti: Init node before readingMichal Simek
There is a need to fill node before clk_output_sel is setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Reviewed-by: <hannes.schmelzer@br-automation.com>
2019-05-14net: phy: micrel: Allow KSZ8xxx and KSZ90x1 to be used togetherJames Byrne
Commit d397f7c45b0b ("net: phy: micrel: Separate KSZ9000 drivers from KSZ8000 drivers") separated the KSZ8xxx and KSZ90x1 drivers and warns that you shouldn't select both of them due to a device ID clash between the KSZ9021 and the KS8721, asserting that "it is highly unlikely for a system to contain both a KSZ8000 and a KSZ9000 PHY". Unfortunately boards like the SAMA5D3xEK do contain both types of PHY, but fortunately the Linux Micrel PHY driver provides a solution by using different PHY ID and mask values to distinguish these chips. This commit contains the following changes: - The PHY ID and mask values for the KSZ9021 and the KS8721 now match those used by the Linux driver. - The warnings about not enabling both drivers have been removed. - The description for PHY_MICREL_KSZ8XXX has been corrected (these are 10/100 PHYs, not GbE PHYs). - PHY_MICREL_KSZ9021 and PHY_MICREL_KSZ9031 no longer select PHY_GIGE since this is selected by PHY_MICREL_KSZ90X1. - All of the relevant defconfig files have been updated now that PHY_MICREL_KSZ8XXX does not default to 'Y'. Signed-off-by: James Byrne <james.byrne@origamienergy.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-13Merge tag 'efi-2019-07-rc3' of git://git.denx.de/u-boot-efiTom Rini
Pull request for UEFI sub-system for v2019.07-rc3 The development target for the UEFI sub-system is EBBR compliance. We have already implemented some further protocols to enable running the UEFI Shell and the UEFI SCT test suite. As some boards are severely memory constrained make some of these extras customizable. Provide bug fixes. The most prominent ones let us pass the UEFI SCT memory allocation tests.
2019-05-13Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- A10 FPGA programming support, Gen5 livetree conversion
2019-05-13Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- SH2, SH3 removal
2019-05-12efi_loader: comments for efi_install_fdt()Heinrich Schuchardt
Describe that efi_install_fdt() defaults to using the device tree indicated by environment variable fdtcontroladdr. ACPI tables and device trees are mutually exclusive. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: deduplicate code in cmd/bootefi.cHeinrich Schuchardt
Move duplicate initialization code to single instance. Adjust comments of concerned functions. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: ACPI device node to textHeinrich Schuchardt
The device path to text protocol renders ACPI device nodes incorrectly. Use capital hexadecimal numbers as shown in the UEFI spec examples. Always output the optional UID. This matches what UEFI SCT expects and saves us an `if`. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: infinite recursion notifying eventsHeinrich Schuchardt
UEFI SCT uses this call sequence to determine the current TPL level inside notification functions: OldTpl = BS->RaiseTPL(TPL_HIGH_LEVEL); BS->RestoreTPL(OldTpl); In RestoreTPL() we trigger the notification function of queued events. If we do not mark the event as non-queued before calling the notification function, this results in an infinite recursive call sequence. Mark the event as non-queued before entering the notification function. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: simplify efi_allocate_pages()Heinrich Schuchardt
Replace unnecessary control structures by using return statements. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: AllocateAdress error handlingHeinrich Schuchardt
If AllocatePages() is called with AllocateAddress, the UEFI spec requires to return EFI_NOT_FOUND in case the memory page does not exist. The UEFI SCT II 2017 spec additionally requires to return EFI_NOT_FOUND if the page is already allocated. Check that *Memory refers to an unallocated page. UEFI SCT II (2017): AllocatePages(), 5.1.2.1.9 - 5.1.2.1.10 Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: out of resources in AllocatePages()Heinrich Schuchardt
According to the UEFI AllocatePages() has to return EFI_OUT_OF_RESOURCES if sufficient memory is not available. Change the return value. UEFI SCT II (2017): 3.2.1 AllocatePages(), 5.1.2.1.8 Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: check memory address before freeingHeinrich Schuchardt
When we call FreePages() we essentially add memory to our memory map. We shouldn't do this for memory that does not exit. Check if the memory that is to be freed via FreePages() or FreePool() is in our memory map and is not EFI_CONVENTIONAL_MEMORY. This check is mandated by the UEFI specification. Cf. UEFI SCT II (2017), 3.2.2 FreePages(), 5.1.2.1 - 5.1.2.2 Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: error code in UninstallProtocolInterface()Heinrich Schuchardt
According to the UEFI specification UninstallProtocolInteface() has to return EFI_NOT_FOUND if the interface is not found. Correct the return value. Cf. UEFI SCT II spec (2017), 3.3.2 UninstallProtocolInterface(), 5.1.3.2.4 Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: superfluous check in efi_remove_protocol()Heinrich Schuchardt
efi_search_protocol() already checks that the GUID matches. Don't check a second time. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: LocateDevicePath() incorrect parameter checkHeinrich Schuchardt
A parameter check in LocateDevicePath() does not match the requirements of the UEFI spec. If device is NULL, only return EFI_INVALID_PARAMETER if a matching handle is found. Cf. UEFI SCT II specification (2017)3.3.7 LocateDevicePath(), 5.1.3.7.3 Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: fix typo in efi_locate_handle() commentHeinrich Schuchardt
%s/not buffer/no buffer/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: make device path to text protocol customizableHeinrich Schuchardt
The device path to text protocol is not needed for EBBR compliance. So let's make it a customizable option. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: make Unicode collation protocol customizableHeinrich Schuchardt
The Unicode collation protocol is not needed for EBBR compliance. So let's make it a customizable option. The Unicode capitalization table is only needed by this protocol. So let it depend on the Unicode collation protocol. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: reword the EFI_LOADER config optionHeinrich Schuchardt
No need to mention U-Boot in brief description. Fix several typos, mention iPXE. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: format KconfigHeinrich Schuchardt
Use if/endif for dependencies to give structure to the configuration menu. Sort important settings to the top. Abbreviate the short description of EFI_LOADER_HII. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12efi_loader: observe CONFIG_EFI_LOADER_HIIHeinrich Schuchardt
If EFI_LOADER_HII is not set, do not unnecessarily compile files for HII protocols. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12MAINTAINERS: assign include/charset.hHeinrich Schuchardt
Assign include/charset.h to EFI PAYLOAD. The functions defined in this include are used by the UEFI sub-system. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-12lib: charset: correct utf8_utf16_strnlen() descriptionHeinrich Schuchardt
Correct the description of utf8_utf16_strnlen() and utf8_utf16_strlen() to reflect that they return u16 count and not byte count. For these functions and utf16_utf8_strnlen() describe the handling of invalid code sequences. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-10gpio: dwapb_gpio: convert to livetreeSimon Goldschmidt
Convert 'gpio_dwapb_bind' to iterate over subnodes using livetree functions (inspired from mt7621_gpio.c). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10reset: socfpga: convert to livetreeSimon Goldschmidt
Convert 'socfpga_reset_probe' to use 'dev_read_u32_default' instead of 'fdtdec_get_int'. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10serial: altera_uart: convert to livetreeSimon Goldschmidt
Convert 'altera_uart_ofdata_to_platdata' to use 'dev_read_u32_default' instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10spi: designware: convert to livetreeSimon Goldschmidt
Convert 'dw_spi_ofdata_to_platdata' to use 'dev_read_u32_default' instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10spi: cadence_qspi: convert to livetreeSimon Goldschmidt
Convert 'cadence_spi_ofdata_to_platdata' to use dev_read_* functions to read driver parameters and 'dev_read_first_subnode'/'ofnode_read_*' to read flash (child node) parameters. Tested on socfpga_socrates (socfpga gen5). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10timer: dw-apb: remove unused DECLARE_GLOBAL_DATA_PTRSimon Goldschmidt
The dw-apb timer does not use 'gd', so remove its declaration. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10configs: stratix10: Enable CONFIG_SPI_FLASH_USE_4K_SECTORSLey Foon Tan
Fix SPI flash environment erase size error. CONFIG_ENV_SECT_SIZE is set to 4KB. Enable CONFIG_SPI_FLASH_USE_4K_SECTORS to allow erase one environment sector. Fix error below: SOCFPGA_STRATIX10 # saveenv Saving Environment to SPI Flash... SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB Erasing SPI flash...SF: Erase offset/length not multiple of erase size Failed (-22) Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-10ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPLTien Fong Chee
Increasing Malloc pool size up to 0x15000 is required to support FAT in SPL . The result of calculation is come from default max cluster(0x10000) + others(0x2000) + additional memory for headroom(0x3000). Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10ARM: socfpga: Synchronize the configuration for A10 SoCDKTien Fong Chee
Update the default configuration file to enable the necessary functionality the get the kit working. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10spl: socfpga: Implement fpga bitstream loading with socfpga loadfsTien Fong Chee
Add support for loading FPGA bitstream to get DDR up running before U-Boot is loaded into DDR. Boot device initialization, generic firmware loader and SPL FAT support are required for this whole mechanism to work. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDKTien Fong Chee
Update the default configuration file to enable the necessary functionality to get the SoCFPGA loadfs driver support. This would enable the implementation of programming bitstream into FPGA from MMC. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loadingTien Fong Chee
Add FPGA driver to support program FPGA with FPGA bitstream loading from filesystem. The driver are designed based on generic firmware loader framework. The driver can handle FPGA program operation from loading FPGA bitstream in flash to memory and then to program FPGA. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10ARM: socfpga: Moving the watchdog reset to the for-loop status pollingTien Fong Chee
Current watchdog reset is misplaced after for-loop status polling, so this poses a risk that watchdog can't be reset timely if polling taking longer than watchdog timeout. This patch moving the watchdog reset into polling to ensure the watchdog can be reset timely. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10ARM: socfpga: Cleaning up and ensuring consistent format messages in driverTien Fong Chee
Ensure all the debug messages are always prefix with "FPGA: " and comment beginning with uppercase letter. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDKTien Fong Chee
Add default fitImage file bundling FPGA bitstreams for Arria10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10Tien Fong Chee
This patch adds description on properties about file name used for both peripheral bitstream and core bitstream. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10sh: sh3: Remove CPU supportMarek Vasut
This CPU core is old, no boards using the CPU are left in mainline, it has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10sh: shmin: Remove the boardMarek Vasut
Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
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