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2018-05-18ARM: socfpga: Fix Documentation errors in scu_registersBen Kalo
According to ARM Cortex-A9 MPCore TRM section 2.2 - SCU registers Access Control register offset is 0x50. Signed-off-by: Ben Kalo <ben.h.kalo@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2018-05-18ARM: socfpga: Adding SoCFPGA info for both SPL and U-BootTien Fong Chee
SoC FPGA info is required in both SPL and U-Boot. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18ARM: socfpga: Adding clock frequency info for U-BootTien Fong Chee
Clock frequency info is required in U-Boot because info would be erased when transition from SPL to U-Boot. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18ARM: socfpga: Enable SPL memory allocationTien Fong Chee
Enable memory allocation in SPL for preparation to enable FAT in SPL. Memory allocation is needed by FAT to work properly. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18configs: Add DDR Kconfig support for Arria 10Tien Fong Chee
This patch enables DDR Kconfig support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Add DDR driver for Arria 10Tien Fong Chee
Add DDR driver support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18ARM: socfpga: Add DRAM bank size initialization functionTien Fong Chee
Add function for both multiple DRAM bank and single DRAM bank size initialization. This common functionality could be used by every single SOCFPGA board. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Tested-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18ARM: socfpga: Rename the gen5 sdram driver to more specific nameTien Fong Chee
Current sdram driver is only applied to gen5 device, hence it is better to rename sdram driver to more specific name which is related to gen5 device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18ARM: socfpga: Repair A10 EMAC reset handlingMarek Vasut
The EMAC reset and PHY mode configuration was never working on the Arria10 SoC, fix this. This patch pulls out the common code into misc.c and passes the SoC-specific function call in as a function pointer. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Synchronize Arria10 SoCDK SDMMC handoffMarek Vasut
Regenerate Altera Arria 10 SoCDK SDMMC handoff file using latest Quartus to get the new set of clock bindings in. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Synchronize Arria10 DTsMarek Vasut
Synchronize Altera Arria 10 DT sources with Linux 4.16.3 as of commit ef8216d28a5920022cddcb694d2d75bd1f0035ca Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Sort the DT MakefileMarek Vasut
Sort the Makefile entries, no functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Sync A10 clock manager binding parserMarek Vasut
The A10 clock manager parsed DT bindings generated by Quartus the bsp-editor to configure the A10 clocks. Sadly, those DT bindings changed at some point. The clock manager patch used the old ones, this patch replaces the bindings parser with one for the new set. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Convert to DM serialMarek Vasut
Pull the serial port configuration from DT and use DM serial instead of having the serial configuration in two places, DT and board config. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Clean up Kconfig entriesMarek Vasut
Shuffle the default Kconfig entries around so it is not such a mess. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGETMarek Vasut
This was never used, is not used anywhere and is just in the way by adding annoying ifdeffery. Get rid of it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18ARM: socfpga: Put stack at the end of SRAMMarek Vasut
The global data are in the .data section, so there's no point in reserving any space for it above stack. Put stack at the end of SRAM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18fdt: Add another Altera Arria10 clock init compatibleMarek Vasut
The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18arm: imx53: Add support for imx53 boards from K+PLukasz Majewski
This commit adds support for DDC and HSC boards from K+P in u-boot. Console output: U-Boot 2018.05-rc2-00090-g752b7ed6f9 (Apr 26 2018 - 14:24:24 +0200) CPU: Freescale i.MX53 rev2.1 at 800 MHz Reset cause: WDOG Model: K+P iMX53 DRAM: 512 MiB MMC: FSL_SDHC: 0 Loading Environment from MMC... OK In: serial Out: serial Err: serial Module EEPROM: ID: TQMa53-CB.0401 SN: 63152762 MAC: 00:0b:64:03:14:2a BBoard:40x0 Rev:10 Net: eth0: ethernet@63fec000 Hit any key to stop autoboot: 0 Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-05-18sandbox: tests: Add tests for mc34708 PMIC deviceLukasz Majewski
Following tests has been added for mc34708 device: - get_test for mc34708 PMIC - Check if proper number of registers is read - Check if default (emulated via i2c device) value is properly read - Check if value write/read operation is correct - Perform tests to check if pmic_clrsetbits() is working correctly Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18sandbox: tests: Exclude common test code (pmic_get) in test/dm/pmic.cLukasz Majewski
The common code can be excluded to be reused by tests for other PMIC. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18sandbox: Enable MC34708 PMIC supportLukasz Majewski
This MC34708 PMIC is somewhat special - it used single transfers (R/W) with 3 bytes size - up till now U-Boot's PMICs only used 1 byte. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18sandbox: Enable support for MC34708 PMIC in DTSLukasz Majewski
This commit also provides the default values of the emulated MC34708 PMIC internal registers content. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18sandbox: Rewrite i2c_pmic_emul.c to support PMIC with 3 bytes transmissionLukasz Majewski
This change enables support for MC34708 PMIC in sandbox. Now we can emulate the I2C transfers larger than 1 byte. Notable changes for this driver: - From now on the register number is not equal to index in the buffer, which emulates the PMIC registers - The PMIC register's pool is now dynamically allocated up till 64 regs * 3 bytes each = 192 B Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18pmic: Rewrite the pmic command to not only work with single byte transmissionLukasz Majewski
Up till now it was only possible to use 'pmic' command with a single byte transmission. The pmic_read|write functions has been replaced with ones, which don't need the transmission length as a parameter. Due to that it is possible now to read data from PMICs transmitting more data than 1 byte at once (e.g. mc34708) Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18pmic: dm: Add support for MC34708 for PMIC DMLukasz Majewski
This patch adds support for MC34708 PMIC, to be used with driver model (DM). Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18pmic: dm: Rewrite pmic_reg_{read|write|clrsetbits} to support 3 bytes ↵Lukasz Majewski
transmissions This commit provides support for transmissions larger than 1 byte for PMIC devices used with DM (e.g. MC34708 from NXP). Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18pmic: Add support for setting transmission length in uclass private dataLukasz Majewski
The struct uc_pmic_priv's trans_len field stores the number of types to be transmitted per PMIC transfer. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18pmic: fsl: Define number of bytes sent at once by MC34708 PMICLukasz Majewski
This patch adds definition of the number of bytes sent at once by the MC34708 PMIC. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18pmic: fsl: Provide some more definitions for MC34708 PMICLukasz Majewski
This commit adds some more defines for MC34708 PMIC. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18configs: imx6dl-mamoj: Enable HABJagan Teki
Enable Secure boot(HAB) for BTicino Mamoj board. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18configs: imx6dl-mamoj: Add Falcon mode supportJagan Teki
Add Falcon mode support to boot Linux directly after SPL. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18configs: imx6dl-mamoj: Add DFU supportJagan Teki
Add DFU support for BTicino Mamoj board and update the same steps in README. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18configs: imx6dl_mamoj: Enable fastboot and umsJagan Teki
Enable fastboot and ums for host to interact eMMC on Mamoj board. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18i.MX6DL: mamoj: Add PFUZE100 supportJagan Teki
MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support for it through DM_PMIC dt definition. pmic log: Reviewed-by: Stefano Babic <sbabic@denx.de> ======== => pmic list | Name | Parent name | Parent uclass @ seq | pfuze100@08 | i2c@021f8000 | i2c @ 3 => pmic dev pfuze100@08 dev: 0 @ pfuze100@08 => pmic dump Dump pmic: pfuze100@08 registers 0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81 0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00 0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b 0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08 0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00 0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10 0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18i.MX6DL: mamoj: Add I2C supportJagan Teki
i.MX6DL Mamoj has i2c3 and i2c4 buses, add support through DM_I2C with dt definition. i2c log: Reviewed-by: Stefano Babic <sbabic@denx.de> ======= => i2c bus Bus 2: i2c@021a8000 Bus 3: i2c@021f8000 => i2c dev 2 Setting bus to 2 => i2c speed 400000 Setting bus speed to 400000 Hz => i2c probe Valid chip addresses: 20 51 53 => i2c md 53 0xff 00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ => i2c md 51 0xff 00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53 ..@P.CFRB......S => i2c dev 3 Setting bus to 3 => i2c speed 100000 Setting bus speed to 100000 Hz => i2c probe Valid chip addresses: 08 40 48 4B => i2c md 08 0xff 00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18i.MX6: board: Add BTicino i.MX6DL Mamoj initial supportJagan Teki
Add initial support for i.MX6DL BTicino Mamoj board. Mamoh board added: - SPL - SPL_DM - SPL_OF_CONTROL - DM for U-Boot proper - OF_CONTROL for U-Boot proper - eMMC - FEC - Boot from eMMC - Boot from USB SDP Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18ARM: i.MX6: dts: Build dtb based on SOC typeJagan Teki
Build dtb's based on SOC type instead building arch type. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-splJagan Teki
u-boot,dm-spl property is specific to U-Boot, so move it into *u-boot.dtsi files for relevant i.MX6UL files. This make syncing Linux dts files straight forward. Also update the MAINTAINERS file for dts files. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18ARM: dts: imx6ul-isiot: Move usdhc2 into dtsiJagan Teki
Move usdhc2 node along with pinctrl to imx6ul-isiot.dts from imx6ul-isiot-emmc.dts Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18ARM: dts: i.MX6QDL: U-Boot specific dts for u-boot, dm-splJagan Teki
u-boot,dm-spl property is specific to U-Boot, so move it into *u-boot.dtsi files for relevant i.MX6QDL files. This make syncing Linux dts files straight forward. Also update the MAINTAINERS file for dts files. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-17imx6: sabrelite: update defconfig to use distro defaultsGuillaume GARDET
Boot tested with boot.scr script and EFI/Grub2 on mmc0 and mmc1 slots on sabrelite board. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Gary Bisson <gary.bisson@boundarydevices.com>
2018-05-17imx6: Convert sabrelite and nitrogen6x boards to distro boot supportGuillaume GARDET
Boot tested on sabrelite board. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Gary Bisson <gary.bisson@boundarydevices.com> Tested-by: Denis Pynkin <denis.pynkin@collabora.com>
2018-05-17Merge git://www.denx.de/git/u-boot-marvellTom Rini
2018-05-17net: MVGBE don't automatically select PHYLIBChris Packham
When Kconfig support was added for MVGBE it included automatically selected PHYLIB support. But MVGBE does not need PHYLIB it will build fine without it. Commit ed52ea507f12 ("net: add Kconfig for MVGBE") should have been a no-op in terms of build size but because of the selecting PHYLIB the openrd configs increased in size. Remove the automatic selection of PHYLIB, boards that need it will have already enabled it in their config header file. Fixes: commit ed52ea507f12 ("net: add Kconfig for MVGBE") Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for sheevaplugChris Packham
Import the dts files from Linux 4.17 and enable device tree control in u-boot. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for pogo_e02Chris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for openrdChris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for nas220Chris Packham
Import the dts file from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17ARM: kirkwood: Add device-tree for iconnectChris Packham
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
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