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2020-06-25bdinfo: sandbox: Use the generic bd commandSimon Glass
Sandbox has a printout of 'FB base' but this code is not used since sandbox uses driver model for everything. Move sandbox over to use the generic do_bdinfo(). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25bdinfo: x86: Use the generic bd commandSimon Glass
This arch shows 'ethspeed' info but only the freescale drivers use it, so it can be dropped. It also calls print_bi_dram() which is safe to call from any arch since it has an #ifdef inside it. Add this to the generic do_bdinfo() and move x86 over to use it. Put it first since pytests rely on seeing it before memstart in find_ram_base(). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25bdinfo: sh: Use the generic bd commandSimon Glass
This arch has no code that is not already in the generic function. Drop the arch-specific function and change sh over to use the generic one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25bdinfo: microblaze: Use the generic bd commandSimon Glass
Microblaze prints out ethernet and FDT information. This is useful to most archs, so move it into the generic code and move microblaze over to use it. Note that FDT information is shown for all boards, since they should be using device tree by now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25bdinfo: nios2: Use the generic bd commandSimon Glass
Nios2 currently has some code to output SRAM information which is behind an #ifdef. No nios2 boards define this option, so the code can be removed. Move Nios2 over to use the generic function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25bdinfo: mips: Use the generic bd commandSimon Glass
MIPS currently has a few extra things which are generally useful. Add them to the generic function and move MIPS over to use it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-06-25bdinfo: xtensa: Create a generic do_bdinfo for xtensaSimon Glass
This arch uses only the generic function. It would be nice if all the archs did the same. As a first step, create a new generic function for the 'bd' command and make xtensa use it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25bdinfo: m68k: Drop bd_info->bi_ipbfreqSimon Glass
This field is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25bdinfo: riscv: Use generic bd_infoSimon Glass
At present riscv still uses its own private bd_info struct. Move it over to use the generic one like other archs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25bdinfo: nds32: Use generic bd_infoSimon Glass
At present nds32 still uses its own private bd_info struct. Move it over to use the generic one like other archs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25tbs2910: Drop the 'bd' commandSimon Glass
This board is very close to its limit. Drop this command before the bd refactoring, which increases the size slightly on one toolchain. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25Merge tag 'xilinx-for-v2020.10' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2020.10 Versal: - xspi bootmode fix - Removing one clock from clk driver - Align u-boot memory setting with OS by default - Map TCM and OCM by default ZynqMP: - Minor DT improvements - Reduce console buffer for mini configurations - Add fix for AMS - Add support for XDP platform Zynq: - Support for AES engine - Enable bigger memory test by default - Extend documentation for SD preparation - Use different freq for Topic miami board mmc: - minor GD pointer removal net: - Support fixed-link cases by zynq gem - Fix phy looking loop in axi enet driver spi: - Cleanup global macros for xilinx spi drivers firmware: - Add support for pmufw reloading fpga: - Improve error status reporting common: - Remove 4kB addition space for FDT allocation
2020-06-25common: fdt: Remove additional 4k space for fdt allocationAshok Reddy Soma
There is no technical reason to add additional 4k space for FDT. This space is completely unused and just increase memory requirements. This is problematic on systems with limited memory resources as Xilinx Zynq CSE/ZynqMP mini and Versal mini configurations. The patch is removing additional 4k space. EFI code is using copy_fdt() which copy FDT to different location. And all boot commands in case of using U-Boot's FDT pointed by $fdtcontroladdr are copying FDT to different locations by image_setup_libfdt(). That's why in proper flow none should modified DTB used by U-Boot that's why there is no need for additional space. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2020-06-25xilinx: zynqmp: Enable pmufw config reloadingMichal Simek
PMU FW has functionality to accept and reload configuration object at run time. The patch is adding support for doing it via u-boot prompt. For example: tftpboot 100000 pmu_obj.bin zynqmp pmufw 100000 $filesize The most of pmufw configurations don't allow config reloading. Also official Xilinx PMUFW doens't support this feature properly but the patch should open a way to call PMUFW with this request. Here is example of PMUFW config fragment which enables config reloading. /* SET CONFIG SECTION */ PM_CONFIG_SET_CONFIG_SECTION_ID, /* Section ID */ PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Permissions to set config */ Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-25arm64: zynqmp: Print multiboot reg in decimalMichal Simek
It is better to print multiboot value in decimal because boot images are also composed in decimal not in hex. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24topic: zynqmp: Add support for zynqmp-xilinx-xdp platformMike Looijmans
XDP - Xilinx Drone Platform is a board for drones or other UAV. Pinmux the SD card by default, and if the SD card detect line is high (inactive) then pinmux the SD1 interface to EMIO instead. SD is placed on extension card and shares connection with on board wife. That means that when SD card is present in the board wifi can't be used. There seems to be an issue with DDR access from PL at 2400MT/s, after updating the PMU and ATF firmware this is causing extremely slow DDR access. Reducing the DDR speed from 2400 to 2133 appears to solve that issue, even though the hardware has proven to be 2400 capable. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24board: zynqmp: Fix for wrong AMS setting by ROMMike Looijmans
A bug in the ZynqMP bootrom sets the PS_SYSMON_ANALOG_BUS register at 0xFFA50914 to the wrong value 0x3201. This causes the AMS to exchange the PS supply voltages 0 and 1. On Xilinx boards this is not noticeable since these are tied together, it's only really noticeable if banks 500 and 501 have different supplies. Xilinx' tech support reported this undocumented register to be the cause, and this patch applies a fix for all boards by programming the correct value. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24board: topic-miami: Set FCLK1 to 150MHzMike Looijmans
In all reference designs the FCLK1 runs at 150MHz, but the bootloader doesn't set it up like that. Set the divider to 8 to generate the correct clock. Fixes (a.o.) the DMA speed being too slow. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24net: xilinx: axi_emac: Fix endless loop when no PHYs are connectedPatrick van Gelder
The index used to iterate over the possible PHYs in axiemac_phy_init was an unsigned int and decremented. Therefor it was always >= 0 and never exited the loop. Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24doc: board: xilinx: zynq.rst: add description how to flash a SD cardJohannes Krottmayer
Add a short description in the ZYNQ documentation how to prepare a SD card and copy the related images to SD card. Signed-off-by: Johannes Krottmayer <krjdev@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm64: xilinx: Print fpga error value in hexT Karthik Reddy
Fpga returns error value when fails, error status should be printed in hex format. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24spi: zynq_[q]spi: Convert config's to macro'sAshok Reddy Soma
Remove below config options and convert them to macros. They have never been configured to different values than default one. And also it makes sense to reduce the config_whitelist. CONFIG_SYS_ZYNQ_SPI_WAIT CONFIG_SYS_ZYNQ_QSPI_WAIT CONFIG_XILINX_SPI_IDLE_VAL Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24net: gem: Disable PCS autonegotiation in case of fixed-linkMichal Simek
Disable PCS autonegotiation if fixed-link node is present in device tree. This way systems with multiple GEM instances with a combination of SGMII-fixed and SGMII-PHY will work. Reported-by: Goran Marinkovic <goran.marinkovic@psi.ch> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm64: zynqmp: Change spi-max-frequency for qspi miniT Karthik Reddy
Change mini u-boot qspi spi-max-frequency to 108Mhz, make the frequency similar to full u-boot qspi flash spi-max-frequency. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm64: zynqmp: Fix si570 clock output names and referencesSaeed Nowshadi
Align clock output names with node references. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm64: zynqmp: Reduce console buffer sizeT Karthik Reddy
Reduce console buffer size to 1kbyte to accommodate memory allocations in mini u-boot for zynqmp. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm64: versal: Enable config to map TCM and OCMAshok Reddy Soma
Enable CONFIG_DEFINE_TCM_OCM_MMAP to map TCM and OCM memory. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm: zynq: Enable alternative memory testAshok Reddy Soma
Enable alternative memory test for zynq platforms. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Add zynq aes load & loadp commandsT Karthik Reddy
Added support for zynq aes load & loadp commands. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Flush dcache only for non-bitstream dataT Karthik Reddy
In case of aes decryption destination address range must be flushed before transferring decrypted data to destination. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Check if aes engine is enabledIbai Erkiaga
AES engine cannot be used if has not been enabled at boot time with an encrypted boot image. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Check fpga config completionT Karthik Reddy
This patch checks fpga config completion when a bitstream is loaded into PL. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Correct PL bitstream loading sequence for zynqaesSiva Durga Prasad Paladugu
Correct the PL bitstream loading sequence for zynqaes command by clearing the loaded PL bitstream before loading the new encrypted bitstream using the zynq aes command. This was done by setting the PROG_B same as in case of fpgaload commands. This patch fixes the issue of loading the encrypted PL bitstream onto the PL in which a bitstream has already been loaded successfully. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24firmware: zynqmp: Change panic logic in zynqmp_pmufw_load_config_object()Michal Simek
There is no need to panic all the time when pmufw config object loading failed. The patch improves function logic to report permission deny case and also panic only for SPL case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-24clk: versal: Remove alt_ref_clk from clock sourcesRajan Vaja
alt_ref_clk is applicable only for PS extended version. For PS base version there is no separate alt_ref_clk. It is tied with ref_clk, so remove it from driver. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm64: versal: Let U-Boot to update memory node by defaultMichal Simek
There is no reason not to let U-Boot to update memory node by default. In past this was disabled by purpose to be able to test different memory configurations from one U-Boot instance. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24mmc: zynq_sdhci: Remove global pointerMichal Simek
Driver is not calling gd anywhere that's why there is not need to define it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm: versal: Fix xspi0 boot modeMichal Simek
Use proper number to be aligned with xspi0 boot mode. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-23Merge tag 'u-boot-imx-20200623' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2020.07 ----------------- Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/701059103 - Fixes for atheros and cubox - Toradex: mostly environment - i.MX7: DDR fixes - switch to DM - sabrelite : fix MMC access
2020-06-23configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-22Prepare v2020.07-rc5Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-23mx6cuboxi: remove unused codeWalter Lozano
After enabling SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC the MMC initialization code is not longer needed. This patch removes the unused code. Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23mx6cuboxi: enable OF_CONTROL and DM in SPLWalter Lozano
In order to take the beneficts of DT and DM in SPL, like reusing the code and avoid redundancy, enable SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC. With this new configuration SPL image is 50 KB, higher than the 38 KB from the previous version, but it still under the 68 KB limit. Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23mx6cuboxi: customize board_boot_order to access eMMCWalter Lozano
In SPL legacy code only one MMC device is created, based on BOOT_CFG register, which can be either SD or eMMC. In this context board_boot_order return always MMC1 when configure to boot from SD/eMMC. After switching to DM both SD and eMMC devices are created based on the information available on DT, but as board_boot_order only returns MMC1 is not possible to boot from eMMC. This patch customizes board_boot_order taking into account BOOT_CFG register to point to correct MMC1 / MMC2 device. Additionally, handle IO mux for the desired boot device. Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23mx6cuboxi: enable MMC and eMMC in DT for SPLWalter Lozano
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23mx6ull_14x14_evk_plugin: Convert to DM_ETHFabio Estevam
Convert to DM_ETH to avoid board removal from the project. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-23mx6slevk_spl: Convert to DM_ETHFabio Estevam
Convert to DM_ETH to avoid board removal from the project. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-23mx6slevk_spinor: Convert to DM_ETHFabio Estevam
Convert to DM_ETH to avoid board removal from the project. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-23arm: dts: imx: fsl-imx8qm.dtsi: fix gpio aliasesYe Li
Current aliases missed gpio0 node, and this node shoud be aliased to gpio index 0 to align with i.MX8QXP. Otherwise, we will get below message when running "gpio status" command, and see the reason by "dm uclass". => gpio status Device 'gpio@5d090000': seq 0 is in use by 'gpio@5d080000' Device 'gpio@5d0a0000': seq 1 is in use by 'gpio@5d090000' Device 'gpio@5d0b0000': seq 2 is in use by 'gpio@5d0a0000' => dm uclass uclass 36: gpio 0 * gpio@5d080000 @ fbaefb90, seq 0, (req -1) 1 * gpio@5d090000 @ fbaefc70, seq 1, (req 0) 2 * gpio@5d0a0000 @ fbaefd50, seq 2, (req 1) 3 * gpio@5d0b0000 @ fbaefe30, seq 5, (req 2) 4 * gpio@5d0c0000 @ fbaeff10, seq 3, (req 3) 5 * gpio@5d0d0000 @ fbaefff0, seq 4, (req 4) 6 * gpio@5d0e0000 @ fbaf00d0, seq 6, (req 5) 7 * gpio@5d0f0000 @ fbaf01b0, seq 7, (req 6) Signed-off-by: Ye Li <ye.li@nxp.com>
2020-06-23gpio: mxc_gpio: change gpio index for i.MX8Ye Li
Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX platforms, so we have to adjust the index accordingly. Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
generated by cgit (git 2.34.1) at 2025-01-10 14:34:52 +0000