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2020-07-24riscv: dts: hifive-unleashed-a00: Make memory node available to SPLBin Meng
Make memory node available to SPL in prepration to updates to SiFive DDR RAM driver to read memory information from DT. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24riscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc regRick Chen
Use fdtdec_get_addr_size_auto_noparent to read the "reg" property instead of fdtdec_get_addr. This will increase the compatibility of dtb parsing. Signed-off-by: Rick Chen <rick@andestech.com> Acked-by: Leo Liang <ycliang@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Leo Liang <ycliang@andestech.com>
2020-07-24riscv: Fix linking error when building u-boot-spl with no SMP supportLeo Yu-Chi Liang
Switch off SMP support when building u-boot-spl would cause linking error as follow: undefined reference to 'secondary hart relocate' and 'smp_call_function'. Add macro to wrap up proper code region that needs SMP configuration on. Signed-off by: Leo Liang <ycliang@andestech.com> Cc: rick@andestech.com Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24serial: Fix SIFIVE debug serial dependencyMichal Simek
The commit 4cc24aeaf420 ("serial: Add missing Kconfig dependencies for debug consoles") has added incorrect dependency for SIFIVE debug uart which should depend on SIFIVE driver instead of PL01x. Fixes: 4cc24aeaf420 ("serial: Add missing Kconfig dependencies for debug consoles") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Leo Liang <ycliang@andestech.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2020-07-24riscv: qemu: Add syscon reboot and poweroff supportBin Meng
This adds syscon reboot and poweroff support to QEMU RISC-V. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24sysreset: syscon: Support value propertyBin Meng
Per the DT binding, <mask> and <value> property can have either one or both, and if <value> is missing, <mask> should be used, which is what current U-Boot sysreset_syscon driver supports. This adds support to the <value> property to the driver, and <mask> semantics is updated to really be a mask to the value if both exist. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24sysreset: syscon: Don't assume default value for offset and mask propertyBin Meng
Per the DT binding, <offset> is a required property. Let's abort the probe if it is missing. For the <mask> property, current codes assume a default value of zero, which is not correct either. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24Revert "Revert "riscv: sifive: fu540: Add gpio-restart support""Bin Meng
This reverts commit 23da3c682a84a2ad67a67287979dd4f5259ff607. Now the build failure of sifive_fu540_defconfig board has been fixed, revert this "revert patch". Signed-off-by: Bin Meng <bin.meng@windriver.com>
2020-07-24Revert "riscv: Allow use of reset drivers"Bin Meng
This reverts commit 958a3f464c7f8ef7e10db9feb663e9e80445ce2f. A more appropriate change below is already in mainline. Commit fd31e4fd184f ("riscv: Do not build reset.c if SYSRESET is on") Revert this patch, so that U-Boot can be built successfully for SiFive Fu540 board. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Leo Liang <ycliang@andestech.com>
2020-07-24azure: gitlab: travis: Update OpenSBI used for RISC-V testingBin Meng
Change to use OpenSBI release v0.8 generic platform images for QEMU RISC-V CI testing for azure, gitlab and travis-ci. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-24sifive: fu540: Enable SF distro bootcmdJagan Teki
Enable SPI flash(SF) distro boot command in Sifive FU540. This distro boot will read the boot script at specific location at the flash and start sourcing the same. Included the SF device at the last of the target devices list since all the rest of the devices on the list have more possibility to boot the distribution due to the size of the SPI flash is concern. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24sifive: fu540: Add boot flash script offset, sizeJagan Teki
HiFive-Unleashed-A00 has SPI flash with 32MiB size. So, let's use the script offset at the end of 4K. This way it cannot overlap any offsets being used by software components in flash layout. So, SF distrocmd will pick the script at desired script address and run. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24sifive: fu540: Mark the default env as SPI flashJagan Teki
Mark the default U-Boot environment as SPI flash since this is an on board flash device. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24env: Enable SPI flash env for SiFive FU540Jagan Teki
SPI flash device on HiFive Unleashed has 32MiB Size. This patch adds SPI flash environment after U-Boot proper partition with a size of 128KiB. SPI flash partition layout(32MiB): 0 - 34 : reserved for GPT header 35 - 39 : unused 40 - 2087 : loader1 (SPL, FSBL) 2088 - 10279 : loader2 (U-Boot proper, U-Boot) 10280 - 10535 : environment 10536 - 65494 : rootfs 65528 - 65536 : distro script Note: the loader1 must start from 40th sector even though there are 6 free sectors prior since 40th sector is nearest flash sector boundary.  Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24sifive: fu540: Add Booting from SPIJagan Teki
Add booting from SPI for SiFive Unleashed board. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24sifive: fu540: Add runtime boot mode detectionJagan Teki
Add support to detect boot mode at runtime for SiFive FU540 boards. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24riscv: sifive: fu540: Enable SiFive PWM driverPragnesh Patel
This patch enables SiFive PWM driver for the SiFive Unleashed board. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24riscv: Make SiFive HiFive Unleashed board boot againBin Meng
Commit 40686c394e53 ("riscv: Clean up IPI initialization code") caused U-Boot failed to boot on SiFive HiFive Unleashed board. The codes inside arch_cpu_init_dm() may call U-Boot timer APIs before the call to riscv_init_ipi(). At that time the timer register base (e.g.: the SiFive CLINT device in this case) is unknown yet. It might be the name riscv_init_ipi() that misleads people to only consider it is related to IPI, but in fact the timer capability is provided by the same SiFive CLINT device that provides the IPI. Timer capability is needed for both UP and SMP. Considering that the original refactor does have benefits, that it makes the IPI code more similar to U-Boot initialization idioms. It also removes some quite ugly macros. Let's do the minimal revert instead of a complete revert, plus a fixes to arch_cpu_init_dm() to consider the SPL case. Fixes: 40686c394e53 ("riscv: Clean up IPI initialization code") Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Tested-by: Leo Liang <ycliang@andestech.com>
2020-07-23Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dmTom Rini
binman support for FIT new UCLASS_SOC patman switch 'test' command minor fdt fixes patman usability improvements
2020-07-23Merge tag 'efi-2020-10-rc1-5' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-10-rc1 (5) The series provides bug fixes for: * crash in OS when accessing UEFI variables * returning from UEFI fit images to U-Boot * error handling for variable services provided by OP-TEE * error handling in EFI_FILE_PROTOCOL.Read() * missing function documentation The first patches needed to use intermediate certificates for secure boot are added. (The rest of the series requires updating sbsigntool in our CI systems.) Logging is enabled in the bootefi command.
2020-07-22Merge tag 'u-boot-rockchip-20200722' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - New rk3326 board: Hardkernel Odroid Go2; - Update board config and dts for RockPI 4/N8/N10; - Update led boot on support for roc-rk3399-pc; - Enable SPI Flash suppor for rk3328 rock64 board; - Update rockchip pcie phy to use generic framework;
2020-07-22rockchip: rock-p-n8/n10: Disable RAM_ROCKCHIP_DEBUGJagan Teki
Disable ram rockchip debug driver for ROCKPi N8/N10 boards since we have verified ram in many instances with respective U-Boot versions. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22arm64: dts: rockchip: Add u-boot, spl-boot-order for ROCKPi N10Jagan Teki
Add u-boot,spl-boot-order for ROCKPi N10, so-that it can able to boot from eMMC and SDMMC in order. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: rock-pi-n10: Enable PCI/NVMEJagan Teki
Enable PCI/NVME for M.2 Slot on RockPI-4 boards. => nvme info Device 0: Vendor: 0x144d Rev: 4L1QCXB7 Prod: S35FNX0J623292 Type: Hard Disk Capacity: 122104.3 MB = 119.2 GB (250069680 x 512) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: rock-pi-n8: Enable on board devicesSuniel Mahesh
Enable common on board devices for ROCKPi N8. - USB 2.0 Host - USB 2.0 OTG/Gadget - HDMI Out Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: evb_rk3288: Add console settingsSuniel Mahesh
Add console settings like stdin, stdout and stderr as usbkbd and vidconsole respectively for evb-rk3288 targets. This would certainly help to detect the attached video devices (like HDMI) and print the console messages on display. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: rock-pi-n10: Enable on board devicesSuniel Mahesh
Enable common on board devices for ROCKPi N10. - USB 2.0 Host - USB 3.0 Host - USB 3.0 Gadget - HDMI Out Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22arm64: dts: rockchip: Add PCIe for RockPI N10Jagan Teki
This patch adds support to enable PCIe for RockPI N10. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22arm: dts: rockchip: Add HDMI out for RockPI N8/N10Jagan Teki
This patch adds support to enable HDMI out for N10 and N8 combinations SBCs. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22ARM: dts: rockchip: Add USB for RockPI N8/N10Jagan Teki
Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0 ports. This patch adds support to enable all these USB ports for N10 and N8 combinations SBCs. Note that the USB 3.0 port on RockPI N8 combination works as USB 2.0 OTG since it is driven from RK3288. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22ARM: dts: rockchip: Add usb host0 ohci node for rk3288Jagan Teki
rk3288 and rk3288w have a usb host0 ohci controller. Although rk3288 ohci doesn't actually work on hardware, but rk3288w ohci can work well. So add usb host0 ohci node in rk3288 dtsi and the quirk in ohci platform driver will disable ohci on rk3288. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22arm: dts: rockchip: Sync rk3288 dtsi from linuxSuniel Mahesh
This sync has changes required to use HDMI CEC pin in U-Boot. Sync dts from linux v5.8-rc5 commit: "ARM: dts: rockchip: define the two possible rk3288 CEC pins" (sha1: 838980dd04e994bf81cf104fa01ae60802146b39) Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-07-22ARM: dts: rockchip: Sync ROCKPi N8/N10 dts(i) from LinuxJagan Teki
Sync ROCKPi N8/N10 dts(i) changes from Linux. commit <afd9eb880414> ("ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support") Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-07-22rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=yJagan Teki
ROC-RK3399-PC has specific set of configurations for on-board led setup. Due to easiness for user to know the state of the board roc-rk339-pc board code will setup the low power led on/off, and waiting for user to press power key and then glow full power led. All this needs to happen only during power-on-reset not for soft reset or WDT. Also, it is not a proper usage to ask the user to press the Power key if the board connected remotely, so add the environment variable 'pwr_key' to check as well. So, user need to press Power key only - during POR - pwr_key=y Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: Separate the reset cause from display cpuinfoJagan Teki
reset cause is a generic functionality based on the soc cru registers in rockchip. This can be used for printing the cause of reset in cpuinfo or some other place where reset cause is needed.  Other than cpuinfo, reset cause can also be using during bootcount for checking the specific reset cause and glow the led based on the reset cause. So, let's separate the reset cause code from cpuinfo, and add a check to build it for rk3399, rk3288 since these two soc are supporting reset cause as of now. Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: Don't clear the reset status regJagan Teki
reset reason can be used several stages of U-Boot bootloader like SPL, U-Boot proper based on the requirements. Clearing the status register end of get_reset_cause will end up showing the wrong reset cause when it read the second time. For example, if board resets, SPL reads the reset status as RST whereas U-Boot proper reads the status as POR. However, based on the latest testing clearing reset status won't be required for determine the last reset cause or following resets. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: tpl: Remove board_early_init_f()Kever Yang
There is no need for board_early_init_f() in TPL, anything like this should goes to SPL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: roc-rk3399-pc: Add custom led_setup()Jagan Teki
roc-rk3399-pc has some specific requirements to support LEDS, environment. board detection and etc prior to U-Boot proper. So as of now SPL would be a better stage for these custom board requirements to support unlike TPL. Adding few of these custom requirements like LEDS in TPL would require extra code pulling and also the size of TPL can grow. So, this patch moves the leds code from TPL into SPL Board init led_setup code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (split tpl.c change as separate patch) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: rk3399: Add weak led_setup()Jagan Teki
Add weak led_setup() so that board which has an uncommon led setup code that can make use of custom implementation. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: rk3288: Add OF board setupJagan Teki
The new rk3288 revision rk3288w has some changes with respect to legacy rk3288 like hclk_vio in cru and usb host0 ohci. Linux clock driver already handle this via rockchip,rk3288w-cru compatible. USB ohci host can enable via dts for rk3288w based boards. So, add fdt board setup code to update cru compatible with rk3288w-cru compatible if the SOC revision is RK3288W. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: Add rk3288 SoC detection helperJagan Teki
Rockchip SoC's has a new revision chip for rk3288 SoCs. RK3288 has a new revision chip called RK3288W which is similar but different hclk_vio clock and fixed OHCI host. Add common Rockchip SoC detection helper to support this rk3288w detection. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22arm64: dts: rockchip: Add Radxa ROCK Pi 4C supportJagan Teki
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled GPIO pin change compared to 4B, 4C. So, add or enable difference nodes/properties in 4C dts by including common dtsi. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22arm64: dts: rockchip: Add ROCKPi 4A/4B supportJagan Teki
Rock PI 4 has 3 variants of hardware platforms called RockPI 4A, 4B, and 4C. - Rock PI 4A has no Wif/BT. - Rock PI 4B has AP6256 Wifi/BT, PoE. - Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enable GPIO pin change compared to 4B, 4C So move common nodes, properties into dtsi file and include on respective variant dts files. Use 4B dts into default rock-pi-4 defconfig until we find any solution for dynamic detection of these variants. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: firefly-rk3399: enable CONFIG_USB_DWC3Kever Yang
To fix below build error: drivers/usb/host/built-in.o: In function `xhci_dwc3_remove': drivers/usb/host/xhci-dwc3.c:174: undefined reference to `dwc3_shutdown_phy' drivers/usb/host/built-in.o: In function `xhci_dwc3_probe': drivers/usb/host/xhci-dwc3.c:130: undefined reference to `dwc3_setup_phy' Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: rk3399: Add default env to support compressed kernel ImageKever Yang
Add default kernel_comp_addr_r and kernel_comp_size to support boot from compressed kernel Image, this space is temporarily used during decompress according to README.distro. Reported-by: Tian Yuanhao <tianyuanhao@aliyun.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: sdram: fix dram_init_banksizeAlex Bee
Currently 2.5 GB is calculated as DRAM size for a 1 GB RK322x board if CONFIG_SPL_OPTEE is set. This is troublesome when booting a linux kernel since this size will be injected in FDT of the kernel. gd->bd->bi_dram[0].start (which is basically CONFIG_SYS_SDRAM_BASE) must not be taken into consideration for calculation of second bank size, since this offset is already included in calculation of "top". After applying this patch 992 MB (1024 MB - 32 MB reserved for optee-os) is correctly calculated and has also been verified on 2 GB boards. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22pci: rockchip: Drop legacy PHY driverJagan Teki
Drop the legacy PHY driver and it's associated code since the PHY handling driver now part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22pci: rockchip: Switch to generic-phyJagan Teki
Now, we have a PCIe PHY driver as part of the Generic PHY framework. Let's use it instead of legacy PHY driver. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22phy: Add Rockchip PCIe PHY driverJagan Teki
Add the Rockchip PCIe PHY driver as part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: roc-rk3399-pc: Disable RAM_ROCKCHIP_DEBUGJagan Teki
Disable ram rockchip debug driver for roc-rk3399-pc boards since we have verified ram in many instances with respective U-Boot versions. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
generated by cgit (git 2.34.1) at 2024-12-24 12:23:13 +0000