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2020-04-06arm64: zynqmp: Add support for debug uart also for U-Boot properMichal Simek
board_early_init_f() is the right location where debug uart can be configurated (after MIO initialization). The patch is taking this call from SPL to also make it available for U-Boot proper. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06lib: Improve _parse_integer_fixup_radix base 16 detectionMichal Simek
Base autodetection is failing for this case: if test 257 -gt 3ae; then echo first; else echo second; fi It is because base for 3ae is recognized by _parse_integer_fixup_radix() as 10. The code detects the first char which is not between 'a'/'A' or 'f'/'F' to change base from dec to hex. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Shiril Tichkule <shirilt@xlinx.com>
2020-04-06arm64: zynqmp: Enable netconsole for ZynqMPMichal Simek
It is nice feature Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp Add support for zcu111 revAMichal Simek
Add low level configuration for zcu111 for easier SPL run. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06net: eth-uclass: Fix message if mac is coming from DT or ROMMichal Simek
When local-mac-address DT property is specified it is reported the same way as address read from eeprom/ROM. Show properly if mac address is coming from DT or ROM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Enable i2c mux support for all boardsMichal Simek
zc702/zc706 have pca9548 i2c muxes that's why enable the driver by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp Add support for zcu102 rev1.1Michal Simek
rev1.1 has different DDR sodimm module that's why it requires different DDR configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Add third backup bootmodeMichal Simek
I found this issue when was running py/test.py on zcu102 which is for me by default setup to SD boot mode without any way to change boot mode. Alternative software bootmode selection to JTAG is not working because JTAG mode is 0 which also reset value for it. That's why saying SPL to take u-boot.itb from RAM instead of SD in SD boot mode is not possible via alternative bootmode selection. That's why setup third boot mode to JTAG(BOOT_DEVICE_RAM) as final fallback. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06watchdog: cadence: Remove DECLARE_GLOBAL_DATA_PTR from driverMichal Simek
gd is not used in the driver that's why declaration is not needed at all. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06net: zynq-gem: Setup and use mdio base separatelyMichal Simek
Not all IPs have private MDIO bus and MDIO bus should be shared between several IPs. In past one patch tried to implement it (https://lists.denx.de/pipermail/u-boot/2018-February/319285.html) in pretty raw way but it is not the cleanest solution. This patch is just taking the part of that solution to be able to handle it over releases without conflicts. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Do not print message about boot deviceMichal Simek
This information is shown already that's why there is no reason to print it again via custom prints. U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 09:59:05 +0100) mmc boot Trying to boot from MMC1 or U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 10:49:46 +0100) qspi boot Trying to boot from SPI Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Check firmware node when driver is enabledMichal Simek
ZynqMP mini configurations works without PMU firmware that's why there is no reason to enable the driver and check if it was probed properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: versal: Enable support for Gigadevice/ISSI flashesT Karthik Reddy
Enable support for Gigadevice/ISSI flash parts for Versal platform. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06env: Make mmc as default option for CONFIG_ENV_FAT_INTERFACEMichal Simek
All configs are using mmc as default fat interface. That's why make it default for everybody. The reason for this patch is to make it default for Xilinx Zynq platform which is not listed there. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Enable DM for CFI NOR flashMichal Simek
With multi defconfig NOR flash information about NOR should be taken from DT that's why there is no reason to specify address and sizes via fixed config. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Do not report NOR flash detection failureMichal Simek
With multi defconfig targeting several board configurations bug report like below is so verbose. Flash: ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB 0 Bytes Do not report that message and simply say "Flash: 0 Bytes" because most of Zynq boards are using different type of flashes than NOR. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06nand: raw: zynq: Do not try to probe driver if nand flash is disabledMichal Simek
There is no reason to continue when DT status property indicates that NAND flash is disabled. But that means that NOR flash should be present that's why try it find it out. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-06nand: raw: Do not free xnand structureMichal Simek
xnand structure is private data structure and it is handled by core and probe shouldn't touch it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-06ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configurationMichal Simek
There is no real need to include full DT when only some nodes are enough to use. It will save some space. Retested with FSBL for initial SoC setup. SPL didn't work. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06net: zynq_gem: Add cache flush to zynq_gem_free_pktAshok Reddy Soma
Add cache flush to zynq_gem_free_pkt. This is necessary because some net routines would modify this buffer in place. The cache_invalidate in the zynq_gem_recv function would cause the modifications to the buffer to overwrite the DMA from the GEM, if cache coherency is not enabled in the GEM, the next time the buffer is in use. Flushing the cache when the buffer is no longer in use by the net functions ensures that the GEM DMA is going to take place into a clean buffer. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Switch to single zynq configurationsMichal Simek
There are a lot of zynq configurations which can be merged together and use only one for all. The similar change has been done for ZynqMP by commit be1b6c32d940 ("arm64: zynqmp: Use zynqmp_virt platform") Build SPL with u-boot.img for zc706 like this. export DEVICE_TREE=zynq-zc706 && make xilinx_zynq_virt_defconfig && make -j8 u-boot.img is generic for all boards. Tested on Zybo, zc702, zc706, zc770-xm011-x16, cc108 and microzed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06Makefile: Add environment variable DEVICE_TREE to headerMichal Simek
Users have option to overwrite default device tree (CONFIG_DEFAULT_DEVICE_TREE) via environment variable DEVICE_TREE. Feature has been added long time ago by commit 74de8c9a1672 ("dts/Makefile: Build the user specified dts") for a little bit different reason. But this variable can be also used for different purpose like choosing proper configuration from FIT image in SPL. And this is the functionality I would like to use on Xilinx Zynq devices that current u-boot.img can be composed in the same way based on OF_LIST and different configuration is taken based on platform specific SPL. SPL requires low level ps7_init_gpl configuration that's why different boards require different SPL with fixed board_fit_config_name_match(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-06ARM: zynq: Change zc770 xm011 Nand x16 configurationsMichal Simek
Instead of symlink include origin file and just change model description. Difference is not in DT but in ps7_init configurations which is taken based on device tree name that's why the same DT can't be used. Also update model and update comments to match configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06env: Kconfig: Adding default values for MicroblazeVaralaxmi Bingi
This patch will add default values for ENV_OFFSET and ENV_SECT_SIZE for Microblaze. Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Move pinctrl node under firmware nodeMichal Simek
Pinctrl is handled via firmare interface that's why move it there without reg property and new compatible string. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Fix GIC compatible propertyMichal Simek
dtbs_check is showing warning around GIC compatible property as interrupt-controller@f9010000: compatible: ['arm,gic-400', 'arm,cortex-a15-gic'] is not valid under any of the given schemas Similar change has been done also by Linux kernel commit 5400cdc1410b ("ARM: dts: sunxi: Fix GIC compatible") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Fix addresses in partition definitionsMichal Simek
Node name should be <name>@<address> which is not how partitions are described. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Fix addresses in partition definitionsMichal Simek
Node name should be <name>@<address> which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Sync DP subsystemMichal Simek
Sync DP subsystem with the latest state in Xilinx U-Boot repository. This binding hasn't been approved in mainline Linux but it is much better than ancient version which this patch removes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Do not duplicate flash partition label propertyAmit Kumar Mahapatra
In kernel 5.4, support has been added for reading MTD devices via the nvmem API. For this the mtd devices are registered as read-only NVMEM providers under sysfs with the same name as the flash partition label property. So if flash partition label property of multiple flash devices are identical then the second mtd device fails to get registered as a NVMEM provider. This patch fixes the issue by having different label property for different flashes. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: dts: zynqmp: Add clk cells for sdhciAshok Reddy Soma
Add clock-cells and clock-output-names for sdhci0 and sdhci1. These are needed for linux sdhci driver from 5.4 version onwards. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Remove second copy of reset-controllerMichal Simek
Reset controller is handled via firmware that's why it should be the part of firmware node. Origin solution hasn't been removed when above change was applied by commit b07e97b4ba27 ("arm64: zynqmp: Use reset header in zynqmp.dtsi"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP BoardsManish Narani
Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards. User can remove this property to enable the UHS mode. This is to keep the same speed (HS) modes across all the stages of the Linux Boot. Due to power cycling limitation of some of the ZynqMP boards, some SD cards don't get power cycled and are failing in Linux. Signed-off-by: Manish Narani <manish.narani@xilinx.com>
2020-04-06arm64: zynqmp: Sync zynqmp fpga manager with mainlineNava kishore Manne
Sync zynqmp fpga manager with mainline. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Remove unused zynqmp-clk.dtsiMichal Simek
All boards have been converted to firmware based driver that's why we can remove this file now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Fix spi name nodeMichal Simek
None name address should be aligned with address. DTC 1.5.1 is reporting issues related to that. arch/arm/boot/dts/zynq-zc770-xm010.dts:106.10-119.4: Warning (spi_bus_reg): /amba/spi@e0007000/flash@0: SPI bus unit address format error, expected "1" arch/arm/boot/dts/zynq-zc770-xm013.dts:101.19-109.4: Warning (spi_bus_reg): /amba/spi@e0006000/eeprom@0: SPI bus unit address format error, expected "2" Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Update Copyright years to 2020Michal Simek
Trivial change. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Replace gpio-key,wakeup with wakeup sourceMichal Simek
The same change has been done for Zynq by commit 1241c72b6db1 ("ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property") in mainline Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source propertySudeep Holla
Most of the legacy "gpio-key,wakeup" boolean property is already replaced with "wakeup-source". However few occurrences of old property has popped up again, probably from the remnants in downstream trees. Replace the legacy properties with the unified "wakeup-source" property introduced in the Linux kernel commit 700a38b27eef ("Input: gpio_keys - switch to using generic device properties") Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: dts: zc702: Fix I2C bus warningsQuanyang Wang
The dtc has new checks for I2C and SPI buses. Fix the warnings in node names and unit-addresses. Warning from Linux kernel: arch/arm/boot/dts/zynq-zc702.dts:187.13-190.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@52: I2C bus unit address format error, expected "34" arch/arm/boot/dts/zynq-zc702.dts:191.13-194.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@53: I2C bus unit address format error, expected "35" arch/arm/boot/dts/zynq-zc702.dts:195.13-198.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@54: I2C bus unit address format error, expected "36" Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Enable cache command for mini mtest configurationMichal Simek
Enable cache commands by default for mtest configuration. It is good to be able to enable/disable caches when you test memory. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06configs: versal: Add CONFIG_DISTRO_DEFAULTS to versal defconfigT Karthik Reddy
Add DISTRO_DEFAULTS config to versal virt defconfig file which is suitable for booting general purpose Linux distributions. Remove other configs which are selected by default by DISTRO_DEFAULTS configuration. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Print multiboot register value in EL3Michal Simek
Multi boot register can be used for using different boot images and design better boot strategy. Let EL3 SPL or U-Boot to read it and print it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-04Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- net: sh_eth: Init the hardware before PHY access
2020-04-04Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- verdin-imx8mm board reST documentation update - Intel Edison board ACPI table I2C/USB minor updates - Fix a regression of ns16550 serial driver that breaks Intel Edison
2020-04-04serial: ns16550: Fix ordering of getting base addressBin Meng
Currently the driver gets ns16550 base address in the driver probe() routine, which may potentially break any ns16550 wrapper driver that does additional initialization before calling ns16550_serial_probe(). Things are complicated that we need consider ns16550 devices on both simple-bus and PCI bus. To fix the issue we move the base address assignment for simple-bus ns16550 device back to the ofdata_to_platdata(), and assign base address for PCI ns16550 device in ns16550_serial_probe(). This is still not perfect. If any PCI bus based ns16550 wrapper driver tries to access plat->base before calling probe(), it is still subject to break. Fixes: 720f9e1fdb0c9 ("serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()") Reported-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-04x86: acpi: Describe USB 3 host controller found on Intel TangierAndy Shevchenko
USB 3 host controller may be described in ACPI to allow users alter the properties or other features. Describe it for Intel Tangier SoC. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-04x86: acpi: Add I²C timings to Intel Merrifield platformAndy Shevchenko
There is established way to provide I²C timings, or actually counters, to the OS via ACPI. Fill them for Intel Merrifield platform. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-04doc: board: verdin-imx8mm: use mainline TF-AIgor Opaniuk
1. Update build steps where mainline Trusted Firmware A is used. 2. Fix BL31_BASE to the proper one according to the SoC reference manual. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-04x86: acpi: Refactor XSDT handling in acpi_add_table()Andy Shevchenko
There is no need to have an assignment to NULL for XSDT pointer. Therefore, no need to assign it when rsdt_address is not set. Because of above changes we may decrease indentation level as well. While here, drop unnecessary parentheses. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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