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2019-04-23mmc: stm32_sdmmc2: Fix r1b timeout issueChristophe Kerello
On response type r1b, if DTIME is not defined or too short, the Datatimeout and DPSM flag occurs. Like the DPSM is activated all next data transfer will be frozen. To avoid this freeze: -The driver must define a DTIME on all r1b response type. -DTIME of SDMMC must be defined for alls stop transmission (for read and write request) even if MMC_RSP_BUSY is not set. -If busy timeout occur, an abort request must be sent to reinitialize the DPSM. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com>
2019-04-23mmc: stm32_sdmmc2: Update DT properties with v4.19 bindingsPatrick Delaunay
Some properties name has been updated: - st,dirpol becomes st,sig-dir - st,negedge becomes st,neg-edge - st,pin-ckin becomes st,use-ckin Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23ARM: dts: stm32: Update sdmmc binding for stm32mp157c-ed1Patrice Chotard
Update some sdmmc properties which have been updated with v4.19 DT bindings: - st,dirpol becomes st,sig-dir - st,negedge becomes st,neg-edge - st,pin-ckin becomes st,use-ckin Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23ARM: dts: stm32: Update sdmmc binding for stm32h743i-evalPatrice Chotard
Update some sdmmc properties which have been updated with v4.19 DT bindings: - st,dirpol becomes st,sig-dir - st,negedge becomes st,neg-edge - st,pin-ckin becomes st,use-ckin Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23board: stm32f746-disco: Get MII/RMII phy_mode from DTPatrice Chotard
This is needed to make ethernet work on stm32f746-eval which uses MII mode. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-23configs: stm32f746-disco: Enable SPI_FLASH_MACRONIXPatrice Chotard
This config file is shared between stm32f746-disco and stm32f769-disco. These 2 boards doesn't embed the same qspi flash (Micron n25q128a on f746-disco, Macronix mx66l51235l on f769-disco). To be able to use Macronix mx66l51235l on F769-disco, flags SPI_FLASH_MACRONIX must be enabled. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23configs: stm32f746-disco: enable CONFIG_DISTRO_DEFAULTSPatrice Chotard
Allows to boot linux distribution Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23configs: stm32f746-disco: update EXTRA_ENV_SETTINGSPatrice Chotard
Allows to boot linux distribution. As stm32f746-disco and stm32f769-disco are sharing the same defconfig file, in case of stm32f769-disco build, "fdtfile=..." must be updated with the correct stm32f769 DTB file name. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23mmc: arm_pl180_mmci: Sync compatible with kernelPatrice Chotard
Initially the compatible string was wrongly set to "st,stm32f4xx-sdio". Use compatible string used by kernel instead and identify mmci variant using "arm,primecell-periphid" property. Currently, the DM part of mmci driver is only used by STM32 SoCs, that's why the switch case gets only one entry. It will be populated easily with new variant in the future. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23pinctrl: stm32: Add st,stm32f769-pinctrl compatible stringPatrice Chotard
Due to DT kernel synchronisation, add new pinctrl compatible string for stm32f769. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23ARM: dts: stm32: Restore old usart1 clock bindings for stm32f7Patrice Chotard
As U-boot stm32f clock driver doesn't support new bindings for auxiliary clocks (clocks = <&rcc 1 ....>), restore old bindings for usart1 to get console output. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23ARM: dts: stm32: Sync DT with v4.20 kernel for stm32h7Patrice Chotard
Synchronize stm32h7 device tree with kernel v4.20. U-boot DT files and pinctrl bindings are updated, useless nodes are removed and gpio compatible added. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23ARM: dts: Migrate U-boot nodes to U-boot DT files for stm32h7Patrice Chotard
In order to prepare and ease future DT synchronization with kernel DT, migrate all U-boot specific nodes/properties/addons to U-boot DT files. As sdmmc is not yet supported on kernel side, sdmmc nodes are located in eval-u-boot and disco-u-boot DT files. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7Patrice Chotard
Synchronize stm32f7 device tree with kernel v4.20. All pinctrl bindings are updated. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23ARM: dts: stm32: Migrate U-boot nodes to U-boot DT files for stm32f7Patrice Chotard
In order to prepare and ease future DT synchronization with kernel DT, migrate all U-boot specific nodes/properties/addons to U-boot DT files. Migrate also DT nodes which are not yet available on kernel DT side as ethernet, ltdc and qspi nodes. Fix ethernet_mii pins and add missing qspi_pins for stm32746g-eval Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23ARM: dts: stm32: Sync DT files with v4.20 kernel for stm32f4Patrice Chotard
Synchronize stm32f7 device tree with kernel v4.20. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23ARM:dts: stm32: sort nodes by alphabetical order in f4 u-boot filesPatrice Chotard
Sort nodes alphabetically to be coherent with all others STM32 DT files. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-18Merge tag 'arc-for-2019.07' of git://git.denx.de/u-boot-arcTom Rini
In this small series we migrate ARC boards to DM_MMC so we're hopefully are good now and our boards will be kept in U-Boot for some more time :)
2019-04-18ARC: [plat-axs10x]: migrate to DM_MMCEugeniy Paltsev
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-18ARC: [plat-hsdk]: migrate to DM_MMCEugeniy Paltsev
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-18ARC: dwmmc: Adding DesignWare MMC driver support for ARC devboardsEugeniy Paltsev
Add the DM_MMC-compatible DesignWare MMC driver support for Synopsys ARC devboards. It is created to switch ARC devboards to use DM_MMC. It required information such as clocks (Bus Interface Unit clock, Card Interface Unit clock) and SDIO bus width. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-17Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
- drop non-DM code from ti_qspi - support spi-mem for ti_qspi
2019-04-17arm: am57xx: cl-som-am57x: remove board supportUri Mashiach
U-Boot support for the CL-SOM-AM57x module is no longer required. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
2019-04-17Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
- Convert DM_MMC and DM_SCSI - A20, R40, H6 Linux dts(i) sync - CLK, RESET support for sunxi, sun8_emac net drivers
2019-04-17Merge tag 'xilinx-for-v2019.07' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx/FPGA changes for v2019.07 fpga: - Add support for external data in FIT - Extend testing for external data case - Inform user about a need to run post config on Zynq arm: - Tune zynq command functions - Fix internal variable setting arm64: - Add support for zc39dr decoding - Disable WDT for zcu100 - Small changes in reset_reason() - Some DT changes (spi) - Tune qspi-mini configuration - Remove useless eeprom setting - Fix two sdhci boot case spi: - Fix tap delay programming clk: - Enable i2c in SPL net: - Fix gem phydev handling - Remove phy detection code from gem driver general: - Correct EXT_DTB usage for MULTI_DTB_FIT configuration
2019-04-17Merge tag 'uniphier-v2019.07' of git://git.denx.de/u-boot-uniphierTom Rini
UniPhier SoC updates for v2019.07 - Sync DT with Linux 5.1-rc4 - Enable CONFIG_SUPPORT_EMMC_RPMB for uniphier_v8_defconfig
2019-04-17spi: ti_qspi: Convert to spi-mem opsVignesh Raghavendra
Convert driver to use spi-mem ops in order to support accelerated MMIO flash interface in generic way and for better performance. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17spi: ti_qspi: Drop non DM codeVignesh Raghavendra
Now that all boards using TI QSPI have moved to DM and DT, drop non DM code completely. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [jagan: update MIGRATION.txt, rebase config_whitelist.txt] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17sunxi: update SATA driver to always use DM_SCSIAndre Przywara
It seems like the Allwinner SATA driver is already quite capable of using the driver model, so we can force this on all boards and can remove support for a non-DM_SCSI build. This removes the warning about boards with SATA ports not being DM_SCSI compliant. It also takes the opportunity to move the driver out of the board/sunxi directory to join its siblings in drivers/ata, and to make it a proper Kconfig citizen. The board defconfigs stay untouched. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: select DM_SCSI separately] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17arm: sunxi: Enable DM_MMC and DM_SCSIJagan Teki
- Enable DM_MMC if MMC defined - Enable DM_SCSI if SCSI defined globally through Allwinner platform, the effected SoC families and boards will make use of MMC and SCSI subsystems in driver-model. Tested DM_MMC in one board from A64, H6, H5, H3, R40, A83T, A20, A10 SoCs. Tested-by: Pablo Sebastián Greco <pgreco@centosproject.org> # BPI-M2-Ultra Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17ARM: dts: sun8i-r40-bananapi-m2-berry: Enable AHCIJagan Teki
Enable ahci node for BPI-M2-Berry, this would require since we have DM_SCSI enabled on the respective SoC. Unable to sync the same node from Linux, since the similar change is still in Linux ML. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17ARM: dts: a20-wits-pro-a20-dkt: Enable AHCIJagan Teki
Enable ahci node for a20-wits-pro-a20-dkt, this would require since we have DM_SCSI enabled on the respective SoC. Right now, ahci enabled in -u-boot.dtsi and will remove once same supported by Linux. Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17ARM: dts: a20-m5: Enable AHCIJagan Teki
Enable ahci node for sun7i-a20-m5.dts, this would require since we have DM_SCSI enabled on the respective SoC. No need to send patch to Linux for this change, since this dts is U-Boot specific. Cc: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17board: sunxi: Add R40 sata compatibleJagan Teki
Add sata compatible for R40. Cc: Pablo Sebastián Greco <pgreco@centosproject.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17arm: allwinner: dts: a20: Sync A20 dts(i) files from Linux 5.1-rc2Jagan Teki
Sync sun7i-a20 dts(i) files from Linux 5.1-rc2 Linux commit details about the sun7i-a20* sync: "ARM: dts: sun7i: bananapi: Add GPIO banks regulators" (sha1: 09c6572290f018d73ec2e812e28bada34d41815f) Here are U-Boot specific dts changes. - s/uart0_pins_a/uart0_pb_pins for sun7i-a20-ainol-aw1.dts sun7i-a20-m5.dts sun7i-a20-primo73.dts sun7i-a20-yones-toptech-bd1078.dts sunxi-itead-core-common.dtsi - s/gmac_pins_mii_a/gmac_rgmii_pins for sun7i-a20-m5.dts - drop i2c0, i2c1 pins from sunxi-itead-core-common.dtsi - drop mmc0 pins from sun7i-a20-primo73.dts Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17arm: allwinner: r40: Sync R40 dts(i) files from Linux 5.1-rc2Jagan Teki
Sync sun8i-r40 dts(i) files from Linux 5.1-rc2 Linux commit details about the sun8i-r40* sync: "ARM: dts: sun8i: r40: bananapi-m2-ultra: Add Bluetooth device node" (sha1: 1e5f1db4ccd8348a21da55bff82f4263000879ef) Linux commit details about the sun8i-v40* sync: "ARM: dts: sunxi: Fix I2C bus warnings" (sha1: 0729b4af5753b65aa031f58c435da53dbbf56d19) Cc: Pablo Sebastián Greco <pgreco@centosproject.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17ARM: uniphier_v8: enable CONFIG_SUPPORT_EMMC_RPMBMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-04-17ARM: dts: uniphier: sync with Linux 5.1-rc4Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-04-16board: sunxi: gmac: Remove Ethernet clock and resetJagan Teki
Since Ethernet clock and reset is now handling via CLK and RESET frameworks via driver API's remove explicit ccm writes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-16net: sun8i_emac: Add CLK and RESET supportJagan Teki
Add CLK and RESET support for sun8i_emac driver to enable TX clock and reset pins via CLK and RESET framework. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Lothar Felten <lothar.felten@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-16net: sun8i_emac: Retrieve GMAC clock via 'syscon' phandleJagan Teki
Unlike other Allwinner SoC's R40 GMAC clock control register is locate in CCU, but rest located via syscon itself. Since the phandle property for current code look for 'syscon' and it will grab the respective ccu or syscon base address based on DT property defined in respective SoC dtsi. So, use the existing 'syscon' code even for R40 for retrieving GMAC clock via CCU and update the register directly in sun8i_emac_set_syscon instead of writing it separately using ccm base. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Lothar Felten <lothar.felten@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-16net: sunxi_emac: Add CLK supportJagan Teki
Add CLk support for sunxi_emac to enable AHB_EMAC clock via CLK framework. Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-16clk: sunxi: r40: Fix GMAC reset reg offsetJagan Teki
GMAC reset reg offset added by below commit seems to assume it as EMAC but R40 indeed using GMAC. "clk: sunxi: Implement EMAC, GMAC clocks, resets" (sha1: 68620c9698f109c1f001f80d282138a5c67cabef) So, fix by updating the reg offset for RST_BUS_GMAC. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-16arm64: zynqmp: fix preprocessor check for SPL_ZYNQMP_TWO_SDHCILuca Ceresoli
A missing CONFIG_ prefix while checking for this Kconfig variable makes the check always fail. Fix it. While there also switch from the '#if defined' form to the '#ifdef' form as the other checks in this function. Fixes: 35e2b92344b1 ("arm64: zynqmp: Fix logic around CONFIG_ZYNQ_SDHCI") Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16arm64: zynqmp: Remove eeprom settingMichal Simek
By moving to DM_I2C there is no need to specify any eeprom configuration because it is read from DT. Reported-by: Sreeja Vadakattu <sreeja.vadakattu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16net: gem: Remove phy autodetection codeMichal Simek
There is no reason to detect phy when core is doing it for us. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16net: zynq_gem: Modify phy supported features after max-speed was setSiva Durga Prasad Paladugu
The phydev supported features were reset in phy_set_supported() so, move the setting of driver supported features after this so that it wont lost in phy_set_supported(). Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16Makefile: Prioritize external dtb if definedMichal Simek
Prioritize external dtb if its passed via EXT_DTB than the dtb that was built in the tree. With this patch it appends the specified external dtb to the u-boot image. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-16arm: zynq: Add an info message about post configSiva Durga Prasad Paladugu
Post configuration cant be run at u-boot as u-boot didn't has any info about the design.So,this patch adds an info message that post config was not run and needs to be run manually if needed. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16arm64: zynqmp: Add idcode for new RFSoC silicon ZU39DRSiva Durga Prasad Paladugu
This patch adds "zu39dr" to the list of zynqmp devices The zu39DR is the new RFSoC silicon with id value of 0x66. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit (git 2.34.1) at 2025-01-01 06:48:41 +0000