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2019-01-18sunxi: usb: Switch to Generic host controllersJagan Teki
Onc of key blocker for using USB Generic host controller drivers in Allwinner are CLK and RESET drivers, now these available for USB usage. So switch sunxi USB use EHCI and OHCI Generic controllers. Enabling USB is wisely a board choise, So Enable USB_OHCI_HCD where it already have USB_EHCI_HCD Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18musb-new: sunxi: Use CLK and RESET supportJagan Teki
Now clock and reset drivers are available for respective SoC's so use clk and reset ops on musb driver. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Marek Vasut <marex@denx.de>
2019-01-18reset: Add reset validJagan Teki
Add reset_valid to check whether given reset is valid or not. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18phy: sun4i-usb: Use CLK and RESET supportJagan Teki
Now clock and reset drivers are available for respective SoC's so use clk and reset ops on phy driver. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Marek Vasut <marex@denx.de>
2019-01-18arm: sunxi: Enable CLK, RESETJagan Teki
CLK and DM_RESET drivers are now available for all of the Allwinner platforms, so enable them in arch/arm/Kconfig Enabling CLK will select DM_RESET by default. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18sunxi: A64: Update sun50i-a64-ccu.hJagan Teki
Update sun50i-a64-ccu.h from the Linux sunxi/dt64-for-4.20 tree: commit 679294497be31596e1c9c61507746d72b6b05f26 Author: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz> Date: Wed Sep 26 19:48:24 2018 +0000 arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay This should be a part of previous sync patch from commit 1b39a1834ed182bbd8036a5cd74a9ea111fa4691 Author: Andre Przywara <andre.przywara@arm.com> Date: Mon Oct 29 00:56:47 2018 +0000 sunxi: A64: Update .dts/.dtsi files Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18clk: sunxi: Add Allwinner A80 CLK driverJagan Teki
Add initial clock driver for Allwinner A80. - Implement UART bus clocks via ccu_clk_gate table for A80, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement UART bus resets via ccu_reset table for A80, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18ARM: dts: sun8i: Update A80 dts(i) from Linux-v4.18-rc3Jagan Teki
Update all A80 devicetree dtsi and dtsi files from Linux-v4.18-rc3 with below commits. arch/arm/boot/dts/sun9i-a80*: commit 190e3138f9577885691540dca59c2f07540bde04 Merge: cafc87023b0d a7affb13b271 Author: Arnd Bergmann <arnd@arndb.de> Date: Tue Mar 27 14:58:00 2018 +0200 Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt include/dt-bindings/*/sun9i-a80-*: commit 783ab76ae553abc23f80ef7511052d055697531b Author: Chen-Yu Tsai <wens@csie.org> Date: Sat Jan 28 20:22:36 2017 +0800 clk: sunxi-ng: Add A80 Display Engine CCU Note: sun9i-a80-cx-a99.dts is updated only uart0, since the same dts is not available in Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18clk: sunxi: Add Allwinner H6 CLK driverJagan Teki
Add initial clock driver for Allwinner H6. - Implement UART bus clocks via ccu_clk_gate table for H6, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement UART bus resets via ccu_reset table for H6, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18clk: sunxi: Implement UART resetsJagan Teki
Implement UART resets for all relevant Allwinner SoC clock drivers via ccu reset table. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18clk: sunxi: Implement UART clocksJagan Teki
Implement UART clocks for all Allwinner SoC clock drivers via ccu clock gate table. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18clk: sunxi: Add Allwinner V3S CLK driverJagan Teki
Add initial clock driver for Allwinner V3S. - Implement USB bus and USB clocks via ccu_clk_gate table for V3S, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset table for V3S, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18clk: sunxi: Add Allwinner R40 CLK driverJagan Teki
Add initial clock driver for Allwinner R40. - Implement USB bus and USB clocks via ccu_clk_gate for R40, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset table for R40, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18clk: sunxi: Add Allwinner A83T CLK driverJagan Teki
Add initial clock driver for Allwinner A83T. - Implement USB bus and USB clocks via ccu_clk_gate table for A83T, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset table for A83T, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18clk: sunxi: Add Allwinner A23/A33 CLK driverJagan Teki
Add initial clock driver for Allwinner A23/A33. - Implement USB bus and USB clocks via ccu_clk_gate table for A23/A33, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset table for A23/A33, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18clk: sunxi: Add Allwinner A31 CLK driverJagan Teki
Add initial clock driver for Allwinner A31. - Implement USB ahb1 and USB clocks via ccu_clk_gate table for A31, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB ahb1 and USB resets via ccu_reset table for A31, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18clk: sunxi: Add Allwinner A10s/A13 CLK driverJagan Teki
Add initial clock driver for Allwinner A10s/A13. - Implement USB ahb and USB clocks via ccu_clk_gate table for A10s/A13, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB resets via ccu_reset table for A10s/A13, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18clk: sunxi: Add Allwinner A10/A20 CLK driverJagan Teki
Add initial clock driver for Allwinner A10/A20. - Implement USB ahb and USB clocks via ccu_clk_gate table for A10/A20, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB resets via ccu_reset table for A10/A20, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18clk: sunxi: Add Allwinner H3/H5 CLK driverJagan Teki
Add initial clock driver for Allwinner H3/H5. - Implement USB bus and USB clocks via ccu_clk_gate table for H3/H5, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset table for H3/H5, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18reset: Add Allwinner RESET driverJagan Teki
Add common reset driver for all Allwinner SoC's. Since CLK and RESET share common DT compatible, it is CLK driver job is to bind the reset driver. So add CLK bind call on respective SoC driver by passing ccu map descriptor so-that reset deassert, deassert operations held based on ccu reset table defined from CLK driver. Select DM_RESET via CLK_SUNXI, this make hidden section of RESET since CLK and RESET share common DT compatible and code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18clk: Add Allwinner A64 CLK driverJagan Teki
Add initial clock driver for Allwinner A64. Implement USB clock enable and disable functions for OHCI, EHCI, OTG and USBPHY gate and clock registers via ccu clk gate table. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18board: sun50i-h5: Add Emlid Neutis N5 supportAleksandr Aleksandrov
Emlid Neutis N5 is a SoM based on Allwinner H5, has a WiFi & BT module, DDR3 RAM and eMMC. - add neutis-devboard target to dtb makefile - add dtsi file for Neutis N5 needs - add config file for Neutis N5 Dev board Signed-off-by: Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [jagan: update proper commit head] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18sunxi: board: Add i2c initialization for sun50iStefan Mavrodiev
To use TWI0/1/2 the user can select CONFIG_I2C#_ENABLE. However even the controller is enabled, the mux for the pins are not set. This patch follows the existing mux method. Since the pads are different, separate check is added for each i2c. Tested with A64-SOM204 board. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-01-18configs: Remove am43xx_evm_ethboot_defconfigVignesh R
am43xx_evm_ethboot_defconfig is not being actively used and has not been moved to DM or DT. Also, ethboot cannot be tested on AM43xx EVM as such due EVM limitations. Therefore delete it. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-01-18configs: Remove unused am335x_evm defconfigsVignesh R
These defconfigs don't seem be actively used any more, and have not been moved to adapt DM or DT. Therefore delete them. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-01-18configs: am335x_evm: Enable DM_SPI and DM_SPI_FLASHVignesh R
Enable DM_SPI and DM_SPI_FLASH for actively used defconfigs for am335x_evm. Signed-off-by: Vignesh R <vigneshr@ti.com>
2019-01-18adding saveenv-command for bananapi r2Frank Wunderlich
bananapi r2 can be booted from sd-card and emmc saving the environment have to choose the storage from which the device has booted also the offset is set to 1MB to make sure env is written to block "user data area" between uboot and first partition https://www.fw-web.de/dokuwiki/lib/exe/fetch.php?cache=&media=bpi-r2:boot-structure.png Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2019-01-18mkimage: fixup CONFIG_FIT_EXTERNAL_OFFSETPatrick Wildt
The last parameter is expected to be the imagefile. Since -E is a flag having the output name before -p will make mkimage ignore the external offset option. Signed-off-by: Patrick Wildt <patrick@blueri.se>
2019-01-18lib: Kconfig: spelling fixesChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18video: Kconfig: spelling fixesChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-18pinctrl: Kconfig: spelling fixesChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18i2c: Kconfig: spelling fixesChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2019-01-18drivers: Kconfig: spelling fixesChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18work_92105: Kconfig: spelling fixesChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2019-01-18x86: Kconfig: spelling fixesChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18arm: Kconfig: spelling fixesChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2019-01-18common: spl: Kconfig: spelling fixesChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18Kconfig: fix spellingChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18disk: efi: GUIDs should be constHeinrich Schuchardt
Make system_guid const. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18mach-snapdragon: db410: pinctrl: fix pin countRamon Fried
Pin count in APQ8016 was wrong, fix that. Fixes: ad97051b7ff6 ("mach-snapdragon: Introduce pinctrl driver") Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-18dts: db410: fix indentationRamon Fried
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-17Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mipsTom Rini
- MIPS: mscc: various enhancements for Luton and Ocelot platforms - MIPS: mscc: added support for Jaguar2 platform - MIPS: optimised SPL linker script - MIPS: bcm6368: fix restart flow issues - MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards - MIPS: mt7688: small fixes and enhancements - mmc: compile-out write support if disabled
2019-01-17Merge branch '2019-01-16-master-imports'Tom Rini
- Fixes for CVE-2018-18440 and CVE-2018-18439 - Patch to allow disabling unneeded NAND ECC layouts - Optimize SPI flash env read process
2019-01-17armv8: ls2088ardb: Update MAINTAINERSYork Sun
Signed-off-by: York Sun <york.sun@nxp.com> CC: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2019-01-17armv8: ls1088ardb: Update MAINTAINERSYork Sun
Signed-off-by: York Sun <york.sun@nxp.com> CC: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2019-01-17armv7: dts: ls1021a: Remove aliases property name warningRajesh Bhagat
Remove aliases property name warning while compilation: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-' Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17pci: layerscape: Add the dts fixup for EP and RCXiaowei Bao
Add the dts fixup when PCI controller work diffferent mode. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17pci: layerscape: Do not scan when PEX work in EP modeXiaowei Bao
Don't scan the bus when the PEX work in EP mode. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17pci: layerscape: Modify the EP and RC mode judge methodXiaowei Bao
Modify the RC and EP mode judge method, save the mode as a variable, the variable will be used by other function. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17ls1046aqds: Bypass xfi port fixup for KR modeFlorinel Iordache
u-boot makes a fixup for LS1046AQDS board to setup the properties 'fixed-link' and 'phy-connection-type' to 'xgmii' but in case of backplane mode this fixup is not correct because it causes the KR link to fail and so it must be bypassed in order to keep the link in KR mode as it is defined in DTS. Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com> [YS: Fix compiling warning] Reviewed-by: York Sun <york.sun@nxp.com>
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