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2016-04-13ARM64: zynqmp: Align register descriptionMichal Simek
Separate register space and put it on more lines. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: dp: Add default properties to zynqmp.dtsiHyun Kwon
Add some default properties to zynqmp.dtsi. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Use correct addresses in node namesHyun Kwon
Reflect actual silicon addresses in DT node names. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Align node address with parent node for dpdmaMichal Simek
Use right addresses for channel names Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add backward compatible string for uartMichal Simek
Mainline kernel has no r1p12 compatible string that's why console stops to work with the latest DTS files. Append generic compatible string. Keep in your mind that using this generic compatible string not all uart features will be available. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Fix coding style for pcieMichal Simek
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Extend pcie node to support legacy interruptsBharat Kumar Gogada
Modifying device tree node to support legacy interrupts. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add interrupt-controller property to gpio nodesMichal Simek
GPIO driver supports an input interrupt that's why gpio node itself can be labeled as interrupt controller. Reported-by: John Linn <linnj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add ddrc node in dtsNaga Sureshkumar Relli
This patch adds ddrc memory controller node in dts. size mentioned in dts is 0x30000, because we need to access DDR_QOS INTR registers located at fd090208 from this driver. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Added clocks to DTVNSL Durga
ZynqMP DMA's main clock and apb clock are added in zynqmp DT. Signed-off-by: VNSL Durga <vnsldurg@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
2016-04-13ARM64: zynqmp: Add CCI-400 nodeMichal Simek
Add CCI-400 node to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add missing interrupt-parent to PMU nodeMichal Simek
ZynqMP is not using global interrupt-parent setting that's why it has to be listed in every node separately. PMU node missed it and this patch is adding it. Reported-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: DT: Add power domainsSoren Brinkmann
Add power-domains to the DT and attach devices to them. The power-domains are all logical domains as understood by firmware. Each PD is identified by a unique identifier that the platform firmware understands. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodesP L Sai Krishna
This patch adds broken-tuning property to SD and eMMC nodes. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Sync GEM nodes with LinuxMichal Simek
Remove jumbo properties which are handled in the driver directly and use mainline compatible string which is already handled by the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Hook up the GEMs to the SMMUEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Correct IRQ nr for the SMMUEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add 8-bit bus width property.P L Sai Krishna
This patch add 8-bit bus width property to eMMC node. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: dt: Change qspi node compatible stringRanjit Waghmode
This patch makes compatible string as "m25p80" for qspi node in ep108 device tree file Signed-off-by: Ranjit Waghmode <ranjit.waghmode@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add missing mmc aliasesMichal Simek
Add missing mmc aliases. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Use C pre-processor for includes in dtsAlistair Francis
Change the dtsi include code to use the C pre-processor #include instead of the device tree /include/. This brings all ZynqMP device trees inline with each other. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Move kernel and fdt offsets and sizes to board config fileSiva Durga Prasad Paladugu
Move kernel and fdt offsets and sizes to board config file as the flash size varies across boards Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Do not perform reset at the end of thorMichal Simek
Setup reset off for lthor. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Support systems with more memory banksMichal Simek
This is example how to change u-boot to support more memory banks read from DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Use memory initialization based on DTS fileMichal Simek
Remove hardcoded memory sizes. Use information from DT memory node. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Fix usb phy node for ZyboMichal Simek
Compatible property should be the first. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Extend microzed board supportMichal Simek
Add missing DT nodes and enable USB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
2016-04-13ARM: zynq: Add missing qspi for xm013Michal Simek
Add missing qspi node and make qspi as spi0. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Create empty line below headersMichal Simek
Sync with others zynq DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Align spi and qspi node locationsMichal Simek
Keep nodes alphabelitally sorted. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
2016-04-13ARM: zynq: zc706: Add adv7511 on i2c busChristian Kohn
Add missing adv7511 and configure to match Base TRD. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: zc702: Add adv7511 on i2c busChristian Kohn
Add bindings for adv7511. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: DT: Add ethernet phy reset informationPunnaiah Choudary Kalluri
Added phy reset gpio information for gem0. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Fix bootargs in board dtsiMichal Simek
- Sync with Linux kernel - Remove rootfs - Remove earlyprintk Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Align devcfg nodeMichal Simek
- Have compatible string as the first property - Sync with Linux kernel dtsi - Add missing interrupt properties Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: dts: Updated devicetree bindings for Zynq 7000 platformMoritz Fischer
Added addtional bindings required for FPGA Manager operation of the Xilinx Zynq Devc configuration interface. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.Moritz Fischer
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Add interrupt-controller property to gpio nodesMichal Simek
GPIO driver supports an input interrupt that's why gpio node itself can be labeled as interrupt controller. Reported-by: John Linn <linnj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-11Prepare v2016.05-rc1Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-04-11fastboot: sparse: remove unnecessary loggingSteve Rae
remove logging of the 'skipped' blocks Signed-off-by: Steve Rae <srae@broadcom.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-04-11fastboot: sparse: fix block addressing for don't care chunk typeSteve Rae
When 7bfc3b1 (sparse: Refactor chunk parsing function) was implemented, it dropped 9981945 (aboot: fix block addressing for don't care chunk type). This re-implements the required fix for the "don't care chunk type"... Signed-off-by: Steve Rae <srae@broadcom.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-04-11Merge branch 'master' of git://git.denx.de/u-boot-arcTom Rini
2016-04-11spl: mmc: raw: Try to load u-boot if Linux image is not foundLokesh Vutla
If CONFIG_SPL_OS_BOOT is enabled and Linux image is not flashed at RAW_MODE_KERNEL_SECTOR in MMC, spl still assumes that Linux is available and tries to boot it and hangs. In order to avoid this, adding a check to verify if parsed image header is of type IH_OS_LINUX. If it fails then fall back to load u-boot image. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-04-11arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL) with asm codeHans de Goede
Lets be consistent and also replace v7_maint_dcache_all() with asm code for the invalidate case. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-04-11arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm codeHans de Goede
v7_maint_dcache_all() does not work reliable when build with gcc6, see: https://bugzilla.redhat.com/show_bug.cgi?id=1318788 While debugging this I learned that v7_maint_dcache_all() is unreliable when build with gcc5 too when it is marked as noinline. This commit fixes the reliability issues by replacing the C-code with the ready to use asm implementation from the kernel. Given that this code when written as C-code clearly is quite fragile (also see the existing comments about the C-code being the way it is to get optimal assembly) and that we have a proven asm alternative, I believe that this is the best solution. Note that we actually already had a copy of the kernel's v7_flush_dcache_all() before this commit in arch/arm/mach-uniphier/arm32/lowlevel_init.S. This commit moves that code arch/arm/cpu/armv7/cache_v7_asm.S, renames it to __v7_flush_dcache_all(), and adds a v7_flush_dcache_all() wrapper which saves / restores the clobbered registers for use from C-code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-11lib/crc8: Add crc start valueStefan Roese
To make the usage of this function more flexible, lets add the CRC start value as parameter to this function. This way it can be used by other functions requiring different start values than 0 as well. For non-zero CRC start values to work, I've reworked the function a bit. The new implementation is copied from the Linux version in drivers/i2c/i2c-core.c / i2c_smbus_pec(). Which supports non-zero CRC stating values. I've double-checked that the results for zero starting values are identical to the results from the original version of this function. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-04-11test/py: README: link to example hook scriptsStephen Warren
When implementing test/py hook scripts, it's helpful to read some working examples. Provide a link to some. The link was mentioned in the commit message which first added test/py, but not in any documentation file. Suggested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-11bootcounter_ram: Flush dcache after data is written into SDRAMStefan Roese
This patch adds a call to flush_dcache_range() to bootcount_store() to make sure, that the bootcounter data (including the patterns) is written to memory. Without this, platforms with dcache enabled may not have the bootcounter updated upon reset. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2016-04-11disk: part: Enable get_info pointer for CONFIG_SPL_FAT_SUPPORTMichal Simek
The patch "dm: part: Convert partition API use to linker lists" (sha1: 96e5b03c8ab749b6547f6a3ceb4d4b9f274211aa) is adding new dependency for enabling SPL_EXT_SUPPORT to be able to get information about DOS partition. get_info is also required for FAT support only which is used on Xilinx Zynq boards. Reported-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-04-11am33xx changed BOOT_DEVICE_SPI to correct valueVogt, Christof
Changed BOOT_DEVICE Code for SPI on AM33xx. According AM335x reference manual page 4960 (SPRUH73L-October 2011-Revised February 2015) Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
generated by cgit (git 2.34.1) at 2025-01-02 16:37:56 +0000