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2018-05-08arm: ti: boot: Extract PARTS_DEFAULT to boot.hSam Protsenko
Eliminate code duplication: the same PARTS_DEFAULT was defined in am57xx_evm.h and in dra7xx_evm.h. Extract it to environment/boot.h and use in all OMAP5-based boards. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-05-08Merge git://git.denx.de/u-boot-mmcTom Rini
2018-05-08Merge git://git.denx.de/u-boot-uniphierTom Rini
2018-05-08lib/Kconfig: Mark OF_LIBFDT_OVERLAY as depending on OF_LIBFDTTom Rini
The overlay code is only useful when OF_LIBFDT is set, so mark it as depending on that first. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-08adc: add Amlogic Meson SAR ADC driverNeil Armstrong
This patch adds the driver for the Amlogic Meson Successive Approximation Register (SAR) A/D Converter based on the Linux IIO driver thanks to the great work of Martin Blumenstingl. The driver has been adapted to U-Boot and the ADC UClass. This patch depends on the regmap "regmap: add regmap_update_bits() helper" patch and has been tested using the newly introducted "adc" CLI command in the "cmd: add ADC cli commands" patch. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08test: regmap: add read/modify/write testNeil Armstrong
Add calls to regmap_read/modify_bits/write even if the proper memory read/write calls are not executed in sandbox. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08regmap: add regmap_update_bits() helperNeil Armstrong
Add the regmap_update_bits() to simply the read/modify/write of registers in a single command. The function is taken from Linux regmap implementation. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08ARM: dts: stm32mp157: Add vrefbuf DT nodePatrice Chotard
Add vrefbuf device tree node. This allows to get a voltage reference for ADCs. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08configs: stm32mp15: Enable STM32_VREFBUF flagFabrice Gasnier
Enable vrefbuf on stm32mp15, to be used by ADC. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08clk: stm32mp1: Add VREF clock gatingFabrice Gasnier
Add VREF clock gating, that may be used by STM32 VREFBUF regulator. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08power: regulator: Add support for stm32-vrefbufFabrice Gasnier
Add regulator driver for STM32 voltage reference buffer which can be used as voltage reference for ADCs, DACs and external components through dedicated VREF+ pin. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08configs: stm32mp15_basic: Set regulator relative flagsPatrice Chotard
Enable DM_REGULATOR_STPMU1 flag to activate regulator driver for STM32MP15 SoC and CMD_REGULATOR flag to be able to set/get regulator state int U-boot command line. Disable PMIC_CHILDREN as this flag is not needed in SPL for STM32MP1. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08ARM: dts: stm32mp157c-ed1: Add regulator nodePatrice Chotard
Add regulator nodes needed by stpmu1 regulator driver Add vmmc-supply and vqmmc-supply regulator property for sdmmc1 and sdmmc2. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08power: pmic: stpmu1: Add regulator bindingsPatrice Chotard
Add regulator bindings to get access to regulator managed by drivers/power/regulator/stpmu1.c regulator driver. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08power: regulator: stpmu1: Introduce stpmu1 driverChristophe Kerello
Enable support for the regulator functions of the STPMU1X PMIC. The driver implements get/set api for the various BUCKS and LDOs supported by the PMIC device. This driver is controlled by a device tree node which includes voltage limits. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08ARM: dts: stm32mp157: Add SoC pwr regulator entryPatrice Chotard
Add SoC power regulator entry for reg11, reg18 and usb33 regulator. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08stm32mp: regulator: add SoC pwr regulator supportPatrick Delaunay
This driver binds and manages the following regulator of SoC's PWR block : - reg11 - reg18 - usb33 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08arm: controlcenterdc: Add spi-flash compatible stringsMario Six
Since kirkwook SPI was recently converted to DM, add compatible strings to the SPI flash devices to make them work with the new driver. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08env: ti: android: boot with FIT ImagePraneeth Bajjuri
Boot android over emmc by default thru FIT image Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Suggested-by: Andrew F.Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-05-08configs: TI: Enable FIT Library overlay supportPraneeth Bajjuri
Enable the FDT library overlay support for all TI SOC family. Without this option, when Loading fdt from FIT image, the following warning is seen. "config with overlays but CONFIG_OF_LIBFDT_OVERLAY not set". Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Suggested-by: Andrew F.Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-05-08arm: dra76: fastboot: extend cpu type for getvar commandPraneeth Bajjuri
'commit dda0bd674481 ("arm: dra762: Add support for device package identification")' introduces ABZ and ACD package identification. This patch is to extend usage of "fastboot getvar cpu" for DRA76x ABZ and ACD devices. Helps in fixing the boot warning. Warning: fastboot.cpu: unknown CPU rev: 123863298 on CPU : DRA762-GP ES1.0 ABZ package Model: TI AM5748 IDK Board: AM574x IDK REV 1.0A Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-08defconfig: at91-sama5d2_ptc_ek: remove unused SYS_EXTRA_OPTIONSLudovic Desroches
Remove SYS_USE_NANDFLASH, SYS_USE_MMC as they are deprecated and unused. The board configurations already use CONFIG_SD_BOOT and CONFIG_NAND_BOOT respectively. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> [eugen.hristev@microchip.com: rework on latest u-boot] Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08board: sama5d27_som1_ek: Fix the USB vbus powerEugen Hristev
According to the REVB schematic, fix the USB vbus power enable pin. Based on original work by Wenyou Yang Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08configs: at91: sama5: updated mtdparts variable in bootargsEugen Hristev
We have a new demo layout of our sama5 boards for the NAND Flash memory. According to this new layout, adjust the mtdparts variable in bootargs to align with this, which is available at : http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d3XplainedMainPage#NAND_Flash_demo_Memory_map, Based on original work by Wenyou Yang Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08board: sama5d2_ptc_ek: adjust the smc timings of nandEugen Hristev
To fix the issue of write the rootfs.ubi, adjust the smc timings configuration of the nand controller. Based on original work by Wenyou Yang Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08gpio: atmel_pio4: give a full configuration when muxing pinsLudovic Desroches
When a pin is muxed to a peripheral or as a GPIO, the only configuration that can be set is the pullup. It is too restrictive so this patch allows to give a full configuration. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08board: atmel: sama5d2_ptc_ek: update pin configuration for NANDLudovic Desroches
The drive strength has to be set to medium for the NAND data lines. With a low drive, we can get some data corruption. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08gpio: atmel_pio4: add drive strength macrosLudovic Desroches
Macros for drive strength configuration were missing. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08pci: intel: Add Intel FPGA PCIe controller driverLey Foon Tan
Add PCIe driver for Intel FPGA PCIe IP. This driver operates the PCIe IP in rootport mode only, the EP mode is not supported. The driver is tested with the Intel e1000e NIC driver. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-08arm64: Add SMC and HVC commandsMichalis Pappas
This patch adds smc and hvc commands, that allow issuing Secure Monitor Calls and Hypervisor Calls conforming to the ARM SMC Calling Convention. Add Kconfig items to allow each command can be individually enabled. Signed-off-by: Michalis Pappas <mpappas@fastmail.fm> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08pinctrl: meson: Update pinmux with new Linux bindingsNeil Armstrong
The pinctrl bindings has changed for Amlogic Meson SoCs since Linux 4.13, update the pinctrl driver to take this in account. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08ARM64: meson: Sync DT and Bindings with Linux 4.16Neil Armstrong
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.16.0. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08ARM: meson: rename GXBB to GXNeil Armstrong
Taking into account the Amlogic Family name starts with GX, including the GXBB, GXL and GXM SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08clk: clk_stm32f: Use PLLSAIP as USB 48MHz clockPatrice Chotard
On all STM32F4 and F7 SoCs family (except STM32F429), PLLSAI output P can be used as 48MHz clock source for USB and SDMMC. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Tested By: Bruno Herrera <bruherrera@gmail.com>
2018-05-08dm: led: add testcase for "default-state" propertyPatrick Bruenn
Add two more gpio-leds to sandbox test device tree with default-state property set to "on"/"off". Add dm_test_led_default_state() to check that these new LED's are set to LEDST_ON and LEDST_OFF. dm: led: add testcase for "default-state" property Add two more gpio-leds to sandbox test device tree with default-state property set to "on"/"off". Add dm_test_led_default_state() to check that these new LED's are set to LEDST_ON and LEDST_OFF. Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08dm: led: auto probe() LEDs with "default-state"Patrick Bruenn
To avoid board specificy LED activation code, automatically activate gpio-leds with "default-state" property during bind(). Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08dm: led: Support "default-state" propertyPatrick Bruenn
Add support for the device tree property "default-state". This feature might be useful for LEDs indicating "power on" or similar states. Note: Even with this commit gpio-leds remain in reset state. That's because the led_gpio is not probed until DM_FLAG_ACTIVATED is set. Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08mmc: support writing sparse imagesJassi Brar
Provide an alternate path for sparse-images to be written to MMC. For example, via tftp on platforms that don't support fastboot protocol. Or when an image is to written at some offset, rather than the start of a partition. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> [trini: Guard with CONFIG_FASTBOOT_FLASH tests, use LBAF for lbaint_t printing] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-08power: pwm regulator: support live treeAndy Yan
Use live tree compatible api for pwm regulator. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2018-05-08dm: mmc: socfpga: call dwmci_probe()Patrick Bruenn
On a socfpga_cyclone5 based board the SD card, was never powered up. For other dw_mmc based SoCs dwmci_probe() is called in the platform specific probe(). It seems this call is missing for socfpga_dw_mmc. With this change DWMCI_PWREN is set by dmwci_init(). Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08mmc: Kconfig: add the MMC_TRACE config in KconfigJaehoon Chung
Add the MMC_TRACE config in Kconfig. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08mmc: add the debug message in mmc_set_clockJaehoon Chung
Add the debug message for checking the mmc clock status. It's helpful to debug the controlling clock. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08mmc: add the MMC_CLK_ENABLE/DISABLE macro in mmc.hJaehoon Chung
mmc_set_clock() function has the disable argument as bool type. When mmc_set_clock is called, it might be passed to "true" or "false". But it's too confusion whether clock is enabled or disabled with only "true" and "false". To prevent the confusion, replace to MMC_CLK_ENABLE/DISABLE macro from true/false. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08lib: fdtdec: drop the old compatible about max77686Jaehoon Chung
Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2018-05-08power: pmic_max77686: remove the old pmic_max77686 fileJaehoon Chung
max77686 pmic is supporting with max77686.c under pmic/ and regulator/ direnctroy. Remove pmic_max77686.c what didn't use anywhere. Instead, enable CONFIG_DM_REGULATOR_MAX77686 and CONFIG_DM_PMIC_MAX77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08configs: trats2: enable the max77686 regulator configJaehoon Chung
Enable the CONFIG_DM_REGULATOR_MAX77686 for using regulator driver. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08ARM: uniphier: enable CONFIG_PINCONFMasahiro Yamada
Enable the pin configuration feature for UniPhier 64 bit SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08pinctrl: uniphier: add ethernet TX pin data for LD20Masahiro Yamada
These are necessary to optimize the drive-strength of the pins. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08pinctrl: uniphier: support drive-strength configurationMasahiro Yamada
This allows our DT to specify drive-strength property. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08pinctrl: uniphier: support per-pin configuration via DTMasahiro Yamada
Currently, the UniPhier pinctrl drivers expose only the pin-group interface to device tree. Provide .get_pins_count, .get_pin_name, .pinconf_set hooks to support pin configuration via 'pins' DT property. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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