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2020-01-08Merge branch '2020-01-07-master-imports'Tom Rini
- DT overlay support in FIT images in SPL - remoteproc update - Assorted SATA fixes - Other assorted fixes
2020-01-09uniphier_{v7, v8}_defconfig: enable SPI driver and sspi commandMasahiro Yamada
Compile drivers/spi/uniphier_spi.c and cmd/spi.c Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-09ARM: dts: uniphier: add pinmux nodes for I2C ch5, ch6Masahiro Yamada
The next generation SoC can connect on-board slave devices via I2C ch5 and ch6. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-08ata: fsl_sata: Continue probing other sata port when failed current port.Peng Ma
In the initialization of sata driver, we want to initialize all port probes, Therefore, any detection failure between of them should continue initialization by skipping the current port instead of exit. Signed-off-by: Peng Ma <peng.ma@nxp.com>
2020-01-08ata: sata_sil: Continue probing other sata port when failed current port.Peng Ma
In the initialization of sata driver, we want to initialize all port probes, Therefore, any detection failure between of them should continue initialization by skipping the current port instead of exit. Signed-off-by: Peng Ma <peng.ma@nxp.com>
2020-01-08treewide: Remove CONFIG_SYS_UBOOT_START from configs board filesPatrice Chotard
As previous CONFIG_SYS_UBOOT_START is now set by default to CONFIG_SYS_TEXT_BASE when not defined, CONFIG_SYS_UBOOT_START can be removed from include/configs board files. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2020-01-08Makefile: Fix CONFIG_SYS_UBOOT_START default valuePatrice Chotard
This patches restores boot on boards which rely on CONFIG_SYS_UBOOT_START equal to CONFIG_SYS_TEXT_BASE when using SPL Fixes: d3e97b53c1f2 ("spl: fix entry_point equal to load_addr") Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-08cmd/Kconfig: Add more dependencies to OSE bootm supportTom Rini
Per Enea OSE documentation, it supports some classes of ARM, PowerPC and X86. Limit the option to those platforms. Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-08imx: imx8mn: enable CONFIG_CMD_ERASEENVPeng Fan
enable CONFIG_CMD_ERASEENV to make it easy to erase env. Use savedefconfig to generate new defconfig. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8mn_evk: add board_mmc_get_env_devPeng Fan
Add board_mmc_get_env_dev, otherwise, Loading Environment from MMC... MMC Device 0 not found *** Warning - No MMC card found, using default environment Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx8mn: evk: add READMEPeng Fan
Add a README for users to build a workable image. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: add i.MX8MP EVK boardPeng Fan
Add basic i.MX8MP EVK board support U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) power_pca9450b_init DDRINFO: start DRAM init DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Failed to find clock node. Check device tree WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) CPU: Freescale i.MX8MP rev1.0 at 1000 MHz Reset cause: POR Model: NXP i.MX8MPlus EVK board DRAM: 6 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 u-boot=> mmc list FSL_SDHC: 1 (SD) FSL_SDHC: 2 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8m: add imximage-8mp-lpddr4.cfgPeng Fan
Add imximage-8mp-lpddr4.cfg for imximage usage, almost same as i.MX8MN ddr4 cfg, but with different ddr firmware Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08clk: imx: add i.MX8MP clk driverPeng Fan
Add i.MX8MP clk driver for i.MX8MP CLK driver model usage Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08clk: imx: add imx_clk_mux2_flagsPeng Fan
Add imx_clk_mux2_flags which will be used by i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8m: only support non-dm code in clock_imx8mm.cPeng Fan
The drivers/clk/imx/*.c are used for CLK dm case, the clock_imx8mm.c is used for non CLK dm case, let's split it. Sometimes it is hard to enable CLK dm in SPL stage, considering code size, malloc size requirement, the splittion will make it easy to use non CLK dm in SPL stage. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: Kconfig: make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MPPeng Fan
i.MX8MP ROM support ROMAPI as i.MX8MN, so make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: add i.MX8MP PE propertyPeng Fan
i.MX8MP does not have LVTTL, it has a PE property Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8mp: add pin header filePeng Fan
Add pin header file for i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08power: Add new PMIC PCA9450 driverYe Li
PCA9450 PMIC series is used to support iMX8MM (PCA9450A) and iMX8MN (PCA9450B). Add the PMIC driver for both PCA9450A and PCA9450B. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08arm: dts: freescale: Add i.MX8MP dtsi supportPeng Fan
The i.MX8M Plus Media Applications Processor is part of the growing mScale family targeting the consumer and industrial market. It brings an effective Machine Learning and AI accelerator that enables a new class of applications. It is built in Samsung 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad core ARM Cortex-A53 cluster and Cortex-M7 low-power coprocessor, audio digital signal processor, machine learning and graphics accelerators. Add the basic dtsi support for i.MX8MP. Patch from Anson Huang for Kernel https://patchwork.kernel.org/patch/11310915/ Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08ddr: imx8m: Add DRAM PLL to generate 1000Mhz outputPeng Fan
We will generate DRAM 4000MT/s as default for i.MX8MP. So need DRAM PLL to generate 1000Mhz clock to DDR PHY and controller. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08mxc_ocotp: support i.MX8MPPeng Fan
i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08pinctrl: imx8m: support i.MX8MPPeng Fan
Add i.MX8MP compatible to let the pinctrl driver could support i.MX8MP. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8m: add 1GHz fracpll entryPeng Fan
4000MTS DDR needs 1GHz fracpll, so add the entry Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8mp: add basic clockPeng Fan
i.MX8MP has similar architecture as i.MX8MN, but it has different clk root and index, so add that to make i.MX8MP could use the non-dm clock driver. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08arm: dts: add i.MX8MP pinfunc headerPeng Fan
Add i.MX8MP pinfunc header for dts usage Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08dt-bindings: clock: add i.MX8MP clock headerPeng Fan
Add i.MX8MP clock header Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: spl: support i.MX8MP spl_boot_devicePeng Fan
i.MX8MP follows i.MX8MN, so just let it use spl_board_boot_device Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8m: add Kconfig entry for i.MX8MPPeng Fan
Add Kconfig entry for i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: cpu: enlarge bit mask to 0x1FF for cpu typePeng Fan
i.MX8MP use 0x182 as dummy id, 0xFF is not able the get the highest bit, so enlarge bit mask to 0x1FF to make it could detect cpu type correctly Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx8mp: set BYPASS ID SWAP to avoid AXI bus errorsPeng Fan
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: get cpu id/type of i.MX8MPPeng Fan
Support get i.MX8MP cpu id and cpu type Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: imx8mq: handle ESDHC in mxc_get_clockPeng Fan
fsl_esdhc_imx driver will call "mxc_get_clock(MXC_ESDHC_CLK + dev->seq)", however mxc_get_clock wrongly handle MXC_ESDHC_CLK as root clk and cause sd card could not be detected in U-Boot proper, as below: "Loading Environment from MMC... unable to select a mode" Handle MXC_ESDHC_CLK in mxc_get_clock to fix the issue. Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Baruch Siach <baruch@tkos.co.il> Tested-by: Fabio Estevam <festevam@gmail.com>
2020-01-08wandboard: Remove repeated PMIC stringFabio Estevam
After the conversion to DM_PMIC the following output is seen: PMIC: PMIC: PFUZE100 ID=0x10 Remove the unnecessary PMIC string from the board file to avoid the repetead string. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-01-08wandboard: Fix the DM_PMIC conversionFabio Estevam
Commit ec837c82d709 ("imx6: wandboard: convert to DM_PMIC") caused the following pmic_get() error: CPU: Freescale i.MX6QP rev1.0 at 792 MHz Reset cause: POR DRAM: 2 GiB PMIC: pmic_get() ret -19 ... and since the PMIC presence is used to determine the board D1 revision, the following error is seen when booting a board rev D1: WARNING: Could not determine dtb to use and the kernel does not boot at all. Fix the regression by passing "pfuze100@8" as the correct parameter to the pmic_get() function in the DM case. Fixes: ec837c82d709 ("imx6: wandboard: convert to DM_PMIC") Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-01-08mpc83xx_clk: always treat MPC83XX_CLK_PCI as invalidRasmus Villemoes
The current mpc83xx_clk driver is broken for any board for which mpc83xx_has_pci() is true, i.e. anything not MPC8308: When is_clk_valid() reports that MPC83XX_CLK_PCI is valid, init_all_clks() proceeds to call init_single_clk(), but that doesn't know about either MPC83XX_CLK_PCI or has any handling of the TYPE_SCCR_ONOFF mode correctly returned by retrieve_mode(). Hence init_single_clk() ends up returning -EINVAL, and the whole board hangs in serial_init(). The quickest fix is to simply pretend that clock is invalid for all, since nobody can have been relying on it. Adding proper support seems to be a bit more involved than just handling TYPE_SCCR_ONOFF: - The power-on-reset value of SCCR[PCICM] is 0, so mpc83xx_clk_enable() would probably need to be tought to enable the clock. - The frequency of PCI_SYNC_OUT is either SYS_CLK_IN or SYS_CLK_IN/2 depending on the CFG_CLKIN_DIV configuration input, but that can't be read from software, so to properly fill out ->speed[MPC83XX_CLK_PCI] I think one would need guidance from Kconfig or dtb. Partially fixes: 07d538d281 clk: Add MPC83xx clock driver Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08mpc83xx: set MPC83XX_GPIO_CTRLRS to 2 for MPC8309Rasmus Villemoes
The MPC8309 has two gpio controllers (which is already correctly reflected in its struct immap definition). Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08mpc83xx: immap_83xx: add spi8xxx_t in immap for mpc8309Rasmus Villemoes
Allow drivers/spi/mpc8xxx_spi.c to be built for an mpc8309 target. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08powerpc: mpc83xx: convert CONFIG_FSL_ELBC to KconfigRasmus Villemoes
This complements commit 068789773d0 which did the conversion for mpc85xx. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08mpc83xx: make ARCH_MPC8309 select SYS_FSL_ERRATUM_ESDHC111Rasmus Villemoes
The mpc8309 is also affected by the "Manual Asynchronous CMD12 abort operation causes protocol violations" erratum, though it is enumerated as eSDHC16 in the errata sheet for mpc8309. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-07log: Include missing header for log.hSean Anderson
log.h references cmd_tbl_t but command.h was not included Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07dm: Add a debug message when devices are skipped pre-relocSean Anderson
This adds a message to lists_bind_fdt when it skips initializing a device pre-relocation. I've had a couple errors where a device didn't initialize properly because one of its dependencies was missing. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-01-07Include missing headers for fdt_support.hSean Anderson
fdt_support.h is missing declarations for bd_t. Including asm/u-boot.h pulls in the definition. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-01-07binman: fix default filename of u-boot-with-ucode-ptr in documentationMasahiro Yamada
The suffix should be ".bin" instead of ".dtb" . Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07dm: devres: Add a new OFDATA phaseSimon Glass
Since the ofdata_to_platdata() method can allocate resources, add it as a new devres phase. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07dm: devres: Use an enum for the allocation phaseSimon Glass
At present we only support two phases where devres can be used: bind and probe. This is handled with a boolean. We want to add a new phase (platdata), so change this to an enum. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07dm: devres: Add testsSimon Glass
The devres functionality has very few users in U-Boot, but it still should have tests. Add a few basic tests of the main functions. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07dm: test: Add a test driver for devresSimon Glass
Add a driver which does devres allocations so that we can write tests for devres. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07dm: devres: Convert to use loggingSimon Glass
At present when CONFIG_DEBUG_DEVRES is enabled, U-Boot prints log messages to the console with every devres allocation/free event. This causes most tests to fail since the console output is not as expected. In particular this prevents us from adding a device to sandbox which uses devres in its bind method. Move devres over to use U-Boot's logging feature instead, and add a new category for devres. Signed-off-by: Simon Glass <sjg@chromium.org>
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