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2019-04-21usb: dwc2_udc_otg: Add tx_fifo_sz array supportPatrice Chotard
All TX fifo size can be different, add tx_fifo_sz_array[] into dwc2_plat_otg_data to be able to set them. tx_fifo_sz_array[] is 17 Bytes long and can contains max 16 tx fifo size (synopsys IP supports max 16 IN endpoints). First entry of tx_fifo_sz_array[] is the number of valid fifo size the array contains. In case of tx_fifo_sz_array[] doesn't contains the same number of element than max hardware endpoint, display a warning message. Compatibility with board which doesn't use tx_fifo_sz_array[] (Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-21usb: dwc2_udc_otg: Read MAX_HW_ENDPOINT from HWCFG4 registerPatrick Delaunay
Some DWC2 ip variant doesn't use 16 hardware endpoint as hardcoded in the driver. Bits INEps [29:26] of HWCFG4 register allows to get this information. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-21usb: dwc2: Add function for session B checkPatrick Delaunay
Add a new function to check the session B validity, to be use to check cable connection. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-21usb: dwc2: Add force-b-session-valid supportPatrick Delaunay
Handle "force-b-session-valid" property from DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-21usb: dwc2: force reset assert before to probe the driverPatrick Delaunay
Reset the hardware to be sure of the device state. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-21usb: dwc2: convert driver to DM_USB_GADGETPatrick Delaunay
Minimal conversion to driver model by using the uclass UCLASS_USB_GADGET_GENERIC based on: - reset uclass - clock uclass - generic uclass. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-21usb: dwc2: remove unused variable regs_otgPatrick Delaunay
Remove the global regs_otg variable. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-21phy: usbphyc: increase PLL wait timeoutPatrick Delaunay
wait 200us to solve USB init issue on device mode (ums and stm32prog commands) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-21phy: usbphyc: move vdda1v1 and vdda1v8 in phy_initPatrick Delaunay
vdda1v1 and vdda1v8 are used by the PLL. Both need to be enabled before starting the PLL. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-21phy: usbphyc: Binding update of vdda supplyPatrick Delaunay
Move supply vdda1v1 and vdda1v8 in usbphyc node and no more in port Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-21phy: usbphyc: update xlate with DT bindingPatrick Delaunay
Parameter added for port 1, for example: &usbh_ehci { phys = <&usbphyc_port0>; phy-names = "usb"; vbus-supply = <&vbus_sw>; status = "okay"; }; &usbotg_hs { pinctrl-names = "default"; pinctrl-0 = <&usbotg_hs_pins_a>; phys = <&usbphyc_port1 0>; phy-names = "usb2-phy"; status = "okay"; }; Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-21phy: usbphyc: remove unused variable indexPatrick Delaunay
Remove unused field index in struct stm32_usbphyc_phy. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-21fastboot: Improve error reporting on 'getvar partition-{size, type}'Eugeniu Rosca
Currently U-Boot reports the same error message in all below cases: [A] host> fastboot getvar partition-type [B] host> fastboot getvar partition-size [C] host> fastboot getvar partition-type: [D] host> fastboot getvar partition-size: [E] host> fastboot getvar partition-type:<invalid-part> [F] host> fastboot getvar partition-size:<invalid-part> The message looks like: host> fastboot getvar partition-size: getvar:partition-size: FAILED (remote: partition not found) Finished. Total time: 0.003s Be more user friendly and output: - "partition not given" for [A-D] - "partition not found" for [E-F] Fixes: f73a7df984a9 ("net: fastboot: Merge AOSP UDP fastboot") Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Acked-by: Alex Kiernan <alex.kiernan@gmail.com>
2019-04-21fastboot: getvar: correct/rename "has_slot" to "has-slot"Eugeniu Rosca
Since its inception in upstream fastboot android-n-preview-1 [1], "has-slot" option has never taken the form of "has_slot". Amongst the users of "getvar has-slot:" is the upstream bootloadertest.py [2]. Current U-Boot "has_slot" version must be a typo. Fix it. [1] https://android.googlesource.com/platform/system/core/+/a797479bd51c ("Fix fastboot variable name") [2] https://android.googlesource.com/platform/system/extras/+/72de393e118e3 ("Bootloader verification for AndroidThings.") Fixes: f73a7df984a9 ("net: fastboot: Merge AOSP UDP fastboot") Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Acked-by: Alex Kiernan <alex.kiernan@gmail.com>
2019-04-21dfu: Avoid declaring unused variables and absent parametersAndy Shevchenko
The compiler is not happy when neither USB nor TFTP transport for DFU defined: cmd/dfu.c: In function ‘do_dfu’: cmd/dfu.c:31:8: warning: unused variable ‘devstring’ [-Wunused-variable] char *devstring = argv[3]; ^~~~~~~~~ cmd/dfu.c:30:8: warning: unused variable ‘interface’ [-Wunused-variable] char *interface = argv[2]; ^~~~~~~~~ Surround those variables by #ifdef expression. More serious, that comes under same circumstances, is a compilation error due to absence of macro parameter: In file included from include/image.h:45, from include/common.h:35, from cmd/dfu.c:13: include/command.h:207:24: error: expected expression before ‘,’ token # define _CMD_HELP(x) x, ^ include/command.h:286:18: note: in expansion of macro ‘_CMD_HELP’ _cmd, _usage, _CMD_HELP(_help) _CMD_COMPLETE(_comp) } ^~~~~~~~~ include/command.h:290:3: note: in expansion of macro ‘U_BOOT_CMD_MKENT_COMPLETE’ U_BOOT_CMD_MKENT_COMPLETE(_name, _maxargs, _rep, _cmd, \ ^~~~~~~~~~~~~~~~~~~~~~~~~ include/command.h:332:2: note: in expansion of macro ‘U_BOOT_CMD_COMPLETE’ U_BOOT_CMD_COMPLETE(_name, _maxargs, _rep, _cmd, _usage, _help, NULL) ^~~~~~~~~~~~~~~~~~~ cmd/dfu.c:70:1: note: in expansion of macro ‘U_BOOT_CMD’ U_BOOT_CMD(dfu, CONFIG_SYS_MAXARGS, 1, do_dfu, ^~~~~~~~~~ make[1]: *** [scripts/Makefile.build:279: cmd/dfu.o] Error 1 make: *** [Makefile:1518: cmd] Error 2 Put empty string unconditionally to have macro parameter present. Fixes: 0f44d33536a5 ("dfu: Fix up the Kconfig mess") Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2019-04-19usb: Select USB_MUSB_DSPS with USB_MUSB_TIAlex Kiernan
USB_MUSB_TI requires USB_MUSB_DSPS, failing at link time if it's not selected: drivers/usb/musb-new/built-in.o: In function `ti_musb_host_ofdata_to_platdata': drivers/usb/musb-new/ti-musb.c:193: undefined reference to `musb_dsps_ops' or if OF_CONTROL is not selected: arch/arm/mach-omap2/built-in.o:(.data.usb0+0x24): undefined reference to `musb_dsps_ops' Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at> Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2019-04-19configs: Migrate USB_MUSB_DISABLE_BULK_COMBINE_SPLIT to KconfigAlex Kiernan
Migrate support for disable MUSB bulk split/combine to Kconfig Green Travis build: https://travis-ci.org/akiernan/u-boot/builds/519101867 Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2019-04-18Merge tag 'arc-for-2019.07' of git://git.denx.de/u-boot-arcTom Rini
In this small series we migrate ARC boards to DM_MMC so we're hopefully are good now and our boards will be kept in U-Boot for some more time :)
2019-04-18board: sama5d2_icp: Enable MACB driverRazvan Stefanescu
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
2019-04-18ARM: dts: at91-sama5d2-icp: Add MACB nodeRazvan Stefanescu
MACB has a fixed link connection to KSZ8563 switch port. Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
2019-04-18board: atmel: add SAMA5D2 ICP boardEugen Hristev
The SAMA5D2 ICP Board features the SAMA5D27 SoC, together with QSPI Flash, Wilc3000 wireless device and EtherCat support. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-18ARC: [plat-axs10x]: migrate to DM_MMCEugeniy Paltsev
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-18ARC: [plat-hsdk]: migrate to DM_MMCEugeniy Paltsev
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-18ARC: dwmmc: Adding DesignWare MMC driver support for ARC devboardsEugeniy Paltsev
Add the DM_MMC-compatible DesignWare MMC driver support for Synopsys ARC devboards. It is created to switch ARC devboards to use DM_MMC. It required information such as clocks (Bus Interface Unit clock, Card Interface Unit clock) and SDIO bus width. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-17timer: dw-apb: Add missing 64bit up-conversionMarek Vasut
The generic timer count is an incrementing 64bit value and a timer driver must return an incrementing 64bit value. The DW APB timer only provides a 32bit timer counting down, thus the result must be inverted and converted to a 64bit value. The current implementation is however missing the 64bit up-conversion and this results in random timer roll-overs, which in turn triggers random timeouts throughout the codebase. This patch adds the missing 64bit up-conversion to fix the issue. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-04-17arm: dts: Stratix10: Add QSPI nodeLey Foon Tan
Merge qspi dts node from Linux. Commit 0cb140d07fc75fb (arm64: dts: stratix10: Add QSPI support for Stratix10) Add -u-boot.dtsi files for non Linux dts properties and update properties for Uboot. - add u-boot,dm-pre-reloc - add alias for spi0 - change compatible for flash - support quad read and quad write - change maximum frequency to 100MHz Tested on Stratix 10 SoC devkit. SOCFPGA_STRATIX10 # sf probe 0:0 SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17ddr: altera: Stratix10: Add ECC memory scrubbingLey Foon Tan
Scrub memory content if ECC is enabled and it is not from warm reset boot. Enable icache and dcache before scrub memory and use "DC ZVA" instruction to clear memory to zeros. This instruction writes a cache line at a time and it can prevent false ECC error trigger if write cache line partially. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17arm: socfpga: stratix10: Add cpu_has_been_warmreset()Ley Foon Tan
Add helper function cpu_has_been_warmreset() to check if CPU is from warm reset boot. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17arm: dts: Stratix10: Modify stratix10 socdk memory nodeLey Foon Tan
The stratix10 socdk ships with 4GB of memory. Modify the device tree to represent this. Note that to access 4GB of memory in Stratix 10, due to the IO space from 2GB to 4GB, we use the fact that the DDR controller ignores upper address bits outside of the configured DRAM's size. This means that , the 4GB DRAM is mapped to memory every 4GB. For an 8GB memory, you can either live with the 2GB IO space, and loose access to that memory from the processor, or use the same trick: Loose 2GB of memory: memory { device_type = "memory"; /* 8GB */ /* first 2GB */ reg = <0 0x00000000 0 0x80000000>, /* last 4GB */ <1 0x00000000 1 0x00000000>; u-boot,dm-pre-reloc; }; or to map it all: memory { device_type = "memory"; /* 8GB */ /* first 2GB */ reg = <0 0x00000000 0 0x80000000>, /* next 6GB */ <2 0x80000000 1 0x80000000>; u-boot,dm-pre-reloc; }; Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2Ley Foon Tan
Stratix10 maps dram in 2 address spans, from 0-2GB and from 2GB up to 128GB. Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17ddr: altera: Stratix10: Add multi-banks DRAM size checkLey Foon Tan
Stratix 10 maps dram from 0 to 128GB. There is a 2GB hole in the memory for peripherals and other IO from 2GB to 4GB. However the dram controller ignores upper address bits for smaller dram configurations. Example: a 4GB dram maps to multiple locations, every 4GB on the address. Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17ddr: altera: stratix10: Move SDRAM size check to SDRAM driverLey Foon Tan
Move SDRAM size check to SDRAM driver. sdram_calculate_size() is called in SDRAM initialization already, avoid calling twice in size check function. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17arm: socfpga: implement proper peripheral resetSimon Goldschmidt
This commit removes ad-hoc reset handling for peripheral resets from SPL for socfpga gen5. This is done because as U-Boot drivers support reset handling by now. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17spi: cadence_qspi: add reset handlingSimon Goldschmidt
This adds reset handling to the cadence qspi driver. For backwards compatibility, only a warning is printed when failing to get reset handles. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17mtd: rawnand: denali: add reset handlingSimon Goldschmidt
This adds reset handling to the devicetree-enabled Denali NAND driver. For backwards compatibility, only a warning is printed when failing to get reset handles. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17arm: socfpga: move gen5 SDR driver to DMSimon Goldschmidt
To clean up reset handling for socfpga gen5, port the DDR driver to DM using UCLASS_RAM and implement proper reset handling. This gets us rid of one ad-hoc call to socfpga_per_reset(). The gen5 driver is implemented in 2 distinct files. One of it (containing the calibration training) is not touched much and is kept at using hard coded addresses since the code grows even more otherwise. SPL is changed from calling hard into the DDR driver code to just probing UCLASS_RESET and UCLASS_RAM. It is happy after finding a RAM driver after that. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17reset: socfpga: add reset handling for old kernelsSimon Goldschmidt
This adds code to take peripherals out of reset based on an environment variable. This is in preparation for removing the code that does this from SPL. However, some drivers even in current Linux cannot handle peripheral reset, so until this works, we need a compatibility workaround. This workaround is implemented in the 'assert' and 'remove' callbacks of this reset driver: the 'assert' callback does not disable peripherals that were already taken out of reset, while the 'remove' callback, which is called on OS_PREPARE, deasserts all peripheral resets if the environment variable "socfpga_legacy_reset_compat" is set to 1, which is what the gen5 SPL did up to now. This is in preparation to clean up the SPL and implementing proper reset handling for U-Boot. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17arm: socfpga: gen5: deassert peripheral reset by defaultSimon Goldschmidt
To keep the current behaviour of taking all peripherals out of reset before booting the OS before removing that code from socfpga gen5 SPL, this enables the new behaviour by default for all gen5 boards by adding the environment variable "socfpga_legacy_reset_compat=1" to the default environment. This can be overridden in board config files or by saving an environment without this variable enabled. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17reset: socfpga: rename membase ptr to modrst_baseSimon Goldschmidt
The only member of this driver's priv struct is a pointer, which is called 'membase'. However, since this driver handles multiple sub- architectures, this is not the base address from dts but the base address of some common registers of those sub-arches. Reflect this better in sourcecode by renaming 'membase' to 'modrst_base'. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17arm: socfpga: gen5: add reset & sdr node to SPL devicetreesSimon Goldschmidt
The SPL for socfpga gen5 currently takes all peripherals out of reset unconditionally. To implement proper reset handling for peripherals, the reset node has to be provided with the SPL dts. In preparation to move the DDR driver to DM, the sdr node is required in SPL, too. This patch adds "u-boot,dm-pre-reloc" to U-Boot specific dtsi addon files so that the reset manager and SDR driver correctly probe in SPL. It centralizes these settings into a common file since in contrast to boot-type specific nodes, "soc", "rst" and "sdr" are always needed. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17arm: socfpga: gen5: sync devicetrees to LinuxSimon Goldschmidt
This is again a sync to linux-next + pending patches in Dinh's tree at commit 1c909b2dfe6a ("ARM: dts: socfpga: update more missing reset properties")' It adds missing peripheral reset properties to socfpga.dtsi and removes U-Boot specific leftovers from socfpga_cyclone5_socrates.dts. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
- drop non-DM code from ti_qspi - support spi-mem for ti_qspi
2019-04-17arm: am57xx: cl-som-am57x: remove board supportUri Mashiach
U-Boot support for the CL-SOM-AM57x module is no longer required. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
2019-04-17Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
- Convert DM_MMC and DM_SCSI - A20, R40, H6 Linux dts(i) sync - CLK, RESET support for sunxi, sun8_emac net drivers
2019-04-17Merge tag 'xilinx-for-v2019.07' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx/FPGA changes for v2019.07 fpga: - Add support for external data in FIT - Extend testing for external data case - Inform user about a need to run post config on Zynq arm: - Tune zynq command functions - Fix internal variable setting arm64: - Add support for zc39dr decoding - Disable WDT for zcu100 - Small changes in reset_reason() - Some DT changes (spi) - Tune qspi-mini configuration - Remove useless eeprom setting - Fix two sdhci boot case spi: - Fix tap delay programming clk: - Enable i2c in SPL net: - Fix gem phydev handling - Remove phy detection code from gem driver general: - Correct EXT_DTB usage for MULTI_DTB_FIT configuration
2019-04-17Merge tag 'uniphier-v2019.07' of git://git.denx.de/u-boot-uniphierTom Rini
UniPhier SoC updates for v2019.07 - Sync DT with Linux 5.1-rc4 - Enable CONFIG_SUPPORT_EMMC_RPMB for uniphier_v8_defconfig
2019-04-17spi: ti_qspi: Convert to spi-mem opsVignesh Raghavendra
Convert driver to use spi-mem ops in order to support accelerated MMIO flash interface in generic way and for better performance. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17spi: ti_qspi: Drop non DM codeVignesh Raghavendra
Now that all boards using TI QSPI have moved to DM and DT, drop non DM code completely. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [jagan: update MIGRATION.txt, rebase config_whitelist.txt] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17sunxi: update SATA driver to always use DM_SCSIAndre Przywara
It seems like the Allwinner SATA driver is already quite capable of using the driver model, so we can force this on all boards and can remove support for a non-DM_SCSI build. This removes the warning about boards with SATA ports not being DM_SCSI compliant. It also takes the opportunity to move the driver out of the board/sunxi directory to join its siblings in drivers/ata, and to make it a proper Kconfig citizen. The board defconfigs stay untouched. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: select DM_SCSI separately] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17arm: sunxi: Enable DM_MMC and DM_SCSIJagan Teki
- Enable DM_MMC if MMC defined - Enable DM_SCSI if SCSI defined globally through Allwinner platform, the effected SoC families and boards will make use of MMC and SCSI subsystems in driver-model. Tested DM_MMC in one board from A64, H6, H5, H3, R40, A83T, A20, A10 SoCs. Tested-by: Pablo Sebastián Greco <pgreco@centosproject.org> # BPI-M2-Ultra Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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