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sysreset uclass have own do_reset function which should be used instead
of board/platform specific.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is no reason not to use default ioremap/iounmap io functions.
The patch remove Microblaze macros.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch basically adds two new commands for loadig secure
images.
1. zynq rsa adds support to load secure image which can be both
authenticated or encrypted or both authenticated and encrypted
image in xilinx bootimage(BOOT.bin) format.
2. zynq aes command adds support to decrypt and load encrypted
image back to DDR as per destination address. The image has
to be encrypted using xilinx bootgen tool and to get only the
encrypted image from tool use -split option while invoking
bootgen.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Explanation from Simon Glass
"Private data is created when the device is probed and freed when the
device is removed.
Platform data is created when the device is bound, and survives
probe/remove cycles.
Strictly speaking, platform data should be used to hold the decoded
device tree properties. Private data should be used for run-time
things the device needs to keep track of."
Based on description the driver needs to be switch to use platdata
instead of priv.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Driver supports only one instance of usb keyboard.
Remove the first dependency on generic usbkbd DEVNAME.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is need to service watchdog in while loop or system will be
restarted when idlying.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch fixed the same if/else part error by adding the required
source select on the basis of is_pre_src check.
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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U-Boot needs to link ps7_init_gpl.c on Zynq or psu_init_gpl.c on
ZynqMP (PS init for short). The current logic to locate this file for
both platforms is:
1. if a board-specific file exists in
board/xilinx/zynq[mp]/$(CONFIG_DEFAULT_DEVICE_TREE)/ps?_init_gpl.c
then use it
2. otherwise use board/xilinx/zynq/ps?_init_gpl.c
In the latter case the file does not exist in the U-Boot sources and
must be copied in the source tree from the outside before starting the
build. This is typical when it is generated from Xilinx tools while
developing a custom hardware. However making sure that a
board-specific file is _not_ found (and used) requires some trickery
such as removing or overwriting all PS init files (e.g.: the current
meta-xilinx yocto layer).
This generates a few problems:
* if the source tree is shared among different out-of-tree builds,
they will pollute (and potentially corrupt) each other
* the source tree cannot be read-only
* any buildsystem must add a command to copy the PS init file binary
* overwriting or deleting files in the source tree is ugly as hell
Simplify usage by allowing to pass the path to the desired PS init
file in kconfig variable XILINX_PS_INIT_FILE. It can be an absolute
path or relative to $(srctree). If the variable is set, the
user-specified file will always be used without being copied
around. If the the variable is left empty, for backward compatibility
fall back to the old behaviour.
Since the issue is the same for Zynq and ZynqMP, add one kconfig
variable in a common place and use it for both.
Also use the new kconfig help text to document all the ways to give
U-Boot the PS init file.
Build-tested with all combinations of:
- platform: zynq or zynqmp
- PS init file: from XILINX_PS_INIT_FILE (absolute, relative path,
non-existing), in-tree board-specific, in board/xilinx/zynq[mp]/
- building in-tree, in subdir, in other directory
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is no reason to define default option for this macro which is
already done in common/cli_hush.c.
86 #ifndef CONFIG_SYS_PROMPT_HUSH_PS2
87 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
88 #endif
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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command_ret_t enum contains 3 return values but only two are handled
now. Extend cmd_process_error() and handle CMD_RET_USAGE separately.
These commands are affected by this change.
cmd/demo.c
cmd/efi.c
cmd/gpio.c
cmd/qfw.c
cmd/x86/fsp.c
test/dm/cmd_dm.c
And scripts shouldn't be affected because return value is not 0. But
every command implementation can choose what it is correct to pass.
I would expect that RET_USAGE is called when parameters are not
correctly passed (have incorrect value, missing parameters)
and RET_FAILURE when correct parameters are passed but command fails.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromum.org>
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Use enum command_ret_t types in cmd_process_error().
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromum.org>
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Enable ums command for zcu100 to enable mass storage gadget.
Tested with ums 0 mmc 0 (for SD) and ums 0 usb 0 (for USB flashdisk).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Use live-tree function.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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The Libretech ALL-H3-CC has a high density connector for attaching
an eMMC module. The module form factor and connection is specific
to Libretech, and has provisions for split vmmc/vqmmc (core and I/O)
voltage supplies, but this board does not wire the vqmmc side. The
H2+/H3/H5 SoCs do not support alternate I/O voltages for eMMC either.
Only 3.3V is supported. A specific module that ties vqmmc to vmmc,
with both at 3.3V, must be used.
Given that a) eMMC is not designed to be hotplugged, b) power is
always provided on the pins, and c) MMC controllers can deal with
missing cards, we can enable this by default. If a module is attached
it will be picked up by the system.
The device tree change was also submitted to the Linux Kernel and
has already been queued up for 4.19.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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This commit adds paired dev info for winbond w25q16jv
(tested w25q16jvssiq with a i.mx6 board)
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Add support for the Macronix mx25l1633e nor flash. (Tested on a imx6 board)
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Add support for the Gigadevice gd25q16c nor flash. (Tested on a imx6 board)
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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This commit adds the following flashes to the id-table
- W25Q16JV
- W25Q32JV
- W25Q64JV
- W25Q128JV
- W25Q256JV
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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This patch adds qspi driver support for all ZynqMP ZCU102
boards.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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This patch adds qspi driver support for ZynqMP SoC. This
driver is responsible for communicating with qspi flash
devices.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
[jagan: removed GQSPI_MIO_NUM_ macros]
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Update the xilinx spi driver to support a live tree.
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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This patch is for the startup block issue in the spi controller.
SPI clock is passing through STARTUP block to FLASH. STARTUP block
don't provide clock as soon as QSPI provides command. So, first
command fails.
This patch added support to read JEDEC id in xilinx_spi_xfer ().
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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This patch modify xilinx_spi_xfer() function and add rxfifo() and
txfifo() functions to add the modularity so that these functions
can be used by other functions within the same file.
This patch also added support to read fifo_size from dts.
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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This patch added support to read register base address from DTS file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Enable the gigabit ethernet for the Bananapi M2 Ultra board.
Tested on BananaPi M2 Berry (R40), custom board (V40)
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
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Add a device tree node for the Allwinner R40/V40 GMAC gigabit
ethernet interface.
The R40 SoC does not use the syscon register for GMAC settings.
The gigabit ethernet interface can only be routed to a fixed set of
pins.
Updated to match the Linux kernel's device tree.
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
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Add support for the GMAC found in the Allwinner R40/V40 SoC.
The R40 GMAC interface is not controlled by the syscon register but
has a separate configuration register in the CCU.
The clock gate and reset bits are in a different register compared
to the other SoCs supported by this driver.
The driver uses the -gmac suffix for the R40 because the R40 also
has a different 100 MBit MAC (EMAC).
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
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Use driver data->variant information to select device specific
pin mux and phy clock settings.
Suggested by Jagan Teki
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
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If the variant is not set and therefore NULL, do not attempt to print
the variant.
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
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Add clock control entries for the gigabit interface of the Allwinner
R40/V40 CPU
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
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Use the driver model for MMC and SATA, in preparation for CONFIG_BLK
defaulting to y.
Tested on A10 Cubieboard.
Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model")
only added the allwinner,sun5i-a13-mmc compatible string for this
driver. The DM initialisation code here also works with (at least) A10
and A20, so add the appropriate compatible strings as per Linux 4.17's
driver.
Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC.
(A20 worked already, because sun7i-a20.dtsi specifies both the A13 and
A20 strings.)
Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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When the defconfig for the SoPine baseboard was added, there wasn't any
proper DT for the board yet, so we used the Pine64 DT as a placeholder.
Copy the DT file(s) meanwhile added in Linux over to U-Boot, and use
them in our defconfig.
This is as of v4.18-rc3, exactly Linux commit:
commit 7d556bfc49adddf2beb0d16c91945c3b8b783282
Author: Jagan Teki <jagannadh.teki@gmail.com>
Date: Mon Dec 4 10:23:07 2017 +0530
arm64: allwinner: a64-sopine: Fix to use dcdc1 regulator instead of vcc3v3
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
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Update the .dts file for the various boards with an Allwinner H3 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 721afaa2aeb860067decdddadc84ed16f42f2048 (HEAD)
Merge: 7c00e8ae041b 87815dda5593
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Mon Jun 11 17:57:38 2018 -0700
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
This also includes the OrangePi Zero .dts, which technically has an
Allwinner H2+ SoC.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
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Update the .dts file for the various boards with an Allwinner H5 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit af5d05bdc99c211729cba0a3d5417bccfa308caf
Author: Neil Armstrong <narmstrong@baylibre.com>
Date: Tue Apr 24 13:47:14 2018 +0200
arm64: dts: allwinner: Add dts file for Libre Computer Board ALL-H3-CC H5 ver.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
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Update the device tree files from the Linux tree as of v4.18-rc3,
exactly Linux commit:
commit 55c5ba5e49a0a124ed416880e8227b493474495e
Author: Chen-Yu Tsai <wens@csie.org>
Date: Tue Apr 24 19:34:22 2018 +0800
arm64: dts: allwinner: h5: Add cpu0 label for first cpu
Since the H3 and H5 are very similar (aside from the actual ARM cores),
they share most the SoC .dtsi and thus have to be updated together.
One tiny change is the removal of the "arm/" prefix from the include
path in the sun50i-h5.dtsi, which is needed because we don't share the
same sophisticated DT directory layout of Linux.
Also we need to fix up the board .dts files already, since the .dtsi
removes some pins, so the .dts can't reference them anymore. This is to
maintain bisectability.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
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Update the .dts files for the various boards with an Allwinner A64 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 818668055c9d588c9a9d151e3b258ed1adacba0b
Author: Jagan Teki <jagan@amarulasolutions.com>
Date: Mon Apr 23 12:02:39 2018 +0530
arm64: dts: allwinner: a64: bananapi-m64: add usb otg
It updates the existing DT files, adds the newly added axp803.dtsi and
removes our temporary kludge file to get Ethernet support in U-Boot.
I left the amarula-relic alone, as this DT has not reached mainline yet.
The changes are not critical anyway, and the next sync will fix this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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Updates the device tree file from the the Linux tree as of v4.18-rc3,
exactly Linux commit:
commit c1cff65f9b16b31e731e2e75bbe06638c86e1996
Author: Harald Geyer <harald@ccbib.org>
Date: Thu Mar 15 16:25:08 2018 +0000
arm64: dts: allwinner: a64: add simplefb for A64 SoC
This also pulls in the newly required include files for the clock and
reset bindings, also removes the now redundant part from our
*-u-boot.dtsi overlay file.
I kept the PWM node from U-Boot, as we recently gained this explicitly
for U-Boot's own usage and I don't want to regress here. This node is in
the queue for mainline Linux already, so the next sync will make it all
equal again.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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CONFIG_SPL_RESET_SUPPORT has been renamed to CONFIG_SPL_DM_RESET, update
this Kconfig file.
Fixes: bfc6bae8fa1f ("reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET")
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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- Update SPDX tag in arch/arm/mach-socfpga/spl_a10.c
Signed-off-by: Tom Rini <trini@konsulko.com>
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Fix compilation warning when enable CONFIG_DEBUG_UART.
arch/arm/mach-socfpga/spl_s10.c: In function ‘board_init_f’:
arch/arm/mach-socfpga/spl_s10.c:146:2: warning: implicit declaration of function ‘debug_uart_init’; did you mean ‘part_init’? [-Wimplicit-function-declaration]
debug_uart_init();
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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MCR instruction only available in ARM 32-bit. So, compile MCR instruction
when ARM 32-bit is enabled.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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Commit 5dfd5607af2114047bd ("ARM: socfpga: Pull DRAM size from DT") get
memory size from DT. So, we need to update memory size in memory node.
Otherwise, it cause U-boot hang.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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When doing "i2c dev 4; i2c probe" with ENET daughter card connected
on iMX8QXP MEK board, we met a i2c bus busy issue, that the BBF of
lpi2c always show busy, but the master is idle, and stop is detected
(SDF set).
This patch addes a handling to re-init the lpi2c master for this
case. Then the issue can be worked around.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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In xfer function, both bus_i2c_read and bus_i2c_write will
send a STOP command. This causes a problem when reading register
data from i2c device.
Generally two operations comprise the register data reading:
1. Write the register address to i2c device.
START | chip_addr | W | ACK | register_addr | ACK |
2. Read the Data from i2c device.
START | chip_addr | R | ACK | DATA | NACK | STOP
The STOP command should happen at the end of the transfer, otherwise
we will always get data from register address 0
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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For LPI2C IP, NACK is detected by the rising edge of the ninth clock.
In current uboot driver, once NACK is detected, it will reset and then
disable LPI2C master. As a result, we can never see the falling edge
of the ninth clock.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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