summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2020-08-25mmc: Add MMC controller driver for OcteonTX / TX2Suneel Garapati
Adds support for MMC controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Peng Fan <peng.fan@nxp.com>
2020-08-25pci: Add PCI controller driver for OcteonTX / TX2Suneel Garapati
Adds support for PCI ECAM/PEM controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25ata: ahci: Add BAR index quirk for Cavium PCI SATA deviceSuneel Garapati
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0 instead of BAR5. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25arm: octeontx2: Add headers for OcteonTX2Suneel Garapati
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25arm: octeontx: Add headers for OcteonTXSuneel Garapati
Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25arm: include/asm/io.h: Add 64bit clrbits and setbits helpersSuneel Garapati
Add 64bit API for clrbits and setbits. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25pci: pci-uclass: Check validity of ofnodeSuneel Garapati
Add check if the referenced ofnode is valid. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Alternate-RoutingID capabilitySuneel Garapati
If ARI capability is found on device, use it to update next function number in bus scan and also helps to skip unnecessary bdf scans. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add VF BAR map support for Enhanced AllocationSuneel Garapati
Makes dm_pci_map_bar API available to map BAR for Virtual function PCI devices which support Enhanced Allocation. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Single-Root I/O VirtualizationSuneel Garapati
SR-IOV - Single Root I/O Virtualization PF - Physical Function VF - Virtual Function If SR-IOV capability is present, use it to initialize Virtual Function PCI device instances. pci_sriov_init function will read SR-IOV registers to create VF devices under the PF PCI device and also bind driver if available. This function needs to be invoked from Physical function device driver which expects VF device support, creating minimal impact on existing framework. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Enhanced Allocation in BridgesSuneel Garapati
If Enhanced Allocation capability is present in bridges, use it to read the fixed sub-ordinate bus number. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add multi entry support for memory regionsSuneel Garapati
Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25Link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954xTrommel, Kees (Contractor)
Fix for the case of a U-Boot configuration with CONFIG_SPL, CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because dm_write_i2c does not exist because CONFIG_SPL_DM is not defined. Signed-off-by: Kees Trommel <kees.trommel.contractor@draeger.com> Cc: Heiko Schocher <hs@denx.de>
2020-08-25i2c: octeon_i2c: Misc fixes for ARM Octeon TX2 supportStefan Roese
This patch fixes a few issues noticed, when testing this new driver on ARM Octeon TX2 again. Here the details: - Remove "common.h" header inclusion - Use correct THP define on Octeon TX2 - Octeon TX2 uses the same compatible as Octeon TX. We can't distinguish both platforms this way. Remove the unused "cavium,thunder2-99xx-twsi" compatible and add a check to the Octeon TX2 specific "cavium,thunderx-i2c" so that the correct driver data is selected. - Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE() as its not needed for the PCI based probing on Octeon TX2 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Suneel Garapati <sgarapati@marvell.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-25pci: pci-uclass: Make DT subnode parse optionalSuneel Garapati
Parse subnode DT properties only if parent node is valid. Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode from dev_for_each_subnode. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Fix incorrect argument in map_physmemSuneel Garapati
Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar(). Additinally minor spelling correction. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Dynamically allocate the PCI regionsStefan Roese
Instead of using a fixed length pre-allocated array of regions, this patch moves to dynamically allocating the regions based on the number of available regions plus the necessary regions for DRAM banks. Since MAX_PCI_REGIONS is not needed any more, its removed completely with this patch. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-08-25ARM: renesas: Drop unnecessary function ft_board_setup()Stefan Roese
Marek explained on IRC, that ft_board_setup() is not used / necessary at all. So its best to just drop it completely, as it interferes with the cleanup of CONFIG_MAX_PCI_REGIONS (completely removed). Signed-off-by: Stefan Roese <sr@denx.de> Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always setStefan Roese
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for all boards. Hence we can remove the conditional compilation and the code path that will never get compiled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25dm: core: Add API to read PCI bus-range propertyStefan Roese
Add dev_read_pci_bus_range() to read bus-range property values Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25fdtdec: Add API to read pci bus-range propertySuneel Garapati
Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25cmd: provide command sbiHeinrich Schuchardt
Provide a command to display information about the SBI implementation. The output might look like: => sbi SBI 0.2 OpenSBI Extensions: sbi_set_timer sbi_console_putchar sbi_console_getchar sbi_clear_ipi sbi_send_ipi sbi_remote_fence_i sbi_remote_sfence_vma sbi_remote_sfence_vma_asid sbi_shutdown SBI Base Functionality Timer Extension IPI Extension RFENCE Extension Hart State Management Extension The command can be used to construct a unit test checking that the communication with the SEE is working. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com> Tested-by: Pragnesh Patel <pragnesh.patel@openfive.com> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Rick Chen <rick@andestech.com>
2020-08-25configs: defconfig for Sipeed Maix in S-modeHeinrich Schuchardt
Provide a defconfig that can be used to build U-Boot for the Maix boards running upon OpenSBI. Update the documentation. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2020-08-25riscv: fix building with CONFIG_SPL_SMP=nHeinrich Schuchardt
Building with CONFIG_SPL_SMP=n results in: arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’: arch/riscv/lib/spl.c:33:6: error: unused variable ‘ret’ [-Werror=unused-variable] 33 | int ret; | ^~~ Define the variable ret as __maybe_unused. Fixes: 191636e44898 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL") Fixes: 8c59f2023cc8 ("riscv: add SPL support") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-25clk: kendryte/pll.h: do not redefine nop()Heinrich Schuchardt
The kendryte PLL code uses nop as barrier. The macro is not defined for the sandbox on x86 but is defined on RISC-V. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-08-25ram: sifive: Fix compiler warnings for 32-bitBin Meng
priv->info.size is of type 'size_t' but the length modifier is l. Fix this by casting priv->info.size. Note 'z' cannot be used as the modifier as SPL does not support that. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-25riscv: fu540: Use correct API to get L2 cache controller base addressBin Meng
At present fdtdec_get_addr() is used to get L2 cache controller base address. This only works for a fixed #address-cells and #size-cells. Change to use fdtdec_get_addr_size_auto_parent() instead. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-24Merge tag 'efi-2020-10-rc3-3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-10-rc3 (3) The following bug fixes are contained in this pull-request: * ResetSystem() should no hang if not implemented. * Device paths in Bootxxxx variables should be verified. * Use ':' as separator for command setenv -e -i instead of ','. * Correct comments for functions. * Update UEFI documentation.
2020-08-24xen: Code style conformityAnastasiia Lukianenko
Cleaning up the following: ERROR: do not use assignment in if condition #281: FILE: drivers/xen/pvblock.c:260: + if ((err = xenbus_switch_state(XBT_NIL, nodename, CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "err" #52: FILE: drivers/xen/pvblock.c:298: + if (err != NULL) { ERROR: do not use assignment in if condition #176: FILE: drivers/xen/gnttab.c:103: + if ((flags = nflags) & (GTF_reading | GTF_writing)) { WARNING: Missing or malformed SPDX-License-Identifier tag in line 1 #329: FILE: include/xen/gnttab.h:1: +/* WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead #330: FILE: include/xen/gnttab.h:2: + * SPDX-License-Identifier: GPL-2.0 ERROR: do not use assignment in if condition #630: FILE: lib/sscanf.c:558: + if ((n = inr) < width) { Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24board: xen: Remove unnecessary CONFIG_INITRD_TAG and CONFIG_CMDLINE_TAGAnastasiia Lukianenko
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24board: xen: Remove CONFIG_CMD_RUN define and clean xenguest_arm64_defconfigAnastasiia Lukianenko
CONFIG_CMD_RUN is set on by default in Kconfig. Create xenguest_arm64_defconfig by using savedefconfig to avoid unnecessary options. Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24MAINTAINERS: Add maintainers to XEN sectionAnastasiia Lukianenko
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24board: xen: Remove unnecessary CONFIG_BOARD_EARLY_INIT_F define and ↵Anastasiia Lukianenko
board_early_init_f function Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-24arm: dts: mt7623: add USB nodesFrank Wunderlich
This adds USB nodes for MT7623/BPI-R2 Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-24arm: dts: mt7622: add USB nodesFrank Wunderlich
Add DTS nodes for MT7622/BPI-R64 Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-24arm: dts: rename mt7622-bpi-r64.dtsFrank Wunderlich
rename mt7622-bpi-r64.dts to mt7622-bananapi-bpi-r64.dts to follow naming convensions Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24clk: mt7622: add needed clocks for ssusb-nodeFrank Wunderlich
MT7622 needs additional clock definitions to work properly Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24ahci: mediatek: fix copyright and author-linesFrank Wunderlich
after review of sam copyright should be on one line and link should not between author lines just remove the link and put ryder first as he is author of linux-driver Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24reset: drop unnecessary comment for pciesysFrank Wunderlich
after review from sam this comment should be removed Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24phy: mtk-tphy: make shared reg optional for v1Frank Wunderlich
make the shared reg optional when version is v1 for sata Suggested-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-24fs/squashfs: Fix Coverity Scan defectsJoao Marcos Costa
Fix defects such as uninitialized variables and untrusted pointer operations. Most part of the tainted variables and the related defects actually comes from Linux's macro get_unaligned_le**, extensively used in SquashFS code. Add sanity checks for those variables. Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24virtio_blk: set log2blksz correctlyAKASHI Takahiro
'log2blksz' in blk_desc structure must always be initialized, otherwise it will cause a lot of weird failures in file operations. For example, fs_set_blk_dev[_with_part]() examines a block device against every file system with its probe function. In particular, ext4 file system's ext4_probe() will calls fs_devread() to fetch a super block. If log2blksz is 0, the actual 'read' size, i.e. block_len >> log2blksz, is much bigger than a buffer's size, and it can end up with memory corruption. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Fixes: f4802209e59d ("virtio: Add block driver support") Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-24test/py: Add tests for LZO and ZSTDJoao Marcos Costa
Improve SquashFS tests architecture. Add 'Compression' class. LZO algorithm may crash if the file is fragmented, so the fragments are disabled when testing LZO. Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24fs/squashfs: add support for LZO decompressionJoao Marcos Costa
Add call to lzo's lzo1x_decompress_safe() into sqfs_decompress(). U-Boot's LZO sources may still have some unsolved issues that could make the decompression crash when dealing with fragmented files, so those should be avoided. The "-no-fragments" option can be passed to mksquashfs. Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24fs/squashfs: add support for ZSTD decompressionJoao Marcos Costa
Add call to ZSTD's ZSTD_decompressDCtx(). In this use case, the caller can upper bound the decompressed size, which will be the SquashFS data block (or metadata block) size, so there is no need to use streaming API. Add ZSTD's worskpace to squashfs_ctxt structure. Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24fs/squashfs: replace sqfs_decompress() parameterJoao Marcos Costa
Replace 'u16 comp_type' by a reference to squashfs_ctxt structure. Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24fs/squashfs: Add init and clean-up functions to decompressionJoao Marcos Costa
Add sqfs_decompressor_init() and sqfs_decompressor_cleanup(). These functions are called respectively in sqfs_probe() and sqfs_close(). For now, only ZSTD requires an initialization logic. ZSTD support will be added in a follow-up commit. Move squashfs_ctxt definition to sqfs_filesystem.h. This structure is passed to sqfs_decompressor_init() and sqfs_decompressor_cleanup(), so it can no longer be local to sqfs.c. Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24cmd: fix clone coverity scanJohn Chau
This patch fixes coverity scan MISSING_BREAK issues, and also an error on block size check. Signed-off-by: John Chau <john@harmon.hk>
2020-08-24firmware: psci: Do not bind driver if U-Boot runs in EL3Michal Simek
There is no reason to bind psci driver if U-Boot runs in EL3 because SMC/HVC instructions can't be called. That's why detect this state and don't let user to crash from prompt by performing reset or poweroff commands (if enabled). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-24board: armltd: Add support for Total Compute platformUsama Arif
Total Compute is based on ARM architecture and has the following features enabled in u-boot: - PL011 UART - PL180 MMC - NOR Flash - FIT image with Signature - AVB Signed-off-by: Usama Arif <usama.arif@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
generated by cgit (git 2.34.1) at 2024-12-24 14:10:43 +0000