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2016-10-28travis-ci: remove duplicate buildStephen Warren
There were two sub-jobs to build arm1136. Remove the duplicate. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-28travis-ci: set env vars to name jobsStephen Warren
Travis CI names sub-jobs after the first environment variable that is set for a script. This doesn't produce meaningful results for any of the non- buildman jobs. Add a dummy variable to give the jobs meaningful names. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-28Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2016-10-28dm: at91: Add driver model support for the spi driverWenyou Yang
Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-28board: sama5d2_xplained: Enable an early debug UARTWenyou Yang
Enable an early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-10-28board: sama5d2_xplained: Set 'ethaddr' got from AT24MACWenyou Yang
If 'ethaddr' is not set, we will get the ethernet address from AT24MAC, and set it to 'ethaddr' variable. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Songjun Wu <songjun.wu@microchip.com> Reviewed-by: Andreas Bießmann <biessmann@corscience.de>
2016-10-28board: sama5d2_xplained: Clean up codeWenyou Yang
Since the introduction of pinctrl and clk driver, and the dts file, remove unneeded the pin configurations and the clock enabling code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-10-28board: sama5d2_xplained: Move config options to defconfigsWenyou Yang
Move the config options from the include/configs/sama5d2_xplained.h to configs/sama5d2_xplained_*_defconfig. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-10-28serial: atmel_usart: Support enable an early debug UARTWenyou Yang
Add support to enable an early debug UART for debugging. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28serial: Kconfig: Add ATMEL_USART optionWenyou Yang
Add ATMEL_USART option to support to enable the Atmel usart driver from Kconfig. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28mmc: atmel_sdhci: Remove unnecessary clock callingWenyou Yang
Due to the peripheral and generated clock driver improvement, remove the unnecessary clock calling. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-28usb: ehci-atmel: Remove unnecessary clock callingWenyou Yang
Due to the peripheral clock driver improvement, remove the unnecessary clock calling. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28i2c: at91_i2c: Change error return -ENODEV to -EINVALWenyou Yang
Change the error return value -ENODEV from to -EINVAL for more reasonable. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2016-10-28i2c: at91_i2c: Remove unnecessary clock callingWenyou Yang
Due to the peripheral clock driver improvement, remove the unnecessary clock calling. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2016-10-28gpio: atmel_pio4: Remove unnecessary clock callingWenyou Yang
Due to the peripheral clock driver improvement, remove the unnecessary clock calling. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-28clk: at91: Improve the clock implementationWenyou Yang
For the peripheral clock, provide the clock ops for the clock provider, such as spi0_clk. The .of_xlate is to get the clk->id, the .enable is to enable the spi0 peripheral clock, the .get_rate is to get the clock frequency. The driver for periph32ck node is responsible for recursively binding its children as clk devices, not provide the clock ops. So do the generated clock and system clock. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-28clk: clk-uclass: Assign clk->dev before call .of_xlateWenyou Yang
In order to make clk->dev available in ops->of_xlate() to get the clock ID from the 'reg' property of the clock node, assign the clk->dev before calling ops->of_xlate(). Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-28ARM: at91/dt: sama5d2: Fix the warning from dtcWenyou Yang
Fix the warning from dtc like, ---8<---- Warning (unit_address_vs_reg): Node /ahb/apb/pmc@f0014000/periph64ck/sdmmc0_hclk has a reg or ranges property, but no unit name --->8---- Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-28clk: at91: Fix at91-pmc and at91-sckc's class IDWenyou Yang
The at91-pmc and at91-sckc aren't the clock providers, change their class ID from UCLASS_CLK to UCLASS_SIMPLE_BUS, they also don't need to bind the child nodes explicitly, the .post_bind callback of simple_bus uclass will do it for them. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-28AT91: Correct misspelling of "redundent" in partition namesRobert P. J. Day
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28arm, at91: add icache supportHeiko Schocher
add at least icache support for at91 based boards. This speeds up NOR flash access on an at91sam9g15 based board from 15.2 seconds reading 8 MiB from a SPI NOR flash to 5.7 seconds. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28ARM: at91: clock: correct PRES offset for at91sam9x5Heiko Schocher
on at91sam9x5 PRES offset is 4 in the PMC master clock register. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28arm: at91: mpddrc: add missing MPDDRC_MD definesHeiko Schocher
add missing MPDDRC_MD defines Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: common/Kconfig configs/dms-ba16_defconfig
2016-10-28Merge branch 'master' of http://git.denx.de/u-boot-mmcTom Rini
2016-10-28pci: Move CONFIG_PCI_PNP to KconfigBin Meng
Introduce CONFIG_PCI_PNP in Kconfig and move over boards' defconfig to use that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Re-generate configs and include/configs/ changes] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-28dm: mmc: socfpga: fix MMC_OPS supportSylvain Lesne
Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at runtime. This adds the missing fields in the driver declaration. Signed-off-by: Sylvain Lesne <lesne@alse-fr.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-28mmc: sdhci: assign to clk_mul when host version is upper than SD3.0Jaehoon Chung
To prevent the wrong value check the SD version. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-28mmc: add the device name in debugging message for supplying vmmcJaehoon Chung
If vmmc didn't supply, we didn't know which card didn't supply vmmc. And changed from "put" to "debug". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2016-10-28dm: mmc: socfpga: fix MMC_OPS supportSylvain Lesne
Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at runtime. This adds the missing fields in the driver declaration. Signed-off-by: Sylvain Lesne <lesne@alse-fr.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-28mmc: refactor two core functionsMasahiro Yamada
Drop unneeded variables and assignments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-28mmc: sdhci: fix the "misaligned operation at range" for cacheJaehoon Chung
This pathc is fixed the below thing. If misaligned the cache range, Just flush to CACHLINE_SIZE. "CACHE: Misaligned operation at range [7ae55b00, 7ae55b08]" Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-28mmc: introduce mmc_power_initPeng Fan
In device tree, there is vmmc-supply property for SD/MMC. Introduce mmc_power_init function to handle vmmc-supply. mmc_power_init will first invoke board_mmc_power_init to avoid break boards which already implement board_mmc_power_init. If DM_MMC and DM_REGULATOR is defined, the regulator will be enabled to power up the device. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-27drivers/pci/Kconfig: Add PCITom Rini
Add 'PCI' as a menu option and migrate all existing users. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-27arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: sr1500: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: vining_fpga: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: is1: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: socrates: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: mcvevk: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27ddr: altera: Configuring SDRAM extra cycles timing parametersChin Liang See
To enable configuration of sdr.ctrlcfg.extratime1 register which enable extra clocks for read to write command timing. This is critical to ensure successful LPDDR2 interface Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27usb: xhci-mvebu: use xhci_deregister() for .remove callbackMasahiro Yamada
No need to use a wrapper that is equivalent to xhci_deregister(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-27usb: ehci-vf: use ehci_deregister() for .remove callbackMasahiro Yamada
This driver was recently converted to Driver Model, so missed the subsystem-wide cleanups by commit 405273427366 ("usb: replace ehci_*_remove() with usb_deregister()"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-26imx6: icorem6: Add default mtd nand partition tableJagan Teki
icorem6qdl> mtdparts device nand0 <nand>, # parts = 6 0: spl 0x00200000 0x00000000 0 1: uboot 0x00200000 0x00200000 0 2: env 0x00100000 0x00400000 0 3: kernel 0x00400000 0x00500000 0 4: dtb 0x00100000 0x00900000 0 5: rootfs 0x1f600000 0x00a00000 0 Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26imx6: icorem6: Enable MTD device supportJagan Teki
Enable MTD device, partition and command support. Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26imx6: icorem6: Add NAND supportJagan Teki
Add NAND support for Engicam i.CoreM6 qdl board. Boot Log: -------- U-Boot SPL 2016.09-rc2-30755-gd3dc581-dirty (Sep 28 2016 - 23:00:43) Trying to boot from NAND NAND : 512 MiB U-Boot 2016.09-rc2-30755-gd3dc581-dirty (Sep 28 2016 - 23:00:43 +0530) CPU: Freescale i.MX6SOLO rev1.3 at 792MHz CPU: Industrial temperature grade (-40C to 105C) at 55C Reset cause: WDOG Model: Engicam i.CoreM6 DualLite/Solo Starter Kit DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 icorem6qdl> Cc: Scott Wood <oss@buserror.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26mtd: nand: Kconfig: Add NAND_MXS entryJagan Teki
Added kconfig for NAND_MXS driver. Cc: Scott Wood <oss@buserror.net> Cc: Simon Glass <sjg@chromium.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/DualJagan Teki
i.CoreM6 Quad/Dual modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DQ, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
generated by cgit (git 2.34.1) at 2025-01-05 01:17:08 +0000