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2011-07-16arm: add __ilog2 functionRob Herring
Add __ilog2 function for ARM. Needed for ahci.c Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Albert ARIBAUD <albert.aribaud@free.fr>
2011-07-16Timer: Fix misuse of ARM *timer_masked() functions outside arch/armGraeme Russ
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2011-07-15mmc: rescan fails on empty slotMichael Jones
Fail in 'mmc rescan' if mmc_init() returns error Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15AT91:mmc:fix multiple read/write errorelen.song
According to datasheet,set block count before multiple read/write. Signed-off-by: elen.song <elen.song@atmel.com> Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15mmc: Access mode validation for eMMC cards > 2 GiBŁukasz Majewski
This patch provides handling of the two way handshake when SEND_OP_COND (CMD1) is send to mmc card. It is necessary to inform eMMC card if the host can work with high capacity cards (Jedec JESD84-A441, point 7.4.3). The extra flag MMC_MODE_HC (high capacity) is added to indicate if the host is capable of handling the high capacity eMMC cards. Since this change is added to the generic mmc framework, then it requires other boards to indicate if their mmc controllers can handle high capacity cards. As it is now - the old behaviour of the framework is preserved. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-07-15mmc: sh_mmcif: add support for Renesas MMCIFYoshihiro Shimoda
Some Renesas SuperH have MMCIF module. This driver supports it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15mmc: fix the condition for MMC version 4Yoshihiro Shimoda
Fix the problem that if we use the chip of MMC version 4 and the capacity is smaller than 2GB or equal, the mmc->capacity is invalid. According to the JEDEC Standard, the value of ext_csd's capacity is valid if the value is more than 2GB. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15MMC: add marvell sdhci driverLei Wen
This could support both armada100 and pantheon serial in the mainline, while this driver also be tested to support upcoming mg, mmp2 and mmp3 hardware. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15MMC: add sdhci generic frameworkLei Wen
Nowdays, there are plenty of mmc driver in uboot adopt the sd standard host design, aka as sdhci. It is better to centralize the common logic together to better maintenance. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15MMC: add erase function to both mmc and sdLei Wen
Erase is a very basic function since the begin of sd specification is announced. Although we could write a bulk of full 0xff memory to the range to take place of erase, it is more convenient and safe to implement the erase function itself. Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-07-15MMC: unify mmc read and write operationLei Wen
mmc read and write command has so many in common, unfiy those two to force consistency across the those two. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15mmc: Tegra2: Enable SD/MMC driver for Seaboard and HarmonyTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3Tom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-14fdt: introduce fdt_create_phandle()Gerald Van Baren
The ePAPR specification says that phandle properties should be called "phandle", and not "linux,phandle". To facilitate the migration from "linux,phandle" to "phandle", introduce function fdt_create_phandle(), which creates a phandle in a given node. For now, we create both the "phandle" and "linux,phandle" properties. A later version of this function will remove support for "linux,phandle". Signed-off-by: Timur Tabi <timur@freescale.com>
2011-07-14fdt: add prototype for fdt_increase_size()Timur Tabi
Add a prototype for fdt_increase_size() so that anyone can call it. Signed-off-by: Timur Tabi <timur@freescale.com>
2011-07-14fdt: introduce fdt_verify_alias_address() and fdt_get_base_address()Timur Tabi
Introduce two functions, fdt_verify_alias_address() and fdt_get_base_address(), which can be used to verify the physical address of a device in a device tree. fdt_get_base_address() returns the base address of an SOC or PCI node. fdt_verify_alias_address() prints a message if the address of a node specified by an alias does not match the given physical address. Signed-off-by: Timur Tabi <timur@freescale.com>
2011-07-14libfdt: Implement property iteration functionsDavid Gibson
For ages, we've been talking about adding functions to libfdt to allow iteration through properties. So, finally, here are some. I got bogged down on this for a long time because I didn't want to expose offsets directly to properties to the callers. But without that, attempting to make reasonable iteration functions just became horrible. So eventually, I settled on an interface which does now expose property offsets. fdt_first_property_offset() and fdt_next_property_offset() are used to step through the offsets of the properties starting from a particularly node offset. The details of the property at each offset can then be retrieved with either fdt_get_property_by_offset() or fdt_getprop_by_offset() which have interfaces similar to fdt_get_property() and fdt_getprop() respectively. No explicit testcases are included, but we do use the new functions to reimplement the existing fdt_get_property() function. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> This was extracted from the DTC commit: 73dca9ae0b9abe6924ba640164ecce9f8df69c5a Mon Sep 17 00:00:00 2001 Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2011-07-14Support ePAPR compliant phandle propertiesDavid Gibson
Currently, the Linux kernel, libfdt and dtc, when using flattened device trees encode a node's phandle into a property named "linux,phandle". The ePAPR specification, however - aiming as it is to not be a Linux specific spec - requires that phandles be encoded in a property named simply "phandle". This patch adds support for this newer approach to dtc and libfdt. Specifically: - fdt_get_phandle() will now return the correct phandle if it is supplied in either of these properties - fdt_node_offset_by_phandle() will correctly find a node with the given phandle encoded in either property. - By default, when auto-generating phandles, dtc will encode it into both properties for maximum compatibility. A new -H option allows either only old-style or only new-style properties to be generated. - If phandle properties are explicitly supplied in the dts file, dtc will not auto-generate ones in the alternate format. - If both properties are supplied, dtc will check that they have the same value. - Some existing testcases are updated to use a mix of old and new-style phandles, partially testing the changes. - A new phandle_format test further tests the libfdt support, and the -H option. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> This was extracted from the DTC commit: d75b33af676d0beac8398651a7f09037555a550b Mon Sep 17 00:00:00 2001 Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2011-07-14EfikaMX: Enable EXT2 bootingMarek Vasut
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-07-14EfikaMX: Add missing CONFIG_SYS_TEXT_BASEJana Rapava
Signed-off-by: Jana Rapava <fermata7@gmail.com>
2011-07-14EfikaMX: Use correct imximage.cfgJana Rapava
Signed-off-by: Jana Rapava <fermata7@gmail.com>
2011-07-14MX27: Update to autogenerated asm-offsets.hStefano Babic
On i.MX27, the asm-offsets.h file is not yet generated as it should be. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de>
2011-07-14MX5: Update to autogenerated asm-offsets.hStefano Babic
On i.MX5, the asm-offsets.h file is not yet generated as it should be. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de>
2011-07-14imx: Add support for zmx25 boardMatthias Weisser
zmx25 is a board based on imx25 SoC, 64 Megs of LPDDR, 32 Megs of NOR flash, an optional NAND flash. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14imx: Make imx25 compatible to mxc_gpio driver and fix in tx25Matthias Weisser
Adding support for mxc_gpio driver for imx25 and fix names of registers in tx25 board. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14imx: Add auto generation of asm-offsets.h for imx25Matthias Weisser
Offsets to registers may be needed in asm code. This patch adds automated generation of these offsets form C structures. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14imx: Add support for USB EHCI on imx25Matthias Weisser
Adding support for USB host on imx25 using the internal PHY. Changing the name of base address define for imx31 to get some unification. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14imx: Use correct imx25 reset.cMatthias Weisser
imx25 used the wrong reset.c from imx27 Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14imx: Add get_tbclk() function for imx25Matthias Weisser
Need this function for autoboot keyd Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14ARM: Update maintainer of board scb9328Torsten Koschorrek
Signed-off-by: Torsten Koschorrek <koschorrek@synertronixx.de>
2011-07-14mx27: Make the UART port number explicitFabio Estevam
mx27_uart_init_pins does the IOMUX setting for UART1 port. Change the function name to make the UART port number explicit. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-14build: Add targets for auto gen of asm-offsets.h and use it in imx35Matthias Weisser
asm-offsets.h should be auto generated. This patch adds two rules to rules.mk which makes this possible and removes the rules on imx35. Signed-off-by: Matthias Weisser <weisserm@arcor.de> Acked-by: Stefano Babic <sbabic@denx.de>
2011-07-14mx31pdk: cosmetic: Fix line over 80 charactersFabio Estevam
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-13powerpc/mpc8548cds: Remove incorrect DDR_MSYNC_IN erratum defineBecky Bruce
This erratum doesn't exist on this processor, and the workaround spins on a non-existent register, causing boot to hang. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/85xx: Add default usb mode and phy type to hwconfigRamneek Mehresh
Move to use hwconfig for usb mode & phy type instead of magic 'usb_phy_type' environment variable on the following platforms: MPC8536DS, P1020RDB, P1020RDB-PC, P1010RDB, P2020RDB, P2020RDB-PC, P2020RDB, P3041DS, P4080DS, & P5020DS. Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/corenet_ds: add back buffer write for NOR flashYork Sun
Enable buffer write for better performance. This platform uses a NOR flash chip which supports write buffer programming. CFI driver can query the buffer size and use it to program the flash for best performance. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/85xx: remove SERDES4 soft-reset work-aroundTimur Tabi
Some P4080 rev1 errata work-arounds, notably erratum SERDES4, required a bank soft-reset after the bank was configured and enabled, even though enabling a bank causes it to reset. Because the reset was required for multiple errata, it was not properly enclosed in an #ifdef, and so was not removed with all the other rev1 errata work-arounds. Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if bank 2 is enabled, but this was not being done for SERDES protocols 0xF and 0x10. The bank reset also happened to enable bank 3 (apparently an undocumented feature). Simply removing the reset breaks these two protocols. It turns out that every time we call enable_bank(), we do want at least one lane of the bank enabled, either because the bank is supposed to be enabled, or because we need the clock from that bank enabled. For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we call enable_bank(), because that array is used elsewhere to determine if the bank is available. Note that the side effect of these changes is that the work-arounds for these two errata are now linked. Specifically, if SERDES-A001 is enabled, then we need SERDES-8 enabled as well. Because this was the only SERDES bank soft-reset, there is no need to implement a work-around for erratum SERDES-A003. Also fix an off-by-one error in a printf(). Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Ed Swarthout <swarthou@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/mpc8xxx: Allow override DDR read-to-write turnaround timeYork Sun
Add this option to allow boards to override the default read-to-write turnaround time for better performance. Signed-off-by: York Sun <yorksun@freescale.com>
2011-07-11qoriq/p1_p2_rdb: USB device-tree fixups for P1020Ramneek Mehresh
Resolve P1020 second USB controller multiplexing with eLBC - mandatory to mention USB2 in hwconfig string to select it over eLBC, otherwise USB2 node is removed - works only for SPI and SD boot Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/85xx: Specify hwconfig usage for USB controllerRamneek Mehresh
Specify hwconfig usage for USB mode and phy change Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/8xxx: Update USB mode device tree fixupRamneek Mehresh
Modify support for USB mode fixup: - Add common support for USB mode and phy type device tree fix-up for all USB controllers mentioned in hwconfig string - Fetch USB mode and phy type via hwconfig; if not defined in hwconfig, then fetch them from env Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/85xx: Add basic support for P1023RDS boardRoy Zang
The P1023RDS board is the reference board for the P1023 SoC. Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe, UART, I2C, etc. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/mpc85xx: Display a warning for unsupported DDR data ratesYork Sun
If DDR initialziation uses a speed table and the speed is not matched, print a warning message instead of silently ignoring. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/corenet_ds: Fix RCW overriding for RDIMMYork Sun
Allow overriding RCW for all RDIMM, not only quad-rank ones. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/mpc8xxx: fix DDR data width checkingYork Sun
Checking width before setting DDR controller. SPD for DDR1 and DDR2 has data width and primary sdram width. The latter one has different meaning for DDR3. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/mpc8xxx: Adding fallback to raw timing on supported boardsYork Sun
In case of empty SPD or checksum error, fallback to raw timing on supported boards. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/mpc8xxx: Enable calculation for fixed DDR chipsYork Sun
We used to have fixed parameters for soldered DDR chips. This patch introduces CONFIG_SYS_DDR_RAW_TIMING to enable calculation based on timing data from DDR chip datasheet, implemneted in board-specific files or header files. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/85xx: Fix pin muxing for second USB controllerFelix Radensky
On P1022/P1013 second USB controller is muxed with second Ethernet controller. The current code to enable second USB fails to properly clear pinmux bits used by ethernet. As a result, Linux freezes when this controller is used. This patch fixes the problem. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11Adding more SPD registersYork Sun
Adding byte 32 and 33 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11powerpc/mpc8xxx: Add 16-bit support for DDR3York Sun
Add support for 16-bit DDR bus. Also deal with system using 64- and 32-bit DDR devices. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit (git 2.34.1) at 2025-01-13 17:34:40 +0000