summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2013-06-11powerpc: fix 8xx and 82xx type-punning warnings with GCC 4.7Scott Wood
C99's strict aliasing rules are insane to use in low-level code such as a bootloader, but as Wolfgang has rejected -fno-strict-aliasing in the past, add a union so that 16-bit accesses can be performed. Compile-tested only. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Wolfgang Denk <wd@denx.de>
2013-06-10cosmetic: arm: fix comments in arch/arm/lib/crt0.SMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-06-10Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD
2013-06-10arm/km: make local functions staticHolger Brunck
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-06-10arm: da830: moved pinmux configurations to the arch treeVishwanathrao Badarkhe, Manish
Move pinmux configurations for the DA830 SoCs from board file to the arch tree so that it can be used for all da830 based devices. Also, avoids duplicate pinmuxing in case of NAND. Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
2013-06-10ARM: DRA7: Add MaintainerLokesh Vutla
Adding Maintainer for DRA7xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10OMAP5: Enable access to auxclk registersLubomir Popov
auxclk0 and auxclk1 are utilized on some OMAP5 boards. Define the infrastructure needed for accessing them without using magic numbers. Also remove unrelated TPS62361 defines from clocks.h Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
2013-06-10ARM: OMAP: I2C: New read, write and probe functionsLubomir Popov
New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4 (4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older OMAPs and derivatives as well. The only anticipated exception would be the OMAP2420, which shall require driver modification. - Rewritten i2c_read to operate correctly with all types of chips (old function could not read consistent data from some I2C slaves). - Optimised i2c_write. - New i2c_probe, performs write access vs read. The old probe could hang the system under certain conditions (e.g. unconfigured pads). - The read/write/probe functions try to identify unconfigured bus. - Status functions now read irqstatus_raw as per TRM guidelines (except for OMAP243X and OMAP34XX). - Driver now supports up to I2C5 (OMAP5). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Heiko Schocher <hs@denx.de>
2013-06-10arm: Remove OMAP2420H4 and all omap24xx supportTom Rini
The omap2420H4 was the only mainline omap24xx board. Prior to being fixed by Jon Hunter in time for v2013.04 it had been functionally broken for a very long time. Remove this board as there's not been interest in it in U-Boot for quite a long time. Signed-off-by: Tom Rini <trini@ti.com>
2013-06-10da830: add MMC supportVishwanathrao Badarkhe, Manish
Add MMC support for da830 boards in order to perform mmc operations(read,write and erase). Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
2013-06-10ARM: OMAP5: Power: Add more functionality to Palmas driverLubomir Popov
Add some useful functions, and the corresponding definitions. Add support for powering on the dra7xx_evm SD/MMC LDO (courtesy Lokesh Vutla <lokeshvutla@ti.com>). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-06-10ARM: DRA7xx: EMIF: Change settings required for EVM boardSricharan R
DRA7 EVM board has the below configuration. Adding the settings for the same here. 2Gb_1_35V_DDR3L part * 2 on EMIF1 2Gb_1_35V_DDR3L part * 4 on EMIF2 Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: clocks: Update PLL valuesLokesh Vutla
Update PLL values. SYS_CLKSEL value for 20MHz is changed to 2. In other platforms SYS_CLKSEL value 2 represents reserved. But in sys_clk array ind 1 is used for 13Mhz. Since other platforms are not using 13Mhz, reusing index 1 for 20MHz. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com>
2013-06-10ARM: DRA7xx: Update pinmux dataLokesh Vutla
Updating pinmux data as specified in the latest DM Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com>
2013-06-10mmc: omap_hsmmc: Update pbias programmingBalaji T K
Update pbias programming sequence for OMAP5 ES2.0/DRA7 Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: Correct SRAM END addressSricharan R
NON SECURE SRAM is 512KB in DRA7xx devices. So fixing it here. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: Correct the SYS_CLK to 20MHZSricharan R
The sys_clk on the dra evm board is 20MHZ. Changing the configuration for the same. And also moving V_SCLK, V_OSCK defines to arch/clock.h for OMAP4+ boards. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: Change the Debug UART to UART1Sricharan R
Serial UART is connected to UART1. So add the change for the same. Signed-off-by: Sricharan R <r.sricharan@ti.com>
2013-06-10ARM: DRA7xx: Do not enable srcomp for DRA7xx Soc'sLokesh Vutla
Slew rate compensation cells are not present for DRA7xx Soc's. So return from function srcomp_enable() if soc is not OMAP54xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: OMAP5: DRA7xx: support class 0 optimized voltagesNishanth Menon
DRA752 now uses AVS Class 0 voltages which are voltages in efuse. This means that we can now use the optimized voltages which are stored as mV values in efuse and program PMIC accordingly. This allows us to go with higher OPP as needed in the system without the need for implementing complex AVS logic. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: clocks: Fixing i2c_init for PMICLokesh Vutla
In DRA7xx Soc's voltage scaling is done using GPI2C. So i2c_init should happen before scaling. I2C driver uses __udelay which needs timer to be initialized. So moving timer_init just before voltage scaling. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: power Add support for tps659038 PMICLokesh Vutla
TPS659038 is the power IC used in DRA7XX boards. Adding support for this and also adding pmic data for DRA7XX boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: Add control id code for DRA7xxLokesh Vutla
The registers that are used for device identification are changed from OMAP5 to DRA7xx. Using the correct registers for DRA7xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: OMAP4+: pmic: Make generic bus init and write functionsLokesh Vutla
Voltage scaling can be done in two ways: -> Using SR I2C -> Using GP I2C In order to support both, have a function pointer in pmic_data so that we can call as per our requirement. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.hLokesh Vutla
To be consistent with other ARM platforms, renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: OMAP5: clocks: Do not enable sgx clocksSricharan R
SGX clocks should be enabled only for OMAP5 ES1.0. So this can be removed. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: OMAP4+: Cleanup header filesLokesh Vutla
After having the u-boot clean up series, there are many definitions that are unused in header files. Removing all those unused ones. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10OMAP5: Fix bug in omap5_es1_prcm structLubomir Popov
The newly introduced function setup_warmreset_time(), called from within prcm_init(), tries to write to the prm_rsttime OMAP5 register. The struct member holding this register's address is however initialized for OMAP5 ES2.0 only. On ES1.0 devices this uninitialized value causes a second (warm) reset at startup. Add .prm_rsttime address init to the ES1.0 struct. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Tom Rini <trini@ti.com>
2013-06-10OMAP5: add ABB setup for MPU voltage domainAndrii Tseglytskyi
Patch adds a call of abb_setup() function, and proper registers definitions needed for ABB setup sequence. ABB is initialized for MPU voltage domain. Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
2013-06-10OMAP3+: introduce generic ABB supportAndrii Tseglytskyi
Adaptive Body Biasing (ABB) modulates transistor bias voltages dynamically in order to optimize switching speed versus leakage. Adaptive Body-Bias ldos are present for some voltage domains starting with OMAP3630. There are three modes of operation: * Bypass - the default, it just follows the vdd voltage * Foward Body-Bias - applies voltage bias to increase transistor performance at the cost of power. Used to operate safely at high OPPs. * Reverse Body-Bias - applies voltage bias to decrease leakage and save power. Used to save power at lower OPPs. Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
2013-06-10am33xx: Board: Make CPSW section of ethernet initialization depend on CPSW ↵Joel A Fernandes
driver Not doing so breaks cases where CPSW is not required such as for USB RNDIS network boot. Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
2013-06-08MIPS: asm/errno.h: switch to asm-generic/errno.hDaniel Schwierzeck
This fixes several warnings like In file included from ./u-boot/include/linux/mtd/mtd.h:13:0, from env_onenand.c:37: ./u-boot/build/vct_platinumavc_onenand_small/include2/asm/errno.h:52:0: warning: "ENOMSG" redefined [enabled by default] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-06-08MIPS: fix __raw_* IO accessorsGabor Juhos
The purpose of the __raw* IO accessors is to provide IO access in native-endian order. However in the current MIPS implementation, the 16 and 32 bit variants of the __raw accessors are swapping the values on big-endian systems if the CONFIG_SWAP_IO_SPACE option is enabled. The patch changes the IO accessor macros to fix this broken behaviour. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-06-08Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD
Conflicts: drivers/serial/Makefile
2013-06-07pci: introduce CONFIG_PCI_INDIRECT_BRIDGE optionGabor Juhos
The pci_indirect.c file is always compiled when CONFIG_PCI is defined although the indirect PCI bridge support is not needed by every board. Introduce a new CONFIG_PCI_INDIRECT_BRIDGE config option and only compile indirect PCI bridge support if this options is enabled. Also add the new option into the configuration files of the boards which needs that. Compile tested for powerpc, x86, arm and nds32. MAKEALL results: powerpc: --------------------- SUMMARY ---------------------------- Boards compiled: 641 Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB ) ---------------------------------------------------------- Note: the warnings for ELPPC and MPC8323ERDB are present even without the actual patch. x86: --------------------- SUMMARY ---------------------------- Boards compiled: 1 ---------------------------------------------------------- arm: --------------------- SUMMARY ---------------------------- Boards compiled: 311 ---------------------------------------------------------- nds32: --------------------- SUMMARY ---------------------------- Boards compiled: 3 ---------------------------------------------------------- Cc: Tom Rini <trini@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
2013-06-07fdt: remove unaligned access in fdt_fixup_ethernet()Stephen Warren
Some ARM compilers may emit code that makes unaligned accesses when faced with constructs such as: char mac[16] = "ethaddr"; Replace this with a strcpy() call instead to avoid this. strcpy() is used here, rather than replacing all usage of the mac variable with the string itself, since the loop itself sprintf()s to the variable each iteration, so strcpy() is doing basically the same thing. Reported-by: Florian Meier Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-06-07generic_board: reduce the redundancy of gd_t struct membersMasahiro Yamada
This commit refactors common/board_f.c and common/board_r.c in order to delete the dest_addr and dest_addr_sp from gd_t struct. As mentioned as follows in include/asm-generic/global_data.h, /* TODO: is this the same as relocaddr, or something else? */ unsigned long dest_addr; /* Post-relocation address of U-Boot */ dest_addr is the same as relocaddr. Likewise, dest_addr_sp is the same as start_addr_sp. It seemed dest_addr/dest_addr_sp was used only as a scratch variable to calculate relocaddr/start_addr_sp, respectively. With a little refactoring, we can delete dest_addr and dest_addr_sp. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org>
2013-06-07am335x: enable falcon boot mode for mmc (raw and fat) and nandPeter Korsgaard
Jump into full u-boot mode if a 'c' character is received on the uart. We need to adjust the spl bss/malloc area to not overlap with the loadaddr of the kernel (sdram + 32k), so move it past u-boot instead. For raw mmc, we store the kernel parameter area in the free space after the MBR (if used). For nand, we use the last sector of the partition reserved for u-boot. This also enables the spl command in the full u-boot so the kernel parameter area snapshot can be created. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2013-06-07spl_mmc: add Falcon mode support for raw variantPeter Korsgaard
If Falcon mode support is enabled (and the system isn't directed into booting u-boot), it will instead try to load kernel from sector CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR and CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS of kernel argument parameters starting from sector CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2013-06-07spl_mmc: mmc_load_image_raw(): Add sector argumentPeter Korsgaard
So we can use it for falcon mode as well. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2013-06-07spl_mmc: add Falcon mode support for FAT variantPeter Korsgaard
If Falcon mode support is enabled (and the system isn't directed into booting u-boot), it will instead try to load kernel from CONFIG_SPL_FAT_LOAD_KERNEL_NAME file and kernel argument parameters from CONFIG_SPL_FAT_LOAD_ARGS_NAME, both from the same partition as u-boot. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2013-06-07devkit8000: Add SPL_OS for MMC supportTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-06-07spl_mmc: mmc_load_image_fat(): Add filename argument and move fat init outPeter Korsgaard
So we can use it for falcon mode as well. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2013-06-07spl_mmc: return error from mmc_load_image_{raw, fat} rather than hangingPeter Korsgaard
So we can instead fallback to doing something else on errors. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2013-06-07Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2013-06-07Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini
2013-06-06ARM: tegra: only enable SCU on Tegra20Tom Warren
The non-SPL build of U-Boot on Tegra only runs on a single CPU, and hence there is no need to enable the SCU when running U-Boot. If an SMP OS is booted, and it needs the SCU enabled, it will enable the SCU itself. U-Boot doing so is redundant. The one exception is Tegra20, where an enabled SCU is required for some aspects of PCIe to work correctly. Some Tegra SoCs contain CPUs without a software-controlled SCU. In this case, attempting to turn it on actively causes problems. This is the case for Tegra114. For example, when running Linux, the first (or at least some very early) user-space process will trigger the following kernel message: Unhandled fault: imprecise external abort (0x406) at 0x00000000 This is typically accompanied by that process receving a fatal signal, and exiting. Since this process is usually pid 1, this causes total system boot failure. Signed-off-by: Tom Warren <twarren@nvidia.com> [swarren, fleshed out description, ported to upstream chipid APIs] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-06-06vf610twr: Drop unneeded 'status' variableFabio Estevam
No need to use the 'status' variable, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
2013-06-06input: Finish simplifing key_matrix_decode_fdt()Stephen Warren
[trini: Applied v1 of the series rather than v2, this commit is the delta from v1 to v2] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Rini <trini@ti.com>
2013-06-06ARM: imx: Fix incorrect usage of CONFIG_SYS_MMC_ENV_PARTFabio Estevam
When running the "save" command several times on a mx6qsabresd we see: U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed This issue is caused by the incorrect usage of CONFIG_SYS_MMC_ENV_PART. CONFIG_SYS_MMC_ENV_PART should be used to specify the mmc partition that stores the environment variables. On some imx boards it is been incorrectly used to pass the partition of kernel and dtb files for the 'mmcpart' script variable. Remove the CONFIG_SYS_MMC_ENV_PART usage and configure the 'mmcpart' variable directly. Reported-by: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>