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The common code can be excluded to be reused by tests for other PMIC.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This MC34708 PMIC is somewhat special - it used single transfers (R/W) with
3 bytes size - up till now U-Boot's PMICs only used 1 byte.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This commit also provides the default values of the emulated MC34708 PMIC
internal registers content.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This change enables support for MC34708 PMIC in sandbox. Now we can
emulate the I2C transfers larger than 1 byte.
Notable changes for this driver:
- From now on the register number is not equal to index in the buffer,
which emulates the PMIC registers
- The PMIC register's pool is now dynamically allocated up till
64 regs * 3 bytes each = 192 B
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Up till now it was only possible to use 'pmic' command with a single byte
transmission.
The pmic_read|write functions has been replaced with ones, which don't need
the transmission length as a parameter.
Due to that it is possible now to read data from PMICs transmitting more
data than 1 byte at once (e.g. mc34708)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This patch adds support for MC34708 PMIC, to be used with driver model
(DM).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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transmissions
This commit provides support for transmissions larger than 1 byte for
PMIC devices used with DM (e.g. MC34708 from NXP).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The struct uc_pmic_priv's trans_len field stores the number of types to
be transmitted per PMIC transfer.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This patch adds definition of the number of bytes sent at once by the
MC34708 PMIC.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This commit adds some more defines for MC34708 PMIC.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Enable Secure boot(HAB) for BTicino Mamoj board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Add Falcon mode support to boot Linux directly after SPL.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Add DFU support for BTicino Mamoj board and update
the same steps in README.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
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Enable fastboot and ums for host to interact eMMC on
Mamoj board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
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MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support
for it through DM_PMIC dt definition.
pmic log:
Reviewed-by: Stefano Babic <sbabic@denx.de>
========
=> pmic list
| Name | Parent name | Parent uclass @ seq
| pfuze100@08 | i2c@021f8000 | i2c @ 3
=> pmic dev pfuze100@08
dev: 0 @ pfuze100@08
=> pmic dump
Dump pmic: pfuze100@08 registers
0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81
0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00
0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b
0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08
0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10
0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
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i.MX6DL Mamoj has i2c3 and i2c4 buses, add support
through DM_I2C with dt definition.
i2c log:
Reviewed-by: Stefano Babic <sbabic@denx.de>
=======
=> i2c bus
Bus 2: i2c@021a8000
Bus 3: i2c@021f8000
=> i2c dev 2
Setting bus to 2
=> i2c speed 400000
Setting bus speed to 400000 Hz
=> i2c probe
Valid chip addresses: 20 51 53
=> i2c md 53 0xff
00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
=> i2c md 51 0xff
00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53 ..@P.CFRB......S
=> i2c dev 3
Setting bus to 3
=> i2c speed 100000
Setting bus speed to 100000 Hz
=> i2c probe
Valid chip addresses: 08 40 48 4B
=> i2c md 08 0xff
00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
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Add initial support for i.MX6DL BTicino Mamoj board.
Mamoh board added:
- SPL
- SPL_DM
- SPL_OF_CONTROL
- DM for U-Boot proper
- OF_CONTROL for U-Boot proper
- eMMC
- FEC
- Boot from eMMC
- Boot from USB SDP
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Build dtb's based on SOC type instead building arch type.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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u-boot,dm-spl property is specific to U-Boot, so move it into
*u-boot.dtsi files for relevant i.MX6UL files.
This make syncing Linux dts files straight forward.
Also update the MAINTAINERS file for dts files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Move usdhc2 node along with pinctrl to imx6ul-isiot.dts
from imx6ul-isiot-emmc.dts
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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u-boot,dm-spl property is specific to U-Boot, so move it into
*u-boot.dtsi files for relevant i.MX6QDL files.
This make syncing Linux dts files straight forward.
Also update the MAINTAINERS file for dts files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Boot tested with boot.scr script and EFI/Grub2 on mmc0 and mmc1 slots on sabrelite board.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Gary Bisson <gary.bisson@boundarydevices.com>
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Boot tested on sabrelite board.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Gary Bisson <gary.bisson@boundarydevices.com>
Tested-by: Denis Pynkin <denis.pynkin@collabora.com>
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The SION pin must be set for proper operation of I2C when DM is enabled.
When legacy I2C is used, this bit is set implicitly in the u-boot code:
arch/arm/include/asm/arch-mx5/iomux-mx53.h:92:
MX53_PAD_KEY_ROW3__I2C2_SDA = IOMUX_PAD(0x368, 0x040, 4 |
IOMUX_CONFIG_SION, 0x820, 0, NO_PAD_CTRL),
The Linux kernel uses similar approach with:
arch/arm/boot/dts/imx53-tqma53.dtsi:182:
MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
After applying this patch it is possible to have the I2C working with DM
on imx53 devices:
MX53_PAD_KEY_ROW3__I2C2_SDA (0x1ee | IMX_PAD_SION)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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Those DTS nodes has been ported from Linux kernel (v4.16)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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CONFIG_ENV_IS_IN_MMC must be declared in defconfig to properly
support "env save".
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
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The mx6_common.h file already defines BOUNCE_BUFFER so no need to
definit it again in specific configs.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
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It makes sense to select the MP multi processor option at the same time we
select the other SMP options needed for SMP capable i.MX6 SoCs.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
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Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
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Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
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Also remove the #ifdef's from clock.h since the Kconfig values defaults
the to old default values in clock.h.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Move CONFIG_MX31 from mx31pdk.h to mx31pdk_defconfig and introduce
necessary Kconfig changes as well.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This replaces TARGET_GE_B{4,6,8}50V3 with common TARGET_GE_BX50V3.
The boards are identified automatically at runtime.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
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Configure video arguments at run-time instead of at compile-time.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
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B{46}50v3s have an internal LCD that needs to be configured,
in comparison with B850v3 which has only external displays.
Use VPD instead of `CONFIG_TARGET_GE_B{4,6,8}50V3' compile-time
checks to correct initialize video based on the monitor type.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
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Move the VPD reading earlier in order to establish the monitor
type as soon as possible.
The configuration of the specific environment variables needs to be
done later after the environment is configured.
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
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Enable Video PLL to fix non-working display support for Bx50v3
internal displays.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
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Simplify process_vpd() by unifying the switch statements handling
product specific configurations.
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
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The detect_baseboard() function actually determines whether there is an
internal LCD panel or not. Rename for clarity.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
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Add winbond SPI NOR support, which is being used by newer hardware.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
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This was unintentionally disabled when moving MVGBE to Kconfig.
Fixes: commit ed52ea507f12 ("net: add Kconfig for MVGBE")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
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Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
To address that situation we discussed on the list moving to
genetic_set_bit() instead.
Doing a quick grep for similar situations in drivers/usb shows that the
composite device is using __set_bit().
This patch switches over to generic_set_bit to maintain consistency between
the two gadget drivers.
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
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Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
Looking at the provenance of the current u-boot code and the git change
history in the kernel, it looks like we have a local copy of set_bit and
clear_bit as a hold-over from porting the Linux driver into u-boot.
These days __set_bit and __clear_bit are optionally provided by an arch and
can be used as inputs to generic_bit_set and generic_bit_clear.
This patch switches over to generic_set_bit and generic_clear_bit to
accommodate.
Tested on i.MX WaRP7 and Intel Edison
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
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nds2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
nds32 bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Macpaul Lin <macpaul@andestech.com>
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nds32 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
This patch defines PLATFORM__SET_BIT which means that __set_bit() in nds32
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Macpaul Lin <macpaul@andestech.com>
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nios2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
nios2 bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Thomas Chou <thomas@wytron.com.tw>
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nios2 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
This patch defines PLATFORM__SET_BIT which means that __set_bit() in nios2
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Thomas Chou <thomas@wytron.com.tw>
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riscv bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
riscv bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <green.hu@gmail.com>
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riscv bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <green.hu@gmail.com>
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x86 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
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