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2015-03-17board/BuR/common: use SYS_CONSOLE_OVERWRITEHannes Petermaier
We don't want that CONSOLE is redirected to LCD upon init, we rather prefer that console is still on the serial line. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-03-17mmc: fsl_esdhc fix register offsetPeng Fan
Commit f022d36e8a4517b2a9d25ff2d75bd2459d0c68b1 introduces error register offset. Change the "char reserved3[59]" to "char reserved3[56]". Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-03-17odroid: defconfig: fix build break caused by missing dtsPrzemyslaw Marczak
The build break was caused by one of my previous commit: 'odroid: defconfig: disable memset at malloc init' It removes the dts from odroid defconfig - rebase mistake. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2015-03-16board/BuR/common: fix compiler warningHannes Petermaier
Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com> Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-03-15Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini
2015-03-15kconfig: remove meaningless prefixes in defconfig filesMasahiro Yamada
Since commit e02ee2548afe (kconfig: switch to single .config configuration), the prefixes in defconfig files such as "+S:", "+ST:", etc., are meaningless. This commit was generated by the following command: find configs -name '*_defconfig' | xargs sed -i 's/^+*S*T*://' Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-15MAKEALL: Don't try to print size when ./u-boot is deletedJoe Hershberger
In the case of BUILD_NBUILDS > 1, MAKEALL would try to print the size immediately after the u-boot binary is deleted by the call to: make -s clean Move the size print to before the clean Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2015-03-15ARM: UniPhier: adjust device trees for business transferMasahiro Yamada
Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-15git-mailrc: update Masahiro's email addressMasahiro Yamada
I have transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-15MAINTAINERS: update Masahiro's email addressMasahiro Yamada
I have transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-13README: remove description about driver model configuration options (again)Masahiro Yamada
The Driver Model description in README was removed by commit 65eb659e56fa (README: remove description about driver model configuration options), and was revived by mistake by commit b79dadf846e5 when resolving the conflict. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-03-13config_distro_bootcmd.h: add note on error handlingStephen Warren
This should make it more clear why there appear to be C pre-processor symbols in the file that contain mixed case. They're really error messages. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-03-13beagle_x15: increase phy autoneg timeoutSekhar Nori
When Beagle X15 is connected to Gigabit switch, it takes more time to finish auto-negotiation than on a 10/100 switch. The default 4 second limit times-out more often than not. This is observed when testing with a D-Link DGS-1008A desktop switch. Increase the auto-negotiation time-out for Beagle-X15 to handle this case. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: OMAP3: rx51: Enable workaround for ARM errata 454179, 430973, 621766Nishanth Menon
RX51 has a secure logic which uses different parameters compared to traditional implementation. So, make the generic secure acr write over-ride-able by board file and refactor rx51 code to use this. While at it, enable the OMAP3 specific errata code for 454179, 430973, 621766. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: OMAP3: Enable workaround for ARM errata 454179, 430973, 621766Nishanth Menon
Enable the OMAP3 specific errata code for 454179, 430973, 621766 and while at it, remove legacy non-revision checked errata logic. Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: OMAP5 / DRA7: Setup L2 Aux Control Register with recommended configurationNishanth Menon
Update to existing recommendation for L2ACTLR configuration to prevent system instability and optimize performance. These apply to both OMAP5 and DRA7. Reported-by: Vivek Chengalvala <vchengalvala@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: DRA7 / OMAP5: Add workaround for ARM errata 798870Praveen Rao
This patch enables the workaround for ARM errata 798870 for OMAP5 / DRA7 which says "If back-to-back speculative cache line fills (fill A and fill B) are issued from the L1 data cache of a CPU to the L2 cache, the second request (fill B) is then cancelled, and the second request would have detected a hazard against a recent write or eviction (write B) to the same cache line as fill B then the L2 logic might deadlock." An l2auxctlr accessor implementation for OMAP5 and DRA7 is introduced here as well. Signed-off-by: Praveen Rao <prao@ti.com> Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: OMAP3: Get rid of omap3_gp_romcode_call and replace with omap_smc1Nishanth Menon
omap_smc1 is now generic enough to remove duplicate omap3_gp_romcode_call logic that omap3 introduced. As part of this change, move to using the generic lowlevel_init.S for omap3 as well. Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: OMAP3: Rename omap3.h to omap.h to be generic as all SoCsNishanth Menon
This is in preperation of using generic cross OMAP code. Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: OMAP: Change set_pl310_ctrl_reg to be genericNishanth Menon
set_pl310_ctrl_reg does use the Secure Monitor Call (SMC) to setup PL310 control register, however, that is something that is generic enough to be used for OMAP5 generation of processors as well. The only difference being the service being invoked for the function. So, convert the service to a macro and use a generic name (same as that used in Linux for some consistency). While at that, also add a data barrier which is necessary as per recommendation. While at this, smc #0 is maintained as handcoded assembly thanks to various gcc version eccentricities, discussion thread: http://marc.info/?t=142542166800001&r=1&w=2 Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: Introduce erratum workaround for 621766Nishanth Menon
621766: Under a specific set of conditions, executing a sequence of NEON or vfp load instructions can cause processor deadlock Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set L1NEON to 1 Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: Introduce erratum workaround for 430973Nishanth Menon
430973: Stale prediction on replaced inter working branch causes Cortex-A8 to execute in the wrong ARM/Thumb state Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set IBE to 1 Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: Introduce erratum workaround for 454179Nishanth Menon
454179: Stale prediction may inhibit target address misprediction on next predicted taken branch Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set IBE and disable branch size mispredict to 1 Also provide a hook for SoC specific handling to take place if needed. Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: Introduce erratum workaround for 798870Nishanth Menon
Add workaround for Cortex-A15 ARM erratum 798870 which says "If back-to-back speculative cache line fills (fill A and fill B) are issued from the L1 data cache of a CPU to the L2 cache, the second request (fill B) is then cancelled, and the second request would have detected a hazard against a recent write or eviction (write B) to the same cache line as fill B then the L2 logic might deadlock." Implementations for SoC families such as Exynos, OMAP5/DRA7 etc will be widely different. Every SoC has slightly different manner of setting up access to L2ACLR and similar registers since the Secure Monitor handling of Secure Monitor Call(smc) is diverse. Hence an weak function is introduced which may be overriden to implement SoC specific accessor implementation. Based on ARM errata Document revision 18.0 (22 Nov 2013) Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13am335x_evm_usbspl: Remove other SPL modesTom Rini
The purpose of this build target is to do SPL over USB RNDIS. We remove YMODEM, MMC and NAND (and re-set ENV to be built-in) as when those are needed we can use the other build targets. This brings us well under size limit again. Signed-off-by: Tom Rini <trini@konsulko.com>
2015-03-10Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini
Conflicts: README Signed-off-by: Tom Rini <trini@konsulko.com>
2015-03-10sunxi: video: Fix VIDEO_LCD_PANEL_I2C being enabled by defaultHans de Goede
Fix a typo in board/sunxi/Kconfig which caused VIDEO_LCD_PANEL_I2C to be enabled on all sunxi boards. Also fix a compile error which shows up once VIDEO_LCD_PANEL_I2C is actually disabled on most boards as it should be. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-03-10sunxi: Add Wexler TAB7200 supportAleksei Mamlin
This patch add support for Wexler TAB7200 tablet. The Wexler TAB7200 is a A20 based tablet with 7 inch display(800x480), capacitive touchscreen(5 fingers), 1G RAM, 4G NAND, micro SD card slot, mini HDMI port, 3.5mm audio plug, 1 USB OTG port and 1 USB 2.0 port. Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-10sunxi: Ippo_q8h defconfigs: Enable otg vbus detection using AXP223 PMICChen-Yu Tsai
Use the AXP223 PMIC to detect VBUS for musb otg support. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-10sunxi: musb: Support checking VBUS using AXP221 PMICChen-Yu Tsai
This enables the musb glue layer to use the AXP221's VBUS detection function to check for VBUS. This fixes otg support on the A23 q8h tablets. Note that u-boot never calls musb_shutdown(), so once VBUS is enabled, it is never disabled until the system is powered off, or the OS does so. This can be used to our advantage to keep VBUS powered into the OS, where support for AXP221 is not available yet. Fixes: 52defe8f6570 ("sunxi: musb: Check Vbus-det before enabling otg port power") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-10sunxi: axp221: Add VBUS detection supportChen-Yu Tsai
Some of the AXP PMICs support VBUS detection, i.e. checking whether VBUS power input is available and usable (supplied by an external source). A few boards use this instead of a separate GPIO to detect VBUS on USB OTG. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-10sun7i: Add support for the Orange Pi Mini boardHans de Goede
The Orange Pi Mini is an A20 based development board featuring 1G RAM, HDMI, 1Gbit ethernet, USB wifi, SATA, 2 sdcard slots (use the top one for booting), 2 USB 2.0 A receptacles, a micro USB B receptacle (otg) and a 3 ring 3.5 mm jack connector for A/V. Also see: http://www.orangepi.org/ Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-03-10sun7i: Add support for the Orange Pi boardHans de Goede
The Orange Pi is an A20 based development board featuring 1G RAM, HDMI & VGA, 1Gbit ethernet, USB wifi, SATA, 4 USB 2.0 A receptacles, a micro USB B receptacle (otg) and a 3 ring 3.5 mm jack connector for A/V. Also see: http://www.orangepi.org/ Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-03-10sun7i: Add support for the Wits Pro A20 DKT boardHans de Goede
The Wits Pro A20 DKT is an A20 Development KiT with 1G RAM, 4G NAND, sdio wifi, 1Gbit ethernet, 1024x768 lcd screen with ft5x_ts touchscreen and a ton of IO connectors. Note there seem to be multiple sdcard slots on the board (4 in total), but other then mmc0 none of these are hooked up by default, there is a ton of dip-switches which likely allow hooking some of these up, but the documentation of the board only describes the use of a fraction of them, so for now we only support mmc0. Also see: http://www.merrii.com/en/pla_d.asp?id=163 Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-03-10sunxi: Add support for the Forfun Q88DB tabletJens Lucius
The Forfun Q88DB is an A13 tablet in the common Q8 format. Features are 512MB RAM, 4GB NAND, 7" Display, RTL8188 Wifi, 2 cameras. For more details see: http://linux-sunxi.org/Forfun_Q88DB Signed-off-by: Jens Lucius <info@jenslucius.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
2015-03-10sun6i: Add support for the Mele I7 boardMarcus Cooper
The Mele I7 is a Allwinner based Android TV box. It features a A31 SOC, 1G RAM, 8GB NAND, HDMI out, A/V out, SPDIF, IrDA, 3 USB A, 1 USB micro OTG and Wireless LAN. Signed-off-by: Marcus Cooper <codekipper@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-10sun7i: Add support for the MK808C boardMarcus Cooper
The MK808C is a Allwinner based Android TV dongle. It features a A20 SOC, 1G RAM, 8GB NAND, HDMI out, A/V out, 1 USB A, 1 USB mini OTG, Bluetooth and Wireless LAN. Signed-off-by: Marcus Cooper <codekipper@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-10sunxi: Add support for the Jesurun Q5 boardGábor Nyers
The Jesurun Q5 has a black plastic casing with the approximate dimensions of 100mm x 100mm x 24mm with rounded edges. In terms of hardware it features an Allwinner A10 SoC with 1GB RAM and 8GB of NAND flash. The storage capacity can be extended up to 32GB with a MicroSD card. The external connectors are: 2x USB-A female supporting USB2.0, 3.5mm female jack for audio, HDMI female, SPDIF, RJ45 LAN and Power. In addition the device has 1x red LED (hard wired to power) and an programmable green led. On the board there is also an unpopulated IR receiver and the UART. The devices is equipped with an AXP209 PMU. For more details see: http://linux-sunxi.org/Jesurun_Q5 Signed-off-by: Gábor Nyers <gnyers@opensuse.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-10sunxi: Make CONFIG_DRAM_TPR3 apply to sun[57]iAdam Sampson
The tpr3 (timing skew) parameter is used in all supported versions of the sunxi DRAM controller, but it was only enabled for sun4i in 47e3501a76894f4ba08bc61f33774bd5d39ff464. Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-09common: cmd_elf: Add support to disable start of applicationSiva Durga Prasad Paladugu
Added support to disable the start of application by using a environment variable autostart Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-03-09armv8/vexpress64: make multientry conditionalLinus Walleij
While the Freescale ARMv8 board LS2085A will enter U-Boot both on a master and a secondary (slave) CPU, this is not the common behaviour on ARMv8 platforms. The norm is that U-Boot is entered from the master CPU only, while the other CPUs are kept in WFI (wait for interrupt) state. The code determining which CPU we are running on is using the MPIDR register, but the definition of that register varies with platform to some extent, and handling multi-cluster platforms (such as the Juno) will become cumbersome. It is better to only enable the multiple entry code on machines that actually need it and disable it by default. Make the single entry default and add a special ARMV8_MULTIENTRY KConfig option to be used by the platforms that need multientry and set it for the LS2085A. Delete all use of the CPU_RELEASE_ADDR from the Vexpress64 boards as it is just totally unused and misleading, and make it conditional in the generic start.S code. This makes the Juno platform start U-Boot properly. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-09common/board_r: Restore non-cached memory setupJan Kiszka
This fixes a regression of e310b93ec1, affecting Ethernet on the Jetson TK1, e.g. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2015-03-09ARM: PSCI: Rework the DT handler slightlyTom Rini
The way the PSCI DT update happens currently means we pull in <asm/armv7.h> everywhere, including on ARMv8 and that in turn brings in <asm/io.h> for some non-PSCI related things that header needs to deal with. To fix this, we rework the hook slightly. A good portion of arch/arm/cpu/armv7/virt-dt.c is common looking and I hope that when PSCI is needed on ARMv8 we can re-use this by and large. So rename the current hook to psci_update_dt(), move the prototype to <asm/psci.h> and add an #ifdef that will make re-use later easier. Reported-by: York Sun <yorksun@freescale.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: York Sun <yorksun@freescale.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: York Sun <yorksun@freescale.com>
2015-03-09tegra-common: increase malloc pool len by dfu mmc file buffer sizePrzemyslaw Marczak
The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Tom Warren <twarren.nvidia@gmail.com>
2015-03-09ti-armv7-common: increase malloc pool len by dfu mmc file buffer sizePrzemyslaw Marczak
The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Tom Rini <trini@konsulko.com>
2015-03-09zynq-common: increase malloc pool len by dfu mmc file buffer sizePrzemyslaw Marczak
The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Michal Simek <michal.simek@xilinx.com>
2015-03-09odroid-xu3: defconfig: disable memset at malloc initPrzemyslaw Marczak
Reduce the boot time of Odroid XU3 by disabling the memset at malloc init. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-03-09odroid: defconfig: disable memset at malloc initPrzemyslaw Marczak
Reduce the boot time of Odroid X2/U3 by disabling the memset at malloc init. This was tested on Odroid X2. A quick test with checking gpio pin state using the oscilloscope. Boot time from start to bootcmd (change gpio state by memory write command): - ~228ms - before this change (arch memset enabled for .bss clear) - ~100ms - after this change Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-03-09trats2: defconfig: disable memset at malloc initPrzemyslaw Marczak
Reduce the boot time of Trats2 by disabling the memset at malloc init. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~464ms - before this change (arch memset enabled for .bss clear) - ~341ms - after this change Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-03-09dlmalloc: do memset in malloc init as new default configPrzemyslaw Marczak
This commit introduces new config: CONFIG_SYS_MALLOC_CLEAR_ON_INIT. This config is an expert option and is enabled by default. The all amount of memory reserved for the malloc, is by default set to zero in mem_malloc_init(). When the malloc reserved memory exceeds few MiB, then the boot process can slow down. So disabling this config, is an expert option to reduce the boot time, and can be disabled by Kconfig. Note: After disable this option, only calloc() will return the pointer to the zeroed memory area. Previously, without this option, the memory pointed to untouched malloc memory region, was filled with zeros. So it means, that code with malloc() calls should be reexamined. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>