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2012-07-18Merge branch 'master' of git://git.denx.de/u-boot-niosWolfgang Denk
* 'master' of git://git.denx.de/u-boot-nios: nios2: move gd and bd into BSS Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-16nios2: move gd and bd into BSSThomas Chou
As suggested by Graeme Russ, move gd and bd data structrures to BSS instead of calculating the locations around the stack and heap. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Mike Frysinger <vapier@gentoo.org>
2012-07-13FSL/eSDHC: enable the clock to detect the SD cardJerry Huang
For FSL low-end processors (VVN2.2), in order to detect the SD card, we should enable PEREN, HCKEN and IPGEN to enable the clock. Otherwise, after booting the u-boot, and then inserting the SD card, the SD card can't be detected. For SDHC VVN2.3 IP, these bits are reserved, and SDCLKEN is used. And when accessing to these reserved bit, no any impact happened. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Andy Fleming <afleming@gmail.com> CC: Marek Vasut <marex@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-13SD/MMC: check the card status during erase operationJerry Huang
Use the function 'mmc_send_status' to check the card status. only when the card is ready, driver can send the next erase command to the card, otherwise, the erase will failed: => mmc erase 0 1 MMC erase: dev # 0, block # 0, count 1 ... 1 blocks erase: OK => mmc erase 0 2 MMC erase: dev # 0, block # 0, count 2 ... mmc erase failed 1 blocks erase: ERROR => mmc erase 0 4 MMC erase: dev # 0, block # 0, count 4 ... mmc erase failed 1 blocks erase: ERROR Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Andy Fleming <afleming@gmail.com> CC: Marek Vasut <marex@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-13mmc:fix Call mmc_init() when executing mmc_get_dev()Łukasz Majewski
This code adds call to mmc_init(), for partition related commands (e.g. fatls, fatinfo etc.). It is safe to call mmc_init() multiple times since mmc->has_init flag prevents from multiple initialization. The FAT related code calls get_dev high level method and then uses elements from mmc->block_dev, which is uninitialized until the mmc_init (and thereof mmc_startup) is called. This problem appears on boards, which don't use mmc as the default place for envs Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-13mmc: remove the hard setting for tran_speedJaehoon Chung
mmc_set_clock is set to the hard-coding. But i think good that use the tran_speed value. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-13i.MX: fsl_esdhc: allow use with cache enabled.Eric Nelson
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-12net: nfs: make NFS_TIMEOUT configurableTetsuyuki Kobayashi
NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs to adjust. This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in a board specific config file. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-07-12Merge branch 'next' of git://git.denx.de/u-boot-net into nextWolfgang Denk
* 'next' of git://git.denx.de/u-boot-net: net: Inline the new eth_setenv_enetaddr_by_index function net: allow setting env enetaddr from net device setting net/designware: Consecutive writes to the same register to be avoided CACHE: net: asix: Fix asix driver to work with data cache on net: phy: micrel: make ksz9021 phy accessible net: abort network initialization if the PHY driver fails phylib: phy_startup() should return an error code on failure net: tftp: fix type of block arg to store_block Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-12Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk
* 'master' of git://git.denx.de/u-boot-i2c: mx28evk: Add I2C support mxs-i2c: Fix internal address byte order mxc_i2c: remove setting speed at each start mx6qsabrelite: add i2c support mxc_i2c: specify i2c base address in config file Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-11net: Inline the new eth_setenv_enetaddr_by_index functionJoe Hershberger
This function is currently only used in one case. Inline for now. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-07-11net: allow setting env enetaddr from net device settingRob Herring
If the net driver has setup a valid ethernet address and an ethernet address is not set in the environment already, then set the environment variables from the net driver setting. This enables pxe booting on boards which don't set ethaddr env variable. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2012-07-11net/designware: Consecutive writes to the same register to be avoidedDinh Nguyen
This commit is an add-on to f6c4191f. There are a few registers where consecutive writes to the same location should be avoided or have a delay. According to Synopsys, here is a list of the registers and bit(s) where consecutive writes should be avoided or a delay is required: DMA Registers: Register 0 Bit 7 Register 6 All bits except for 24, 16-13, 2-1. GMAC Registers: Registers 0-3 All bits Registers 6-7 All bits Register 10 All bits Register 11 All bits except for 5-6. Registers 16-47 All bits Register 48 All bits except for 18-16, 14. Register 448 Bit 4. Register 459 Bits 0-3. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Matthew Gerlach <mgerlach@altera.com> Acked-by: Amit Virdi <amit.virdi@st.com>
2012-07-11CACHE: net: asix: Fix asix driver to work with data cache onMarek Vasut
The asix driver did not align buffers, therefore it didn't work with data cache enabled. Fix this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
2012-07-11net: phy: micrel: make ksz9021 phy accessibleTroy Kisky
Micrel accidentally used the same part number for the KS8721 and KSZ9021. So, both cannot be in the same build of u-boot. Add a config option to handle this. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com>
2012-07-11net: abort network initialization if the PHY driver failsTimur Tabi
Now that phy_startup() can return an actual error code, check for that error code and abort network initialization if the PHY fails. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Nobuhiro Iwamamatsu <nobuhiro.iwamatsu.yj@renesas.com> (sh_eth part) Acked-by: Stephan Linz <linz@li-pro.net> (Xilinx part, xilinx_axi_emac and xilinx_ll_temac) Reviewed-by: Marek Vasut <marex@denx.de> (FEC part)
2012-07-11phylib: phy_startup() should return an error code on failureTimur Tabi
phy_startup() calls the PHY driver's startup function, but it ignores the return code from that function, and so it never returns any failures. Signed-off-by: Timur Tabi <timur@freescale.com>
2012-07-11net: tftp: fix type of block arg to store_blockJayachandran Chandrasekharan Nair
The block argument for store_block can be -1 when the tftp sequence number rolls over (i.e TftpBlock == 0), so the first argument to store_block has to be of type 'int' instead of 'unsigned'. In our environment (gcc 4.4.5 mips toolchain), this causes incorrect 'offset' to be generated for storing the block, and the tftp block with number 0 will be written elsewhere, resulting in a bad block in the downloaded file and a memory corruption. Signed-off-by: Jayachandran Chandrasekharan Nair <jayachandranc@netlogicmicro.com>
2012-07-11mx28evk: Add I2C supportFabio Estevam
Add I2C support. Tested by placing a 24LC16 EEPROM into the U50 slot which comes empty from factory. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
2012-07-11mxs-i2c: Fix internal address byte orderTorsten Fleischer
Large EEPROMs, e.g. 24lc32, need 2 byte to address the internal memory. These devices require that the high byte of the internal address has to be written first. The mxs_i2c driver currently writes the address' low byte first. The following patch fixes the byte order of the internal address that should be written to the I2C device. Signed-off-by: Torsten Fleischer <to-fleischer@t-online.de> CC: Marek Vasut <marex@denx.de> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11mxc_i2c: remove setting speed at each startTroy Kisky
Other then being very weird, this code was also wrong. For example, say I set speed to 100K. I'll read back the speed as 85937. But the speed is really 85937.5, so we I reset the speed to 85937, I'll get 73660.7. After a couple of transactions my speed is now exactly 68750 so it will remain there. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11mx6qsabrelite: add i2c supportTroy Kisky
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11mxc_i2c: specify i2c base address in config fileTroy Kisky
The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-10net: fix typo in arp clean upMike Frysinger
The clean up patch missed an &, so we end up passing an int rather than a pointer to the sprintf function. arp.c: In function 'ArpReceive': arp.c:197: warning: format '%p' expects type 'void *', but argument 3 has type 'int' Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-07-10net/sh-ether: Fix build by removing ECSIPR_BRCRXIP and otherNobuhiro Iwamatsu
When support sh7734 of sh-ether, ECSIPR_BRCRXIP and other were removed. Therefore SH7757 and SH7724 can not build. This revise this probelem. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
2012-07-10microblaze: intc: Clear interrupt codeMichal Simek
Clear and prepare for device-tree driven configuration. Remove CONFIG_SYS_INTC_0 definition Use dynamic allocation instead of static. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Simon Glass <sjg@chromium.org>
2012-07-10microblaze: Call serial multi initializationMichal Simek
Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Simon Glass <sjg@chromium.org>
2012-07-10microblaze: Move __udelay implementationMichal Simek
Move __udelay to the timer code because of unification. And clean coding style because of checkpatch.pl. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Simon Glass <sjg@chromium.org>
2012-07-10microblaze: Remove extern from board.cMichal Simek
eth_init() is defined at include/net.h. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Simon Glass <sjg@chromium.org>
2012-07-10ipu_common: Add ldb_clk for use in parenting the pixel clockEric Nelson
Add ldb_clk for use in parenting the pixel clock. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10ipu_common: Do not hardcode the ipu_clk frequencyFabio Estevam
Do not hardcode the ipu_clk frequency and let the board file pass this value. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10ipu_common: Rename MXC_CCM_BASEFabio Estevam
Rename MXC_CCM_BASE to CCM_BASE_ADDR as this is already defined for MX6. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53Fabio Estevam
The registers accessed inside clk_ipu_enable/disable are not present on MX6, so make sure they only run on MX51 and MX53. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10ipu_common: Only apply the erratum to MX51Fabio Estevam
The following erratum : "ENGcm08316 IPU: Clarification regarding the bypass mode registers setup for display and camera interfaces" only applies to mx51, so restrict its usage for this SoC only. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10video: Rename CONFIG_VIDEO_MX5Fabio Estevam
Rename CONFIG_VIDEO_MX5 as this driver can also be used on mx6. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10mx6: Allow mx6 to access the IPUv3 registersFabio Estevam
Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10common lcd: minor coding style changesNikita Kiryanov
No functional changes Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2012-07-10microblaze: Wire up dts configurationStephan Linz
- enable OF control and embedded OF - set default device tree file name to 'microblaze' - add CPP to dtc proxy: board/xilinx/dts/microblaze.dts - add an empty but processable dts for microblaze-generic Signed-off-by: Stephan Linz <linz@li-pro.net>
2012-07-10fdt: Add board specific dts inclusionStephan Linz
Some architectures, for example Microblaze, doesn't need a splitted device tree because every Microblaze hw design is different. The individuell Microblaze device tree will be auto generated by FPGA design tools and could be used directly with dtc. The auto generated dts for Microblaze can not processed by CPP. Unfortunately that is the default procedure in U-Boot to merge a splitted device tree (substitution of ARCH_CPU_DTS). Microblaze will never use the ARCH_CPU_DTS substitution and we introduce the new board specific substitution variable BOARD_DTS that points into vendor/board/dts subdir with the file name of CONFIG_DEFAULT_DEVICE_TREE. The common dts file in vendor/dts subdir (defined by CONFIG_DEFAULT_DEVICE_TREE) contain a single include line that can processed by CPP: /include/ BOARD_DTS Signed-off-by: Stephan Linz <linz@li-pro.net> Tested-by: Michal Simek <monstr@monstr.eu> Acked-by: Simon Glass <sjg@chromium.org>
2012-07-10Prepare v2012.07-rc1Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-10Minor Coding Style cleanupWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-10Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk
* 'master' of git://git.denx.de/u-boot-arm: tegra: define fdt_load/fdt_high variables tegra: enable bootz command tegra: usb: Fix device enumeration problem of USB1 tegra: trimslice: set up serial flash pinmux tegra: add pin_mux_spi() board initialization function tegra: add GMC/GMD funcmux entry for SFLASH tegra: bootcmd: start USB only when needed tegra: bootcmd enhancements tegra: add enterrcm command tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG Add env vars describing U-Boot target board tegra: usb: fix wrong error check tegra: add ULPI on USB2 funcmux entry tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches tegra: Add Tamonten Evaluation Carrier support tegra: Use SD write-protect GPIO on Tamonten tegra: Implement gpio_early_init() on Tamonten tegra: Allow boards to perform early GPIO setup tegra: plutux: Add device tree support tegra: medcom: Add device tree support tegra: Rework Tamonten support beagle: add eeprom expansion board info for bct brettl4 Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-10EXYNOS: Fix USB compiler warningRajeshwari Shinde
Fixed the compiler warning message. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Marek Vasut <marex@denx.de>
2012-07-09Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk
* 'master' of git://git.denx.de/u-boot-usb: CONFIG: EXYNOS5: USB: Enable USB 2.0 on smdk5250 EXYNOS5: USB: Fix incorrect USB base addresses EXYNOS: Add power Enable/Disable for USB-EHCI USB: EXYNOS: Set USB 2.0 HOST Link mode EXYNOS5: Add structure for PMU registers EXYNOS5: Fix system register structure USB: EXYNOS: Incorporate EHCI review comments Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-09tegra: define fdt_load/fdt_high variablesStephen Warren
These variables act like loadaddr, but for a device tree image. Defining them in the environment allows boot scripts to be identical on Tegra20 and Tegra30, which have different memory base addresses, and hence need different values for these variables. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09tegra: enable bootz commandStephen Warren
bootz is just like bootm, except that it can boot a raw zImage, without requiring it to be wrapped inside a uImage. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09tegra: usb: Fix device enumeration problem of USB1Jim Lin
A known hardware issue of USB1 port where bit 1 (connect status change) of PORTSC register will be set after issuing Port Reset (like "usb reset" in u-boot command line). This will be treated as an error and stops later device enumeration. Therefore we clear that bit after Port Reset in order to proceed later device enumeration. Signed-off-by: Jim Lin <jilin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09tegra: trimslice: set up serial flash pinmuxStephen Warren
When Trimslice is booted from serial flash, the boot ROM does this, so U-Boot doesn't need to. However, booting from the SD slot for recovery purposes, the boot ROM does not set up the pinmux for serial flash. Add code to U-Boot to set this up, so that an SD-based recovery U-Boot image can upgrade the U-Boot in serial flash. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09tegra: add pin_mux_spi() board initialization functionStephen Warren
Boards can override this to set up the pinmux correctly to access serial flash. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09tegra: add GMC/GMD funcmux entry for SFLASHStephen Warren
This is used on TrimSlice. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit (git 2.34.1) at 2025-01-08 14:57:07 +0000