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2018-11-16fdt_region: Ensure that depth never goes below -1Konrad Beckmann
A specially crafted FIT image makes it possible to overflow the stack with controlled values when using the verified boot feature. Depending on the memory layout, this could be used to overwrite configuration variables on the heap and setting them to 0, e.g. disable signature verification, thus bypassing it. This change fixes a bug in fdt_find_regions where the fdt structure is parsed. A lower value than -1 of depth can lead to a buffer underflow write on the stack. Signed-off-by: Konrad Beckmann <konrad.beckmann@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16image-sig: Ensure that hashed-nodes is null-terminatedKonrad Beckmann
A specially crafted FIT image leads to memory corruption in the stack when using the verified boot feature. The function fit_config_check_sig has a logic error that makes it possible to write past the end of the stack allocated array node_inc. This could potentially be used to bypass the signature check when using verified boot. This change ensures that the number of strings is correct when counted. Signed-off-by: Konrad Beckmann <konrad.beckmann@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16Ability to modify distro boot filenameMartyn Welch
Add in the ability to modify the distro boot filename. Whilst not immediately useful in normal usage, it allows an alternative configuration to be provided when other u-boot functionality is used, such as bootcount limit, to fallback to an alternative boot configuration. In this case we can follow the same boot path as for normal boot, just using an alternatively named configuration file. For example, by providing the following `altbootcmd` when bootcount is in use: altbootcmd=setenv boot_extlinx_conf extlinux-rollback.conf; \ run distro_bootcmd Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-11-16misc: fs_loader: Fix compiler warningKeerthy
Fix compiler warning drivers/misc/fs_loader.c:193:9: warning: format ‘%d’ expects argument of type ‘int’, but argument 5 has type ‘size_t {aka long unsigned int}’ [-Wformat=] Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16misc: fs_loader: Use device_get_global_by_ofnode to get to nodeKeerthy
Instead of two staged ofnode_to_offset followed by device_get_global_by_of_offset approach, direcly use the device_get_global_by_ofnode to fetch the device. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16fs: Makefile: Add fs.c under SPL for fs_loaderKeerthy
Add fs.c under SPL as well as it is needed for fs_loader Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add as obj-$(CONFIG_FS_LOADER) for non-SPL_FRAMEWORK builds] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-16serial: ns16550: add setconfig supportSimon Goldschmidt
Add possibility to update the serial parity used. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-11-16dm: serial: fix comment on dm_serial_ops setconfigSimon Goldschmidt
The comment on this function prototype describes nonexistent parameters. It seems to be copied from 'setparity'. Update it to match its the parameter list. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16board: ti: am65x: Update README to add R5 build supportLokesh Vutla
Update the README file to add r5 build support and system firmware support. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-16configs: am65x_evm_r5: Add initial supportLokesh Vutla
Add initial defconfig support for AM65x that runs on R5. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2018-11-16armv7r: dts: am654: Add initial supportLokesh Vutla
Add R5 specific dts for am654-evm. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-11-16arm: dts: k3: Sync dts from LinuxLokesh Vutla
Sync the k3-am654 specific dts files from Linux next with tag 20181019. This changes are in queue for Linux v4.20-rc1 Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16board: ti: am654: r5: Add initial support for am654Lokesh Vutla
Add initial support for AM654 based EVM running on R5. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-16armv7R: K3: am654: Add support for triggering ddr init from SPLLokesh Vutla
In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support to start ATF from R5 SPLLokesh Vutla
Considering the boot time requirements, Cortex-A core should be able to start immediately after SPL on R5. Add support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support for generating build targetsLokesh Vutla
Update Makefiles to generate: - tiboot3.bin: Image format that can be processed by ROM. Below is the tiboot3.bin image format that is required by ROM: _______________________ | X509 | | Certificate | | ____________________ | | | | | | | u-boot-spl.bin | | | | | | | |___________________| | |_______________________| Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-16armv7R: K3: am654: Enable MPU regionsLokesh Vutla
Enable MPU regions for AM654 evm: - Region0: 0x00000000 - 0xFFFFFFFF: Device memory, not executable - Region1: 0x41c00000 - 0x42400000: Normal, executable, WB, Write alloc - Region2: 0x80000000 - 0xFFFFFFFF: Normal, executable, WB, Write alloc - region3-15: Disabled With this dcache can be enabled either in SPL or U-Boot. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16ram: Introduce K3 AM654 DDR Sub System driverLokesh Vutla
K3 based AM654 devices has DDR memory subsystem that comprises Synopys DDR controller, Synopsis DDR phy and wrapper logic to intergrate these blocks into the device. This DDR subsystem provides an interface to external SDRAM devices. Adding support for the initialization of the external SDRAM devices by configuring the DDRSS registers and using the buitin PHY routines. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com>
2018-11-16i2c: stm32f7: change setup struct to constPatrick Delaunay
Change static array to const when it is useful to save memory (move stm32f7_setup=0x18 from .data to .rodata section) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-16i2c: stm32f7: cosmetic: clean the driverPatrick Delaunay
Solve alignments issues in the driver to avoid checkpatch error. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-16ARM: am3517_evm: Remove SPL_OF_CONTROL and OF_PLATDATAAdam Ford
After the recomendation, some testing shows like these are unnecessary. Suggested-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16ARM: omap3_logic: Remove SPL_OF_CONTROL and OF_PLATDATAAdam Ford
After the recomendation, some testing shows like these are unnecessary. Suggested-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16arm: Make arch specific memcpy thumb-safe.Klaus Goger
The current arch implementation of memcpy cannot be called from thumb code, because it does not use bx instructions on return. This patch addresses that. Note, that this patch does not touch the hot loop of memcpy, so performance is not affected. Tested on MXS (arm926ejs) with and without thumb-mode enabled. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2018-11-16test/py: test pinmux commandPatrice Chotard
Add pinmux test which test the following commands: - pinmux list - pinmux dev - pinmux status Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Mark some tests as sandbox-centric] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-16pinctrl: sandbox: Add get_pin_muxing ops supportPatrice Chotard
Add get_pin_mux ops support to display the pin muxing description of the sandbox_pins[] Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16gpio: stm32f7: Add ops get_functionPatrice Chotard
This patch adds gpio get_function ops support. This function reports the state of a gpio. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-11-16pinctrl: stm32: Add get_pin_muxing() opsPatrice Chotard
Add get_pin_muxing() ops to obtain the pin muxing description a given pin index. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16pinctrl: stm32: Add get_pin_name() opsPatrice Chotard
Add get_pin_name ops to obtain a pin name given a pin index of a specified pin-controller. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16pinctrl: stm32: Add get_pins_count() opsPatrice Chotard
Add get_pins_count ops to obtain the number of pins owns by a pin-controller. On STM32 SoCs bindings, each pin-controller owns several gpio banks. Each GPIO bank can own up to 16 pins. To obtain the total pins count, walk through each sub-nodes (ie GPIO banks) and sum each GPIO banks pins number. For that in probe() we build a list with each GPIO device reference found. This list will also be used with future get_pin_muxing and get_pin_name ops to speed up and optimize walk through all GPIO banks. As this code is common to all STM32 SoCs, this code is put under SPL_BUILD compilation flag to avoid to increase SPL code size for STM32F7 which is limited to 32Ko. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16cmd: pinmux: Add pinmux commandPatrice Chotard
pinmux command allows to : - list all pin-controllers available on platforms - select a pin-controller - display the muxing of all pins of the current pin-controller or all pin-controllers depending of given options Signed-off-by: Patrice Chotard <patrice.chotard@st.com> cmd: pinmux: Fix pinmux command if "pinmux status" command is used without having set dev using "pinmux dev", print pinmux usage Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16dm: uclass: Add uclass_foreach_dev_probePatrice Chotard
Add uclass_foreach_dev_probe() which iterates through devices of a given uclass. Devices are probed if necessary and are ready to use. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16dm: uclass: Add uclass_next_device_err() to return a valid devicePatrice Chotard
Similarly to uclass_first_device_err(), add uclass_next_device_err() which returns an error if there are no next devices in that uclass. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16dm: pinctrl: Add pinctrl_get_pin_name and pinctrl_get_pins_countPatrice Chotard
Add pinctrl_get_pin_name() and pinctrl_get_pins_count() methods to obtain pin's name and pin's muxing given a pin reference. This will be used by the new pinmux command. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16dm: pinctrl: Add get_pin_muxing() opsPatrice Chotard
Add get_pin_muxing() which allows to display the muxing of a given pin belonging to a pin-controller. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16w1-eeprom: Add support for Maxim DS2502 add only memoryMartin Fuzzey
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
2018-11-16ARM: omap3_logic: Make CONFIG_SYS_TEXT_BASE match README.omap3Adam Ford
README.omap3 has two options. For option 1, CONFIG_SYS_TEXT_BASE is set to 0x80100000. Option 2 lists 0x80008000. The existing value is neither of these, so this patch makes it equivalent to Option 1. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16ARM: am3517_evm: Build for ThumbAdam Ford
In an effort to free up more resources in SPL and U-Boot, building for Thumb shrinks the code side. Before: text data bss dec hex filename 685588 25808 275724 987120 f0ff0 u-boot text data bss dec hex filename 55324 417 67460 123201 1e141 spl/u-boot-spl After: text data bss dec hex filename 515502 25808 275708 817018 c777a u-boot text data bss dec hex filename 42910 417 67460 110787 1b0c3 spl/u-boot-spl Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16configs: am3517_evm: Use default OMAP3 memory settingsAdam Ford
The AM3517 is mostly am omap3, so this partch removes the custom memory configurations and just uses the default common entries for omap3 and armv7. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16ARM: DTS: Resync am3517-evm.dts with Linux 4.19Adam Ford
Some minor changes have been made to the AM3517-evm and the underlying am3517.dtsi files. This patch re-sync's the DTS and DTSI files with Linux. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16mtd: nand: lpc32xx slc: disable DMA support in SPL buildsVladimir Zapolskiy
Testing and analysis shows that at the moment LPC32xx NAND SLC driver can not get PL080 DMA backbone support in SPL build, because SPL NAND loaders operate with subpage (ECC step to be precisely) reads, and this is not supported in the NAND SLC + DMA + hardware ECC calculation bundle. The change removes a cautious build time warning and explicitly disables DMA flavour of the driver for SPL builds, to reduce the amound of #ifdef sections the code blocks are minimally reorganized. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2018-11-16mtd: nand: lpc32xx mlc: predefine number of NAND chips to supportVladimir Zapolskiy
Build option CONFIG_SYS_MAX_NAND_CHIPS is used by NXP LPC32xx NAND MLC driver only, as a preparation for potential removal or replacement of the option the change predefines CONFIG_SYS_MAX_NAND_CHIPS to 1, same value is used by the single user Work Microwave Work 92105 board, thus it will be safe now to remove the option as a board specific one. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-11-16gpio: pca953x: Clear the polarity invert register at initYe Li
The pca953x_gpio driver uses default value of polarity inversion register. For some devices like PCA9557 and MAX7310, their polarity inversion register default value is 0xf0. So for high 4 ports, when reading their values, the values are inverted as the actual level. This patch clears the polarity inversion register to 0 at init, so that the port read and write values are aligned. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-11-16clk: Allow clock defaults to be set also during re-reloc stateAndreas Dannenberg
The earlier commit f4fcba5c5ba ("clk: implement clk_set_defaults()") which introduced the functionality for setting clock defaults such as rates and parents will skip the processing when executing in a re-reloc state. This for example can prevent the assigning of clock parents when running in SPL code. Go ahead and remove this limitation. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16bcm968580xref: add initial supportPhilippe Reynes
This add the initial support of the broadcom reference board bcm968580xref with a bcm6858 SoC. This board has 512 MB of ram, 256 MB of flash (nand), 2 usb port, 1 uart, 4 ethernet ports (LAN), 1 ethernet port (WAN). Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-11-16bcm6858: add initial supportPhilippe Reynes
This add the initial support of the broadcom bcm6858 SoC family, only the cpu, dram and uart are supported. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-11-16serial: bcm6858: add serial supportPhilippe Reynes
This driver add the support of serial on bcm6858. It's based on serial for bcm6345. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-11-16cmd/bdinfo: correct output of numerical valuesHeinrich Schuchardt
Display all digits on 64bit systems. Currently we print only the lower 32 bits. Examples of values that can exceed 32 bits are the size and start of memory banks. For fdt_blob use the same output method as for other values. This avoids misalignment. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-11-16arm: at91: wdt: Convert watchdog driver to dm/dtPrasanthi Chellakumar
Convert the Watchdog driver for AT91SAM9x processors to support the driver model and device tree. Changes "CONFIG_AT91SAM9_WATCHDOG" to new "CONFIG_WDT_AT91" Kconfig option. Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com>
2018-11-16ARMv8: SError exception handling in PSCI exception vectorsChee Hong Ang
Allow platform vendors to handle SError interrupt exceptions from ARMv8 PSCI exception vectors by overriding this weak function 'plat_error_handler'. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2018-11-16ARMv8: Add EL3 exception handling for ARMv8's KconfigChee Hong Ang
Kconfig option to allow all External Abort and SError exception taken to EL3. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>