Age | Commit message (Collapse) | Author |
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P1013 is a single-core version of P1022. There is no P1022 target
configured. Drop related macros. P1022 SoC is still supported.
Signed-off-by: York Sun <york.sun@nxp.com>
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P1012 is a single-core version of P1021. There is no P1012 target
configured. Drop related macros. P1012 SoC is still supported.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_P1011 with ARCH_P1011 in Kconfig. P1011RDB seems to be in
scrapyard though.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_P1023 with ARCH_P1023 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_P1022DS instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_P1022 with ARCH_P1022 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Remove CONFIG_P1010RDB_PA and CONFIG_P1010RDB_PB and split TARGET_P1010RDB
to TARGET_P1010RDB_PA and TARGET_P1010RDB_PB in Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_P1010 with ARCH_P1010 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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This macro is no longer used.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_MPC8572DS instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8572 with ARCH_MPC8572 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_MPC8569MDS instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8569 with ARCH_MPC8569 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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This macro is no longer used.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8568 with ARCH_MPC8568 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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This macro is no longer used.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8560 with ARCH_MPC8560 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_MPC8555CDS instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8555 with ARCH_MPC8555 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace with CONFIG_TARGET_MPC8541CDS from Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8541 with ARCH_MPC8541 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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This macro is no longer used.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8540 with ARCH_MPC8540 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_MPC8536DS instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8536 with ARCH_MPC8536 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_C29XPCIE instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_PPC_C29X with ARCH_C29X in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_BSC9132QDS from Kconfig option, remove CONFIG_BSC9132QDS
macro.
Signed-off-by: York Sun <york.sun@nxp.com>
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This macro CONFIG_BSC9131RDB is no longer needed.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_BSC9131, CONFIG_BSC9132 with ARCH_BSC9131, ARCH_BSC9132
Kconfig options.
Also drop #ifdef in BSC9131RDB.h since it is redundant.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_MPC8544DS instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8544 with ARCH_MPC8544 in Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
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Use CONFIG_TARGET_MPC8548CDS instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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Replace CONFIG_MPC8548 with ARCH_MPC8548 in Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
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While we move some config macros to Kconfig, kconfig header is needed
to avoid compiling error if not already included.
Signed-off-by: York Sun <york.sun@nxp.com>
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Commit ec6617c3 includes autoconf.h in image-fit.c, causing conflict
for board odroid-xu3 which overwrites CONFIG_SYS_BOARD in header
file. Move the include higher and use linux/kconfig.h instead of
generated/autoconf.h.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Alison Wang <alison.wang@nxp.com>
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To align with SPL change 38fed8ab and 693d4c9f, add Kconfig option
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to defconfig, and remove
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Feng Li <feng.li_2@nxp.com>
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Add serial platform data to board file.
Enable driver model for PXA serial driver.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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With em humble DM and Kconfig migraters U-Boot binary size keeps
increasing. Drop a bunch of less needed stuff to save another precious
20+ KB.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Optional driver model handling integration.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
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Migrate the PXA serial driver to be configured via Kconfig.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
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As PSCI and secure monitor firmware framework are enabled, this patch is
to support loading 32-bit OS in such case. The default target exception
level returned to U-Boot is EL2, so the corresponding work to switch to
AArch32 EL2 and jump to 32-bit OS are done in U-Boot and secure firmware
together.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.
The architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.
Signed-off-by: Ebony Zhu <ebony.zhu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Remove the custom low-level initialization function and reuse the
default low-level initialization function. But this requires the
ARMV8_MULTIENTRY config option to be enabled for Exynos7420.
On Exynos7420, the boot CPU belongs to the second cluster and so
with ARMV8_MULTIENTRY config option enabled, the 'branch_if_master'
macro fails to detect the CPU as boot CPU. As a temporary workaround
the CPU_RELEASE_ADDR is set to point to '_main'.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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NXP ARMv8 SoC LS2080A release all secondary cores in one-go.
But other new SoCs like LS2088A, LS1088A release secondary
cores one by one.
Update code to release secondary cores based on SoC SVR
Add code to release cores one by one for non LS2080A SoCs
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: remove "inline" from declaration of initiator_type]
Reviewed-by: York Sun <york.sun@nxp.com>
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The QorIQ LS2088A SoC is built on layerscape architecture.
It is similar to LS2080A SoC with some differences like
1)Timer controller offset is different
2)It has A72 cores
3)It supports TZASC module
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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LS2080 SoC and its personalities does not support TZASC
But other new SoCs like LS2088A, LS1088A supports TZASC
Hence, skip initializing TZASC for Ls2080A based on SVR
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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TZASC registers like TZASC_GATE_KEEPER, TZASC_REGION_ATTRIBUTES
are 32-bit regsiters.
So while doing register load-store operations, 32-bit intermediate
register, w0 should be used.
Update x0 register to w0 register type.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Timer controller base address has been changed from
LS2080A SoC (and its personalities) to new SoCs like
LS2088A, LS1088A.
Use SVR based timer base address detection to avoid compile time #ifdef.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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