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2017-05-22ARM: rmobile: salvator-x: Add DVFS and PMIC supportMarek Vasut
Add support for rebooting the board using the ROHM BD9571MWV I2C PMIC, but keep the CPU reboot option as a fallback. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: salvator-x: Add RAVB ethernet supportMarek Vasut
Add support for the AVB ethernet on the Salvator-X board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: salvator-x: Add SD supportMarek Vasut
Add support for the SD card slots on the Salvator-X board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: salvator-x: Adjust UART clockMarek Vasut
The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 . Use the internal clock and ignore the early version of the chip. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: salvator-x: Zap redefined DECLARE_GLOBAL_DATA_PTRMarek Vasut
The macro is used twice in the salvator-x board file, drop one. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: salvator-x: Set default device treeMarek Vasut
Set default device tree file in the salvator-x_defconfig and use it in the environment. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: salvator-x: Move OF_LIBFDT and CMD_FDT to board configMarek Vasut
Move these two Kconfig symbols to the salvator-x_defconfig. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: salvator-x: Use BIT() macro in board fileMarek Vasut
Cosmetic change, replace (1 << (n)) with BIT(n) . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Allow R8A7796 Salvator-X configurationMarek Vasut
The Salvator-X can have both H3 and M3 CPU on it, drop the select R8A7795 to allow both configurations. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Add R8A7796 supportMarek Vasut
Add Kconfig entry for the R8A7796 RCar M3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Handle R8A7796 r1.1 in the PRR codeMarek Vasut
The R8A7796 r1.1 reports itself as r2.0 , add quirk into the PRR code to fix this report. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Add R8A7796 into the CPU tableMarek Vasut
Add entry for the R8A7796 RCar M3 SoC into the CPU info table. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Add R8A7795 into the CPU tableMarek Vasut
Add entry for the R8A7795 RCar H3 SoC into the CPU info table. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Make the Gen3 SoC configurableMarek Vasut
Allow selecting the Gen3 SoC in preparation for RCar M3 . No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Update link address to match latest BL2Marek Vasut
Update the CONFIG_SYS_TEXT_BASE to match BL2 Rev.1.0.9 and newer, which loads the U-Boot to 0x50000000 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Zap RCAR_GEN3_EXTRAM_BOOTMarek Vasut
This Kconfig option is not used on any board, so drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Import R8A7796 PFC and GPIO tablesMarek Vasut
Import the R8A7796 PFC and GPIO tables from the latest 3.5.3 release from Renesas . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Update R8A7795 PFC and GPIO tablesMarek Vasut
Sync the PFC and GPIO tables with the latest 3.5.3 release from Renesas . This adds ES2.0 support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22serial: sh: Add r8a7796 supportHiroyuki Yokoyama
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22net: ravb: Add Renesas Ethernet RAVB driverMarek Vasut
Add driver for the Renesas Ethernet AVB block found in RCar H3/M3. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Based on work of: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Takeshi Kihara <takeshi.kihara.df@renesas.com> Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
2017-05-22gpio: rcar_gen3: Fix GPIO read supportKouei Abe
This patch fixes to read the GPIO status after confirming the INOUT setting. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com>
2017-05-18Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2017-05-18Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2017-05-18Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2017-05-18ARM: dts: am335x-evm: disable mmc3Jean-Jacques Hiblot
SDIO is not supported in u-boot, there is no point in enabling mmc3. For this purpose, add u-boot specific dtsi that this will be included automatically while building the dtb. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-18scripts/Makefile.lib: Always have ...-u-boot.dtsi be able to overrideTom Rini
The intention of having a -u-boot.dtsi file is to be able to make changes to the provided upstream dts files as well as to be able to add nodes. Change the logic for adding the file from making it the last included file at the top of the dts to being included at the end of the file. Cc: Jean-Jacques Hiblot <jjhiblot@ti.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-18Merge branch 'master' of git://git.denx.de/u-boot-imxStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2017-05-18arm: socfpga: Enable build for Arria 10Ley Foon Tan
Update Kconfig and Makefile to enable Arria 10. Clean up Makefile and sorting *.o alphanumerically. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add board files for the Arria10Ley Foon Tan
Add support for the Arria10 SoCDK. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add config and defconfig for Arria 10Ley Foon Tan
Add config and defconfig for the Arria10 and update socfpga_common.h. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add SPL support for Arria 10Ley Foon Tan
Add SPL support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: dts: Add dts and dtsi for Arria 10Ley Foon Tan
Device tree files for Arria 10 Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add misc support for Arria 10Ley Foon Tan
Add misc support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add pinmux for Arria 10Ley Foon Tan
Add pinmux support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add sdram header file for Arria 10Ley Foon Tan
Add sdram header file for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add system manager for Arria 10Ley Foon Tan
Add system manager register struct and macros for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add clock driver for Arria 10Ley Foon Tan
Add clock driver support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add reset driver support for Arria 10Ley Foon Tan
Add reset driver support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Add A10 macrosLey Foon Tan
Add i2c, timer and other A10 macros. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure misc driverLey Foon Tan
Restructure misc driver in the preparation to support A10. Move the Gen5 specific code to gen5 file. Change all uint32_t_to u32. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure system managerLey Foon Tan
Restructure system manager in the preparation to support A10. No functional change. Change uint32_t to u32. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure reset manager driverLey Foon Tan
Restructure reset manager driver in the preparation to support A10. Move the Gen5 specific code to gen5 files. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure clock manager driverLey Foon Tan
Restructure clock manager driver in the preparation to support A10. Move the Gen5 specific code to _gen5 files. - Change all uint32_t to u32 and change to use macro BIT(n) for bit shift. - Check return value from wait_for_bit(). So change return type to int for cm_write_with_phase() and cm_basic_init(). Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18usb: lpc32xx: add i2c DM supportLiam Beguin
Add DM support for i2c functions. Signed-off-by: Liam Beguin <lbeguin@tycoint.com> Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Reviewed-by: Marek Vasut <marex@denx.de>
2017-05-18pinctrl: imx: fix memory leakPeng Fan
Each time set_state is called, a new piece memory will be allocated for pin_data, but not freed, this will incur memory leak. When error, the devm API could not free memory automatically. So need call devm_kfree when error. Issue reported by Coverity Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Agner <stefan.agner@toradex.com> Cc: Stefano Babic <sbabic@denx.de>
2017-05-18imx: mx7dsabresd: fix secure config after switching to DMStefano Babic
mx7dsabresd_secure_defconfig was not updated after moving to DM. Signed-off-by: Stefano Babic <sbabic@denx.de>
2017-05-18imx: mx7dsabresd: switch to DM USBPeng Fan
Switch to use DM USB. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-05-18imx: mx7dsabresd: reset ENET_RST_BPeng Fan
Reset ENET_RST_B to make ENET function stable. Since DM_GPIO enabled, we use "gpio_spi@0_5" which corresponds to ENET_RST_B. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2017-05-18imx: mx7dsabresd: enable more DM driversPeng Fan
Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO enabled. The 74x164 drivers needs SOFT_SPI and DM_GPIO enabled. So needs to enable them together. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2017-05-18gpio: 74x164: make oe-pins optionalPeng Fan
Make oe-pins optional because some boards have fixed it to enable. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2025-01-18 01:43:43 +0000