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2013-08-15ARM: AM33xx: Move s_init to a common placeHeiko Schocher
s_init has the same outline for all the AM33xx based board. So making it generic. This also helps in addition of new Soc with minimal changes. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2013-08-15ARM: AM33xx: Cleanup clocks layerLokesh Vutla
Cleaning up the clocks layer. This helps in addition of new Soc with minimal changes. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2013-08-15ARM: AM33xx: Cleanup dplls dataLokesh Vutla
Locking sequence for all the dplls is same. In the current code same sequence is done repeatedly for each dpll. Instead have a generic function for locking dplls and pass dpll data to that function. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2013-07-30am335x_evm: Add support to boot from NOR.Steve Kipisz
NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR. We enclose the DMM-related parts of arch/arm/cpu/armv7/am33xx/emif4.c with TI81xx checks as at this time U-Boot does not discard unused sections in the main build and this code relies on functions specific to (and only provided in) ti81xx-related code. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2013-07-30am335x_evm: Add support for the NOR module on the memory capeSteve Kipisz
This patch adds support for the NOR module that attaches to the memory cape for a Beaglebone board. This does not add booting support; only support so that you can boot from SD/MMC and see the NOR module so that it can be programmed. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> [trini: Clean up config changes slightly] Signed-off-by: Tom Rini <trini@ti.com>
2013-07-30am33xx: Correct gpmc_cfg->irqstatus/enableTom Rini
Based on our usage of the GPMC, either with NOR or NAND we do not need to be setting the irqstatus or irqenable bits and should clear them like we have historically. Signed-off-by: Tom Rini <trini@ti.com>
2013-07-26ARM: DRA7xx: Add CPSW support to DRA7xx EVMMugunthan V N
Adding support for CPSW Ethernet support found in DRA7xx EVM Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26ARM: DRA7xx: Enable GMAC clock controlMugunthan V N
Enabling CPSW module by enabling GMAC clock control Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26ARM: DRA7xx: Lock DPLL_GMACLokesh Vutla
Locking DPLL_GMAC [mugunthanvnm@ti.com:Configure only if CPSW is selected] Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26omap3/sys_info: fix printout of OMAP36XX L3 freqencyAndreas Bießmann
The OMAP36xx/OMAP37xx family uses L3 frequency of 200MHz instead of 165MHz used by OMAP34xx/OMAP35xx. Also fix checkpatch warning about alignment. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-07-26arm: omap3: spl: Fix problem with 8bit NAND devicesStefan Roese
Currently in OMAP3 SPL, the GPMC for NAND is configured for 16bit access. This patch adds support for 8bit NAND devices as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com>
2013-07-25Merge branch 'u-boot/master' into u-boot-arm/masterAlbert ARIBAUD
2013-07-25ARM: highbank: avoid bss write in timer_initRob Herring
The timer_init function is called before relocation and writes to bss data were corrupting relocation data. Fix this by removing the call to reset_timer_masked. The initial timer count should be 0 or near 0 anyway, so initializing the variables are not needed. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25ARM: highbank: set timer prescaler to 256Rob Herring
The 150MHz clock rate gives u-boot time functions problems and there's no benefit to a fast clock, so lower the rate. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25ARM: highbank: fix get_tbclk value to timer rateRob Herring
get_tbclk should return the timer's frequency, not CONFIG_SYS_HZ. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-24Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini
The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
2013-07-23vf610: Add I2C support for Vybrid VF610 platformAlison Wang
This patch adds I2C support for Vybrid VF610 platform and adds I2C0 support to VF610TWR board. Signed-off-by: Alison Wang <b18965@freescale.com>
2013-07-16arm:exynos:fix: Fix clock calculation for Exynos4210 based targets.Łukasz Majewski
Provide proper setting for the APLL fout frequency calculation for Exynos4 based targets (especially Exynos4210 - Trats board). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2013-07-12Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
2013-07-10Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD
2013-07-09arm: exynos: fix clock calculationMinkyu Kang
There are differnce with clock calcuation by cpu variations. This patch will fix it according to user manual. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2013-07-05EXYNOS: Move files from board/samsung to arch/armRajeshwari Shinde
This patch performs the following: 1) Convert the assembly code for memory and clock initialization to C code. 2) Move the memory and clock init codes from board/samsung to arch/arm 3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted the common lowlevel_init from assembly to C-code 4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5. 5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already done in _main. 6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250. TEST: Tested SD-MMC boot on SMDK5250 and Origen. Tested USB and SPI boot on SMDK5250 Compile tested for SMDKV310. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-07-05EXYNOS4210: Configure GPIO for uartRajeshwari Shinde
This patch configures the gpio values for UART on Origen and SMDKV310 using pinmux Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-07-05EXYNOS: Add API for power reset and exit wakeupRajeshwari Shinde
This patch adds APIs to get power reset status and exit the wakeup condition for both exynos5 and exynos4 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-07-02ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5Axel Lin
The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs. These SoCs have different gpio count but currently omap_gpio driver uses hard coded 192 which is wrong. This patch fixes this issue by: 1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h. 2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5. Thanks for Lubomir Popov to provide valuable comments to fix this issue. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Heiko Schocher <hs@denx.de>
2013-07-02ARM: OMAP4+: Fix MA detection during SDRAM_AUTO_DETECTIONLokesh Vutla
During SDRAM_AUTO_DETECTION MA is not configured. For Soc's > OMAP4460 MA is present. So populating MA for the same. Tested on OMAP4430 PANDA, OMAP4460 PANDA. Reported-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-28Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD
2013-06-26mx27: add i2c clocktrem
Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org> Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
2013-06-26mx27: add function enable_cachestrem
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
2013-06-26exynos: Avoid function instrumentation for microsecond timerSimon Glass
For tracing to work it has to be able to access the microsecond timer without causing a recursive call to the function entry/exit handlers. Add attributes to the relevant functions to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-22pxa: use -mcpu=xscale compiler optionMike Dunn
Pass '-mcpu=xscale' to the compiler instead of march and mtune. This will cause gcc to define the __XSCALE__ macro. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
2013-06-22pxa: turn icache off in cpu_init_crit()Mike Dunn
The comment in the low-level initialization function cpu_init_crit() says that the caches are being disabled, but (oddly) the icache is actually turned on. This is probably not a good idea prior to relocating code, so this patch turns it off. Tested on the pxa270. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
2013-06-21arm: make __rel_dyn_{start, end} compiler-generatedAlbert ARIBAUD
This change is only done where needed: some linker scripts may contain relocation symbols yet remain unchanged. __rel_dyn_start and __rel_dyn_end each requires its own output section; putting them in relocation sections changes their flags and breaks relocation. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-06-21arm: make __image_copy_{start, end} compiler-generatedAlbert ARIBAUD
This change is only done where needed: some linker scripts may contain __image_copy_{start,end} yet remain unchanged. Also, __image_copy_end needs its own section; putting it in relocation sections changes their flags and makes relocation break. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-06-21remove all references to .dynsymAlbert ARIBAUD
Discard all .dynsym sections from linker scripts Remove all __dynsym_start definitions from linker scripts Remove all __dynsym_start references from the codebase Note: this touches include/asm-generic/sections.h, which is not ARM-specific, but actual uses of __dynsym_start are only in ARM, so this patch can safely go through the ARM repository. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-06-19Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD
2013-06-19Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD
Conflicts: spl/Makefile
2013-06-18arm, am33xx: move uart soft reset code to common placeHeiko Schocher
move uart soft reset code to common place and call this function from board code, instead of copy and paste this code for every board. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> [trini: Fix igep0033 build, remove 'regval' on pcm051] Signed-off-by: Tom Rini <trini@ti.com>
2013-06-18arm, am335x: make mpu pll config configurableHeiko Schocher
upcoming support for siemens boards switches mpu pll clk in board code. So make this configurable. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
2013-06-18arm, am33xx: move rtc32k_enable() to common placeHeiko Schocher
move rtc32k_enable() to common place so all am33xx boards can use it. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
2013-06-13EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.Amar
This patch initialises the local variable 'shift' to zero. The uninitialised local variable 'shift' had garbage value and was resulting in unwnated results in the functions exynos5_get_mmc_clk() and exynos4_get_mmc_clk(). Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-12arm: pxa: config option for PXA270 turbo modeSergey Yanovich
PXA270 CPU has turbo mode. The mode is 2.5 times faster than the default run mode. Activating the mode early significantly speeds up boot process. Signed-off-by: Sergey Yanovich <ynvich@gmail.com>
2013-06-10arm: da830: moved pinmux configurations to the arch treeVishwanathrao Badarkhe, Manish
Move pinmux configurations for the DA830 SoCs from board file to the arch tree so that it can be used for all da830 based devices. Also, avoids duplicate pinmuxing in case of NAND. Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
2013-06-10OMAP5: Enable access to auxclk registersLubomir Popov
auxclk0 and auxclk1 are utilized on some OMAP5 boards. Define the infrastructure needed for accessing them without using magic numbers. Also remove unrelated TPS62361 defines from clocks.h Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
2013-06-10arm: Remove OMAP2420H4 and all omap24xx supportTom Rini
The omap2420H4 was the only mainline omap24xx board. Prior to being fixed by Jon Hunter in time for v2013.04 it had been functionally broken for a very long time. Remove this board as there's not been interest in it in U-Boot for quite a long time. Signed-off-by: Tom Rini <trini@ti.com>
2013-06-10ARM: DRA7xx: EMIF: Change settings required for EVM boardSricharan R
DRA7 EVM board has the below configuration. Adding the settings for the same here. 2Gb_1_35V_DDR3L part * 2 on EMIF1 2Gb_1_35V_DDR3L part * 4 on EMIF2 Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: clocks: Update PLL valuesLokesh Vutla
Update PLL values. SYS_CLKSEL value for 20MHz is changed to 2. In other platforms SYS_CLKSEL value 2 represents reserved. But in sys_clk array ind 1 is used for 13Mhz. Since other platforms are not using 13Mhz, reusing index 1 for 20MHz. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com>
2013-06-10ARM: DRA7xx: Correct the SYS_CLK to 20MHZSricharan R
The sys_clk on the dra evm board is 20MHZ. Changing the configuration for the same. And also moving V_SCLK, V_OSCK defines to arch/clock.h for OMAP4+ boards. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: Do not enable srcomp for DRA7xx Soc'sLokesh Vutla
Slew rate compensation cells are not present for DRA7xx Soc's. So return from function srcomp_enable() if soc is not OMAP54xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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