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2012-10-04arm: Remove additional config flagsMichal Simek
These options are just duplicated from arch/arm/cpu/armv7/config.mk Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-10-04armv7 cpu_init_crit: Simplify codeBenoît Thébaudeau
We don't need to return to cpu_init_crit after calling lowlevel_init, so lowlevel_init can directly return to the caller of cpu_init_crit. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2012-10-03kirkwood: implement kw_sdram_size_adjustGerlando Falauto
Size of the SDRAM chips might differ between any two (otherwise identical) instances of the same board. So add a function kw_sdram_size_adjust() which reads out the current ram size for a given bank, and adjusts the Kirkwood's SDRAM window size register accordingly. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2012-10-03kirkwood: implement kw_sdram_bs_set()Gerlando Falauto
Some boards might be equipped with different SDRAM configurations. When that is the case, CPU CS Window Size Register (CS[0]n Size) should be set to the biggest value through board.cfg file; then its value can be fixed at runtime according to the detected SDRAM size. Therefore, implement kw_sdram_bs_set(). Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Marek Vasut <marex@denx.de> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
2012-10-03kirkwood: use c-struct for access to SDRAM addr decode registersHolger Brunck
Remove the defines and do this with a C-struct. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Marek Vasut <marex@denx.de> Acked-By: Prafulla Wadaskar <Prafulla@marvell.com>
2012-10-03rmobile: Fix build timer driver with BUILD_DIRNobuhiro Iwamatsu
Rmobile common timer driver diverts the same driver as SH architecture. When it builds at the same place with source, it is no problem, but when it builds out of source, it cannot build. This patch revises this problem. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2012-10-03arm: rmobile: Add cpu_eth_init functionNobuhiro Iwamatsu
This supports ethernet driver of RMOBILE R8A7740. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add support PFC of Renesas R8A7740Nobuhiro Iwamatsu
Renesas R8A7740 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel. Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add support Renesas R8A7740Nobuhiro Iwamatsu
Renesas R8A7740 is CPU with Cortex-A9. This supports the basic register definition and GPIO. Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add support TMU base timer functionNobuhiro Iwamatsu
Some rmobile SoC has TMU base timer function. This supports TMU. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Change initializing ICCICR registerNobuhiro Iwamatsu
There is rmobile without ICCICR. ICCICR is initialized only when ICCICR is defined. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: kzm9g: separate cpu_rev to integer and fractionTetsuyuki Kobayashi
According to SoC document, revision info is separated to integer part and fracton part. So I separete rmobile_get_cpu_rev() to rmobile_get_cpu_rev_integer() and rmobile_get_cpu_rev_fraction(). Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: kzm9g: fix CPU infoTetsuyuki Kobayashi
CPU info register was read wrongly by mistake. And function rmobile_get_cpu_rev() was not called properly. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Support build with gcc-4.6 or laterNobuhiro Iwamatsu
Latest rmobile code was tested by using old gcc (gcc-4.4). When we use gcc-4.6 (or later), the build is made, but does not work. This solves a problem not to work by add -march=armv5 to compiple option when we built in gcc-4.6 (or later). I tested by linaro's compiler version 2012.04-20120426. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add support PFC of Renesas SH73A0Nobuhiro Iwamatsu
Renesas SH73A0 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add support Renesas SH73A0Nobuhiro Iwamatsu
Renesas SH73A0 is CPU with Cortex-A9. This supports the basic register definition and GPIO. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add basic support for Renesas R-MobileNobuhiro Iwamatsu
This patch adds minimum support for R-Mobile. Only minimal support with timer. This CPU can uses the peripheral of Renesas SuperH. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-01am33xx: Fix fetching of mmc1 bootmode from bootrom for AM33XXJoel A Fernandes
U-boot should not ignore getting the bootmode passed on from the bootrom. With this, U-boot SPL knows it was loaded from MMC1 and use this info to read full U-boot from MMC1 as well. Cc: pprakash@ti.com Cc: trini@ti.com Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2012-09-27ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORKTom Rini
- Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs. - Remove duplicated code. - Add spl_boot_device() that returns the statically chosen boot device. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27SPL: NAND: Move arch/arm/cpu/armv7/omap-common/spl_nand.c to common/splTom Rini
We move the spl_nand_load_image function to common/spl. This will allow for easier integration of SPL-boots-Linux code on other arches. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27SPL: Create arch/arm/lib/spl.c for board_init_f and jump_to_image_linuxTom Rini
In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer, clear the BSS and call board_init_r. We mark this as weak as some platforms may need to perform additional initalization at this point. We provide a gd that we know will be in a usable location, once the BSS has been cleared to help with this as well. Finally, we no longer call relocate_code so remove that from the armv7 version. Next, both board_init_f and jump_to_image_linux are going to be inherently arch-specific, so move these versions to arch/arm/lib/spl.c Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27SPL: Move the omap SPL framework to common/splTom Rini
Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL framework, enable on all of the previously using boards. We move the spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave the NAND one in-place as we plan to replace it later in this series. We use common/spl to avoid linker problems with respect to merging constant strings in objects. Otherwise all strings in common/ will be linked in and kept which grows SPL in size too much. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Move gpmc_init() to spl_board_init()Tom Rini
This is an OMAP/related-specific function, move calling it to spl_board_init() and turn on CONFIG_SPL_BOARD_INIT on the boards that enabled NAND and didn't enable this already. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Start hooking in the current SPI SPL supportTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Clean up spl.c / spl_nand.c slightlyTom Rini
- Remove includes we don't need - Switch some printf statements to puts - Convert some printf statements to debug, introduce new puts statements - In most cases saying just "No mkimage signature, assuming u-boot.bin" or similar is sufficient. This also means the non-DEBUG case doesn't need printf, in the core of SPL. - The other case here is that PLAIN_VERSION provided what we wanted already, so just use it. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Make spl_mmc.c more genericTom Rini
Move the default omap/related-centric board_mmc_init to arch/arm/cpu/armv7/omap-common/boot-common.c and move the type defines to <asm/spl.h>. Also use mmc->read_bl_len rather than MMCSD_SECTOR_SIZE Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h>Tom Rini
Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Only call mem_malloc_init if configuredTom Rini
We can only attempt to setup a malloc pool if CONFIG_SYS_SPL_MALLOC_START is defined, and not all boards require it. Make the call depend on the define. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Remove NAND_MODE_HW_ECC from spl_nand.cTom Rini
This detection code doesn't (and can't) do anything currently, so remove. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Rename omap_boot_mode to spl_boot_mode()Tom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Rename omap_boot_device to spl_boot_deviceTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27omap-common: SPL: Fix whitespace in omap-common/u-boot-spl.lds.Pavel Machek
Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27omap-common: Fix typo in save_boot_params() in lowlevel_init.STom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()Tom Rini
Only omap4/5 currently have a meaningful set of display text and overo had been adding a function to display nothing. Change how this works to be opt-in and only turned on for omap4/5 now. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27spl_mmc: Make FAT checks / calls guarded with CONFIG_SPL_FAT_SUPPORTTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-25ARM: arm1176: Define arch_cpu_init() at the SoC levelStephen Warren
Commit 86c6326 "ARM: arm1176: enable instruction cache in arch_cpu_init()" defined arch_cpu_init() in a file that is shared across all arm1176 SoCs. tnetv107x already implemented this function, which caused linking to break. Move the new conflicting arch_cpu_init() into arm1176/bcm2835/init.c so that it doesn't conflict; grep indicates this function is usually defined at the SoC-level, not the CPU-level, at least for ARM. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Marek Vasut <marex@denx.de>
2012-09-24dm: net: Move IXP NPE to drivers/net/Marek Vasut
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Bryan Hundven <bryanhundven@gmail.com> Cc: Michael Schwingen <rincewind@discworld.dascon.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com>
2012-09-21Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD
2012-09-10Tegra: Change Tegra20 to Tegra in common code, prep for T30Tom Warren
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate. Convert tegra20_ source file and function names to tegra_, also. Upcoming Tegra30 port will use common code/defines/names where possible. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2012-09-10tegra20: usb: rework set_host_modeLucas Stach
This allows for two things: - VBus GPIO may be used on other ports than the OTG one - VBus GPIO may be low active if specified by DT Signed-off-by: Lucas Stach <dev@lynxeye.de> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Tom Warren <TWarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-10MX: set a common place to share code for Freescale i.MXStefano Babic
Up now only MX5 and MX6 can share code, because they have a common source directory in cpu/armv7. Other not armv7 i.MX can profit of the same shared code. Move these files into a directory accessible for all, similar to plat-mxc in linux. Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-07tegra: Add NAND support to funcmuxSimon Glass
Add selection of NAND flash pins to the funcmux. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-06mx31: Define default SoC input clock frequenciesBenoît Thébaudeau
Define default SoC input clock frequencies for i.MX31 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Helmut Raiger <helmut.raiger@hale.at>
2012-09-06Fix mx31_decode_pllBenoît Thébaudeau
The MFN bit-field of the PLL registers represents a signed value. See the reference manual. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
2012-09-06mx35 timer: Switch to 32-kHz sourceBenoît Thébaudeau
Switch the mx35 timer driver to the 32-kHz clock source to avoid calling mxc_get_clock() again and again, and to be consistent with the timer drivers of other i.MX SoCs. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-06mx35: Define default SoC input clock frequenciesBenoît Thébaudeau
Define default SoC input clock frequencies for i.MX35 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-06mx25: Define default SoC input clock frequenciesBenoît Thébaudeau
Define default SoC input clock frequencies for i.MX25 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Matthias Weisser <weisserm@arcor.de>
2012-09-06mx35: Fix clock dividersBenoît Thébaudeau
The clock dividers that were used do not match at all the reference manual. They were either completely broken, or came from an early silicon revision incompatible with the current one. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
2012-09-06mx35: Fix decode_pllBenoît Thébaudeau
The MFN bit-field of the PLL registers represents a signed value. See the reference manual. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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