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This commit enables the support for K&P's HSC|DDC imx53 based boards.
It was also necessary to provide device tree description for regulators
to avoid board specific code definition.
The GPIO pin description responsible for VBUS control has been moved from
"hog" group to usbh1 dedicated one.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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In this commit the esdhc3 controller is enabled as well as it is remaped
to mmc0 to not break legacy code.
The pinctrl setup (e.g. 0x1e4) is the same as one from in-board file
definition.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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After the commit: "eth: dm: fec: Add gpio phy reset binding"
SHA1: efd0b791069af93e9d439a70d1fe2ae8994dbbfa
The FEC ETH driver switched to PHY GPIO reset performed with data defined
in DTS.
For the HSC|DDC boards the GPIO reset signal is active low and hence the
wrong DTS description must be changed (otherwise the reset for ETH is not
properly setup).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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This code provides information if the K+P's imx53 boards had KEY1
pressed.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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This patch prevents from the situation where we may end up with garbage
displayed on the LCD panel.
Such situation occurs when one performs "reboot -f" in Linux and then
stop in U-boot (or observe the garbage on the screen during boot up).
To prevent from such situation - the PWM pin is configured as GPIO and set
to LOW.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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This commit adds support for DDC and HSC boards from
K+P in u-boot.
Console output:
U-Boot 2018.05-rc2-00090-g752b7ed6f9 (Apr 26 2018 - 14:24:24 +0200)
CPU: Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: WDOG
Model: K+P iMX53
DRAM: 512 MiB
MMC: FSL_SDHC: 0
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Module EEPROM:
ID: TQMa53-CB.0401
SN: 63152762
MAC: 00:0b:64:03:14:2a
BBoard:40x0 Rev:10
Net: eth0: ethernet@63fec000
Hit any key to stop autoboot: 0
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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