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path: root/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
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2020-06-07roc-rk3399-pc: Add SPI bootJagan Teki
U-Boot TPL 2020.07-rc3-00090-gd4e919f927-dirty (Jun 01 2020 - 23:45:53) Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) Trying to boot from MMC1 NOTICE: BL31: v2.2(release): NOTICE: BL31: Built : 15:05:37, May 12 2020 U-Boot 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) SoC: Rockchip rk3399 Reset cause: POR Model: Firefly ROC-RK3399-PC Board DRAM: 3.9 GiB PMIC: RK808 MMC: mmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from SPI Flash... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Model: Firefly ROC-RK3399-PC Board Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-01arm64: dts: rk3399: Sync v5.7-rc1 from LinuxJagan Teki
Sync rk3399 dts(i) files from v5.7-rc1 linux-next. Reason: To get updated PCIe nodes and properties on respective dts(i) files. Summary: - sync won't include new board dts(i) - sync will add required files used on respective dts(i) - rk3399-puma-u-boot.dtsi spiflash label changed to norflash - move puma.dtsi bios_enable into rk3399-puma-u-boot.dtsi - move legacy max-frequency of sdhci into rk3399-u-boot.dtsi - update cross-ec-[keyboard|sbs].dtsi path as per U-Boot - keep roc-rk3399-pc dc_12v changes to -u-boot.dtsi Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28arm: dts: rockchip: rk3399-roc-pc: Enable FE1.1 USB 2.0 HUB on roc-rk3399-pcSuniel Mahesh
roc-rk3399-pc has an FE1.1 USB 2.0 HUB which connects two USB ports (HOST1 and HOST2). For end devices to work we need to enable USB hub so that HOST detects there presence and enumerates them accordingly. This requires explicit pinctrl within gpio enablement. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30roc-pc-rk3399: Enable SPI FlashJagan Teki
Enable winbond SPI flash for ROC-PC-RK3399 board. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-19rockchip: rk3399: Add ROC-RK3399-PC supportLevin Du
Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>