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path: root/arch/arm/dts/socfpga_cyclone5_socdk.dts
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2017-04-14ARM: socfpga: cyclone5-socdk: Enable ports A & CGeorges Savoundararadj
With the port C enabled, we can read the GPI input state of: * the DIP switches (USER_DIPSW_HPS[3:0]/HPS_GPI[7:4]) * the push buttons (USER_PB_HPS[3:0]/HPS_GPI[11:8]) Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Signed-off by: Sid-Ali Teir <git.syedelec@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Marek Vasut <marex@denx.de>
2016-04-20arm: socfpga: Fix typos in DT files (environmnet -> environment)Stefan Roese
Fix a small typo in some of the SoCFPGA dts files that has spread via copy-and-paste. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-02-24arm: socfpga: cv_socdk: Add support for QSPI bootMarek Vasut
Add missing DT nodes to allow booting from QSPI NOR. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> Cc: Denis Bakhvalov <denis.bakhvalov@nokia.com>
2015-12-22arm: socfpga: Make /soc available in pre-relocMarek Vasut
This node must be available before relocation, otherwise the board will not find mmc and will thus not boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-12-20arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
2015-11-05arm: dts: socfpga: Increase the spi-max-frequency for QSPI flashChin Liang See
With a working QSPI calibration, the SCLK can now run up to 100MHz Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-17arm: dts: socfpga: add "u-boot,dm-pre-reloc" to socfpga_cyclone5_socdk dtsDinh Nguyen
We need "u-boot,dm-pre-reloc" in the socfpga_cyclone5_socdk.dts file in order for the SPL to use SD/MMC. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08arm: dts: socfpga: Fix SPI aliasesMarek Vasut
The SPI aliases are completely wrong. First, they point to non-existing /spi@.* nodes instead of the correct /soc/spi@.* nodes. Second, the use ad-hoc string instead of a handle. Furthermore, they are copied multiple times in each board DTS. So fix it such that we move these into socfpga.dtsi and make them use the usual handles. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-04-24socfpga: implement socdk SPI flash config in dtsPavel Machek
SocDK has same QSPI and SPI flash configuration as Socrates. Add support for it. Signed-off-by: Pavel Machek <pavel@denx.de>
2015-03-04dt: socfpga: Import and enable Cyclone V DK DTSMarek Vasut
Import DTS for Cyclone V development kit and enable support for DT. The DT is imported from Linux 3.19-rc1 as of commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>