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path: root/arch/arm/dts/tegra30-beaver.dts
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2018-07-26tegra: beaver/apalis: Fix DTC warningTom Warren
Fix warning when compiling tegra30-beaver/-apalis.dts with latest DTC: "Warning (avoid_unnecessary_addr_size): /pci/pch@1f,0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property" Signed-off-by: Tom Warren <twarren@nvidia.com>
2017-07-11tegra: fdt: Ensure that the console UART is enabledSimon Glass
Many tegra boards have the console UART node disabled. With livetree this prevents serial from working since it does not 'force' the console to be bound. Updates the affected boards to fix this error. The boards were checked with: for b in $(grep tegra boards.cfg |grep -v integrator | \ awk '{print $7}' | sort); do echo $b; fdtgrep -c nvidia,tegra20-uart b/$b/u-boot.dtb |grep okay; done Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1
2016-09-27ARM: tegra: pull Tegra30 SoC DT from Linux v4.7Stephen Warren
The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Modification of PCIe memory region addresses. The HW memory layout is programmable, so this should work fine, and Beaver PCIe was tested without issue. * Removal of pcie_xclk from the PCIe node and clock binding header. This clock doesn't exist and isn't used; only a reset with this ID exists. * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Changed the phy_type value for the second USB port. This required board DTs to be updated to keep the same configuration. * Boards need to define the clk32k_in clock that feeds the Tegra PMC. * Addition of tegra30-mc.h since tegra30.dtsi now includes it. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot. * Node sort order fixes. Remaining deltas relative to the Linux DT: * None. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27mmc: tegra: use correct alias for SDHCI/MMC nodesStephen Warren
The Tegra MMC driver currently honors "sdhci" entries in /aliases. The MMC core however uses "mmc" entries in /aliases. This difference will be relevant once the Tegra MMC driver is converted to DM, and the MMC core handles alias lookups. To avoid issues during that conversion, fix the Tegra MMC driver and all Tegra DTs to use the same alias name as the MMC core does. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27ARM: tegra: fdt: Add 'non-removable' property to all eMMC nodesTom Warren
During debug of the DM_MMC changes to the Tegra MMC driver, I noticed that the 'removable' property wasn't being set correctly for the eMMC parts on most Tegra boards. Since the kernel DTS has this property set correctly, it should be in U-Boot's Tegra DT too. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-01-29dm: tegra: dts: Use TEGRA_GPIO() macro for all GPIOsSimon Glass
This new method is much easier and matches the kernel. Signed-off-by: Simon Glass <sjg@chromium.org>
2014-12-18ARM: tegra: Enable PCIe on BeaverThierry Reding
The Beaver has an ethernet NIC connected to the PCIe bus. Enable the PCIe controller and the network device driver so that the device can boot over the network. In addition the board has a mini-PCIe expansion slot. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-10-22dm: tegra: dts: Add aliases for spi on tegra30 boardsSimon Glass
All boards with a SPI interface have a suitable spi alias except the tegra30 boards. Add these missing aliases. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-09-10tegra: dts: Add serial port detailsSimon Glass
Some Tegra device tree files do not include information about the serial ports. Add this and also add information about the input clock speed. The console alias needs to be set up to indicate which port is used for the console. Also add a binding file since this is missing. Series-changes; 5 - Add full serial port nodes from Linux tree (commit fc9d4dbe) - Use /chosen/stdout-path instead of /aliases/console to specify the console Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-05ARM: tegra: enable USB device mode and UMS on some boardsStephen Warren
For each of Jetson TK1, Venice2, and Beaver: - Enable the first USB controller in DT, and describe its configuration. - Enable USB device/gadget support. This allows the user to type e.g. "ums 0 mmc 0" at the command-line to cause U-Boot to act a USB device implementing the USB Mass Storage protocol, and expose MMC device 0 that way. This allows a host PC to mount the Tegra device's MMC, partition it, and install a filesystem on it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-19dts: move device tree sources to arch/$(ARCH)/dts/Masahiro Yamada
Unlike Linux Kernel, U-Boot historically had *.dts files under board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/. I think arch/$(ARCH)/dts dicretory is a better location to store both *.dts and *.dtsi files. For example, before this commit, board/xilinx/dts directory had both Microblaze dts (microblaze-generic.dts) and ARM dts (zynq-*.dts), which are totally unrelated. This commit moves *.dts to arch/$(ARCH)/dts/ directories, allowing us to describe nicely mutiple DTBs generation in the next commit. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>