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path: root/arch/arm/dts/zynq-cc108.dts
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2018-04-09arm: zynq: Sync up licenses with mainline kernelMichal Simek
Use different location for SPDX line. Also update dates for new mainline DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm: zynq: Remove 0x prefixes from cc108Michal Simek
The patch fixing issues reported by DTC: zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0x400000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0x800000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xc00000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xd00000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xf00000 unit name should not have leading "0x" Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30arm: zynq: Mark cc108 uart to be initialized before relocationMichal Simek
The same change is done for others zynq boards to get uart as early as possible. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm: zynq: Add board support for cc108Michal Simek
cc108 board is wiring uart via PL which is good platform for SPL fpga support. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>