summaryrefslogtreecommitdiff
path: root/arch/arm/dts
AgeCommit message (Collapse)Author
2020-03-31Merge branch 'next' of git://git.denx.de/u-boot-usb into nextTom Rini
2020-03-26rv1108: Fix boot regressionOtavio Salvador
Since commit 79030a486128 ("rockchip: Add Single boot image (with binman, pad_cat)") the following boot regression is seen: U-Boot 2020.04-rc3-00050-gd16e18ca6c-dirty (Mar 09 2020 - 11:40:07 -0300) Model: Elgin RV1108 R1 board DRAM: 128 MiB initcall sequence 67fd12a0 failed at call 6000b927 (err=-22) This happens because the above commit missed to include the "rockchip-u-boot.dtsi" for rv1108, so include this file like it done for other Rockchip SoC dtsi's. Fixes: 79030a486128 ("rockchip: Add Single boot image (with binman, pad_cat)") Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-03-26ARM: dts: Activate pullups in the console pins on rv1108-elgin-r1Otavio Salvador
In order to make the console pins more robust to noise, activate the pullups and increase its drive strength. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-03-24ram: stm32mp1: the property st, phy-cal becomes optionalPatrick Delaunay
This parameter "st,phy-cal" becomes optional and when it is absent the built-in PHY calibration is done. It is the case in the helper dtsi file "stm32mp15-ddr.dtsi" except if DDR_PHY_CAL_SKIP is defined. This patch also impact the ddr interactive mode - the registers of the param 'phy.cal' are initialized to 0 when "st,phy-cal" is not present in device tree (default behavior when DDR_PHY_CAL_SKIP is not activated) - the info 'cal' field can be use to change the calibration behavior - cal=1 => use param phy.cal to initialize the PHY, built-in training is skipped - cal=0 => param phy.cal is absent, built-in training is used (default) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24ARM: dts: stm32mp1: DT alignment with Linux 5.6-rc1Patrick Delaunay
This commit manages diversity for STM32M15x SOCs with: - dedicated files to support all STM32MP15 SOCs family. The differences between those SOCs are: -STM32MP151 [1]: common file. -STM32MP153 [2]: STM32MP151 + CANs + a second CortexA7-CPU. -STM32MP157 [3]: STM32MP153 + DSI + GPU. - new files to manage security diversity on STM32MP15x SOCs. On STM32MP15xY, "Y" gives information: -Y = A means no cryp IP and no secure boot. -Y = C means cryp IP + secure boot. - stm32mp157 pinctrl files to better manage package diversity. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-17Merge tag 'ti-v2020.07-next' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next K3 J721E: * OSPI boot support * Support for loading remote cores in R5 SPL * PMIC ESM Support * Minor fixes for R5F and C7x remoteproc drivers K3 AM654: * Update AVS class 0 voltages. * Add I2C nodes DRA7xx/AM57xx: * Fixed Android boot on AM57xx AM33/AM43/Davinci: * switch to driver model for the net and mdio driver for baltos * Add DM/DTS support for omap video driver * Enable fastboot on am335x-evm
2020-03-10Merge tag 'mmc-2020-3-9' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini
- DM support for CAxxxx SoCs - eMMC board for presidio-asic - Add defer probe for mmc sdhci - TI SoCs mmc misc update
2020-03-10arm: dts: imx8mq-evk: add phy-reset-gpios for fec1Alifer Moraes
Instead of resetting the ethernet phy through functions in imx8mq_evk.c, let the driver reset the phy via dts description adding a reset duration of 10 ms following atheros 8031's datasheet recommendation. Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-03-09ARM: dts: imx8mm-verdin: drop rgmii_rxc_dly/txc_dlyMax Krummenacher
The FEC in the i.MX8MM doesn't support this feature. So don't pretend one can use it. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-03-09ARM: dts: imx8mm-verdin: dm-spl for pinctrl_usdhc1 nodeIgor Opaniuk
Let pinctrl configuration for eMMC node (usdhc1) also be accessible in SPL. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-03-09imx: mx6ul_14x14_evk: configure for 24bpp displayAnatolij Gustschin
Before DM_VIDEO conversion this board used 24bpp display configuration, so use it again. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09ARM: dts: imx6sx-sdb: Sync with kernel 5.4.16Fabio Estevam
Sync the imx6sx-sdb dts files with kernel 5.4.16. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09ARM: dts: imx6sx: Sync with kernel 5.4.16Fabio Estevam
Sync the imx6sx dts files with kernel 5.4.16. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09arm: dts: k3-j721e-r5-common-proc-board: Use unique names for dummy clocksFaiz Abbas
Update the dummy clock names to use unique identifiers. Otherwise the previous node just gets overwitten by the next one with the same name. This fixes eMMC boot not working on J721e-evm. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-03-09mmc: am654_sdhci: Update output tap delay writesFaiz Abbas
With the latest RIOT, there is a different otap delay value for each speed mode. Add a new binding with every supported speed mode. Also disable a given speed mode in the host caps if its corresponding otap-del-sel is not present. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-06arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash nodeKeerthy
Add ospi1 flash node required for QSPI boot. Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ↵Keerthy
ospi1/qspi Add assigned-clocks/rates properties for ospi1/qspi. This is the expected rate as per ROM configuration. Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06arm: dts: k3-j721e: Enable ospi1/qspiKeerthy
Enable the ospi1/qspi for both r5 and a72 configurations. Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-04Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- ABB SECU board - Assorted minor fixes
2020-03-03ARM: socfpga: Add initial support for the ABB SECU boardHolger Brunck
Add initial support for the ABB SECU board, which is an ArriaV-based SoCFPGA system with ethernet and booting from Denali NAND. Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-03-03arm: dts: k3-am654-base-board: Enable I2C nodesVignesh Raghavendra
Add DT nodes for main domain I2Cs and its slave devices Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03arm: dts: am335x: add 'u-boot, dm-pre-reloc' to panelDario Binacchi
Add the "u-boot,dm-pre-reloc" property to the "ti,tilcdc,panel" compatible node. In this way the video-uclass module can allocate the amount of memory needed to be assigned to the frame buffer. For boards that support Linux the property is added to the *-u-boot.dtsi file since it is a u-boot specific dt flag. Ran building tests with CONFIG_AM335X_LCD enabled and disabled for the following configurations: - brxre1_defconfig --> success - am335x_guardian_defconfig --> success - am335x_evm_defconfig --> success - da850evm_defconfig --> failure with CONFIG_AM335X_LCD enabled Enabling CONFIG_AM335X_LCD in da850evm_defconfig causes building errors even without applying the patch. The driver has never been enabled on the da850 and must be adapted for this platform. Signed-off-by: Dario Binacchi <dariobin@libero.it> Tested-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Felix Brack <fb@ltec.ch>
2020-03-03arm: dts: k3-j721e: Add ESM PMIC support for tps659413 based boardTero Kristo
The ESM handling on J7 processor board requires routing the MCU_SAFETY_ERROR signal to the PMIC on the board for critical safety error handling. The PMIC itself should then reset the board based on receiving it. Enable the support for the board by adding the esm node in place. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03arm: dts: k3-k721e: Add Main domain ESM supportTero Kristo
Main domain ESM support is needed to configure main domain watchdogs to generate ESM pin events by default. On J7 processor board these propagate to the PMIC to generate a reset when watchdog expires. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03arm: dts: k3-j721e-r5: Enable r5fss0 cluster in SPLKeerthy
Enable MAIN domain r5fss0 cluster and its core0 in R5 spl. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03arm: dts: k3-j721e-r5-u-boot: Add fs_loader nodeKeerthy
Add fs_loader node which will be needed for loading firmwares from the boot media/filesystem. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03ARM: dts: k3-j721e: Add OSPI DT nodesVignesh Raghavendra
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support OSPI boot. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03ARM: dts: k3-am65: Add OSPI DT nodesVignesh Raghavendra
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support OSPI boot. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-02-29ARM: dts: uniphier: remove U-Boot own EEPROM compatible and propertyMasahiro Yamada
The compatible string "i2c-eeprom" is U-Boot own compatible, which has never been approved by the DT community. "u-boot,i2c-offset-len" is also a U-Boot own hack. Linux adds "atmel,*" as generic compatibles, and U-Boot also followed it by commit d7e28918aa3f ("i2c_eeprom: Add reading support"). The U-Boot own hack is no longer needed. Just sync with Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29ARM: dts: uniphier: add reset-names to NAND controller nodeMasahiro Yamada
Import Linux commits: 37f3e0096f71 ("ARM: dts: uniphier: add reset-names to NAND controller node") e98d5023fe1f ("arm64: dts: uniphier: add reset-names to NAND controller node") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29ARM: dts: uniphier: rename DT nodes to follow json-schemaMasahiro Yamada
Import the nodename changes I made in Linux for avoiding dt-schama warnings. This follows the $nodename patterns in the dt-schema. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19ARM: dts: rockchip: Sync rk3288-vyasa dts from linuxJagan Teki
Sync rk3288-vyasa dts file from Linux. This sync has changes required to work HDMI output on Vyasa RK3288 board. This sync excludes the io_domains node since it is not available in rk3288.dtsi. Changes like vcc50_hdmi, vdd10_lcd and ddc-i2c-bus are not merged to Linux yet but wil resync later if any further updates on this. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19rockchip: px30: sync the main px30 dtsi from mainlineHeiko Stuebner
There have been multiple peripherals added to the main px30 dtsi in the Linux kernel since its addition to u-boot. So to make it easier to sync board devicetrees, update the core dtsi from Linux. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19arm: dts: rockchip: puma: move U-Boot specific bits to u-boot.dtsiPeter Robinson
Move the U-Boot specific bits to a -u-boot.dtsi include so all the u-boot.dtsi hierarchy is included. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19arm: dts: rockchip: rk3399: Move U-Boot specific bits to rk3399-u-bootPeter Robinson
There's some bits in the U-Boot rk3399.dtsi that aren't yet in the upstream Linux dtsi but are needed for early boot. This moves them to the u-boot.dtsi to make it easier to sync the rest of rk3399.dtsi with upstream. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19arm: dts: rockchip: Update EVB/Puma devices to upstream USB/dwc3 conventionsPeter Robinson
The upstream linux kernel for the Rockchip 3399 SoC use usbdrd3 naming so move the two remaining devices over to that for their device trees to make it easier to sync with upstream DTs. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-14Merge tag 'u-boot-stm32-20200214' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - add DH Electronics DHCOM SoM and PDK2 board - DT alignment with kernel v5.5-rc7 for stm32mp1 boards - fix STM32 image format for big endian hosts in mkimage - solve warnings in device tree and code for stm32mp1 boards - remove fdt_high and initrd_high for stm32 and stih boards - add support of STM32MP15x Rev.Z - update stm32mp1 readme
2020-02-13ARM: dts: stm32m1: add reg for pll nodesPatrick Delaunay
Fix the following DT dtc warnings for stm32mp1 boards: Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@0: node has a unit name, but no reg property Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@1: node has a unit name, but no reg property Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@2: node has a unit name, but no reg property Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@3: node has a unit name, but no reg property Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13ARM: dts: stm32mp1: correct ddr nodePatrick Delaunay
This patch fix the warning: dt.dts: Warning (simple_bus_reg): Node /soc/ddr@5A003000 simple-bus unit address format error, expected "5a003000" Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13ARM: dts: stm32mp1: move FDCAN to PLL4_RAntonio Borneo
LTDC modifies the clock frequency to adapt it to the display. Such frequency change is not detected by the FDCAN driver that instead cache the value at probe and pretend to use it later. Keep the LTDC alone on PLL4_Q by moving the FDCAN to PLL4_R. Signed-off-by: Antonio Borneo <antonio.borneo@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13ARM: dts: stm32mp1: DT alignment with kernel v5.5-rc7Patrick Delaunay
Device tree and binding alignment with kernel v5.5-rc7 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13stm32mp1: pwr: use the last binding for pwrPatrick Delaunay
Update the driver to use the latest binding from kernel v5.5-rc1: no more use syscon or regmap to access to pwr register and only one pwr_regulators node with the compatibility "st,stm32mp1,pwr-reg" is available. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13ARM: dts: stm32mp1: DT alignment with kernel v5.4Patrick Delaunay
Device tree and binding alignment with kernel v5.4 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13arm: dts: k3-j721e-r5-common-proc-board: Disable power-domains for mcu uartLokesh Vutla
mcu uart will be used during uart boot for loading sysfw.itb. Since sysfw is not yet available during uart load, power-domain cannot be enabled. We need to rely on ROM for doing that, so disable power-domains and clocks for mcu uart. Also fix the mcu uart frequency. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-13arm: dts: am437x-gp-evm: Add some nodes to u-boot.dtsiFaiz Abbas
Add scm_conf syscon node and its parents as well as the ethernet phy node to u-boot.dtsi. This enables ethernet boot. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-12ARM: dts: stm32: Add DH Electronics DHCOM SoM and PDK2 boardMarek Vasut
Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier board. This is an SoM with STM32MP15xx and an evaluation kit. The baseboard provides Ethernet, UART, USB, CAN and optional display. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-02-09board: ge: bx50v3: override panelIan Ray
Override the panel compatible string for LCD in U-Boot. Include U-Boot device tree overrides in device-specific device trees so that the panel compatible string is used. Fixes: 8c26739859c6 ("board: ge: bx50v3: sync devicetrees from Linux") Signed-off-by: Ian Ray <ian.ray@ge.com>
2020-02-09board: ge: mx53ppd: enable DM_VIDEOIan Ray
Enable DM_VIDEO for mx53ppd. Enable DM_REGULATOR_FIXED and DM_PWM for the backlight. Remove unused MX53PPD_LCD_POWER. Remove old (incorrect) setup_iomux_lcd. Enable backlight via display enable handler. Use cls command to initiate display in HW agnostic manner. Modify `failbootcmd' to use lcdputs. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-02-09board: ge: mx53ppd: add i2c eeprom bootcount storageRobert Beckett
Add bootcount node, linking to i2c eeprom "bootcount" partitions for storage. Enable i2c eeprom bootcount backend storage. Enable bootcount command and use it for failbootcmd. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-02-09board: ge: bx50v3: add i2c eeprom bootcount storageRobert Beckett
Add bootcount node, linking to i2c eeprom "bootcount" partitions for storage. Enable i2c eeprom bootcount backend storage. Enable bootcount command and use it for failbootcmd. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>