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2018-09-04imx: imx6sx-sabreauto: convert to use DM QSPI driverYe Li
To support DM QSPI driver: - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string to "spi-flash" and add "num-cs" property. - Enable DM SPI and DM SPI FLASH configurations - Remove iomux settings of qspi1 in board codes which is not needed for DM driver. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04imx: imx6sx-sdb: Enable DM QSPI driverYe Li
To support DM QSPI driver - Add spi0 and spi1 alias for qspi1 and qspi2. - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string to "spi-flash" and add "num-cs" property. - Enable DM SPI/QSPI relavent configurations - Remove iomux settings of qspi2 in board codes which is not needed for DM driver. - Add sf default settings. So running "sf probe" can detect the flash Signed-off-by: Ye Li <ye.li@nxp.com>
2018-08-29rockchip: dts: fix unnecessary '-cells' warningKever Yang
Fix warning below: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-08-24ARM: dts: socfpga: Add missing NAND resetMarek Vasut
The NAND reset is missing from DT, so the reset manager cannot unreset the NAND. Add the missing DT reset entry. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24ARM: dts: socfpga: Drop ad-hoc UART clock frequency encoding from DTMarek Vasut
The UART clock frequency can be obtained from the clock framework by the ns16550 driver, so drop this redundant DT node. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24ARM: dts: socfpga: Flag timer clock as pre-relocMarek Vasut
Flag timer clock as DM pre-reloc, so that a timer driver can be used and it can extract information about it's clock rate using the clock framework. This patch also moves some of the pre-reloc flags into the core dtsi file, this is because the timer is not board specific, but rather is used on all boards. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-21arm: tegra: Restore host1x/dc dm-pre-reloc propertiesNicolas Chauvet
Since commit f2faffecb016, tegra: Convert to use binman the dm-pre-reloc properties are removed. This leads U-Boot not to enable the display on paz00 This patch restore the dm-pre-reloc properties allowing the bootloader to output to the display panel v4: - Spell project name as appropriate v3: - Fix few typos v2: - Add more characters to commit hash Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-08-20Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-08-17Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2018-08-13ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodesMarek Vasut
Add the pre-reloc DT markers to clock nodes needed in SPL and early U-Boot stages. This is required to let the Arria10 clock driver start early and provide clock information for UART and SDMMC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Add i2c alias to A10 SoCDKMarek Vasut
The A10 SoCDK is missing the I2C bus alias, so DM I2C cannot assign the I2C bus a bus number. Add the missing alias. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Add missing I2C resetsMarek Vasut
The I2Cx resets are missing from DT, so the reset manager cannot control them. Add the missing DT reset entries. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Fix Arria10 GMAC resetsMarek Vasut
Add the GMAC0,1 OCP resets, which must also be ungated for those GMACs to work and add GMAC2 reset and OCP resets which were missing altogether. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Add missing UART resetsMarek Vasut
The UART0 and UART1 resets are missing from DT, so the reset manager cannot control them. Add the missing DT reset entries. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Flag reset manager on A10 as pre-relocMarek Vasut
The Altera reset manager block must be available very early on, since it controls ie. UART resets. Flag it as pre-reloc. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13arm: socfpga: fix device trees to work with DM serialSimon Goldschmidt
Device trees need to have the serial console device available before relocation and require a stdout-path in chosen at least for SPL to have a console. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13ARM: dts: stm32f4: Fix DT dtc warningsPatrick Delaunay
This patch fix the following warnings for for stm32f429 evaluation and discovery boards: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13ARM: dts: stm32mp157: Add ADC DT nodePatrice Chotard
Add ADC device tree node. This allows to get analog conversions on stm32mp157. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13ARM: dts: stm32: remove cd-inverted for stm32f746-discoPatrice Chotard
As cd-inverted property is no more used by arm_pl180_mmci driver, remove it. Update cd-gpios active level accordingly. Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13ARM: dts: stm32: remove cd-inverted for stm32f769-discoPatrice Chotard
As cd-inverted property is no more used by arm_pl180_mmci driver, remove it. Update cd-gpios active level accordingly. Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13ARM: dts: sun8i: Update R40/V40 dts(i) files from Linux-v4.18-rc3Jagan Teki
Update all R40/V40 devicetree dtsi and dtsi files from Linux-v4.18-rc3 with below commit: R40: commit c36fd5a48bd20820855e3e91a89297eeaa31836e Author: Chen-Yu Tsai <wens@csie.org> Date: Wed May 2 00:12:25 2018 +0800 ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller V40: commit c5f0bb472795170ab5c33be12e29ce7465fb31ed Author: Icenowy Zheng <icenowy@aosc.io> Date: Fri Apr 6 22:03:44 2018 +0800 ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # BPI-M2-Ultra, BPI-M2-Berry
2018-08-13ARM: dts: sun8i: Update A83T dts(i) files from Linux-v4.18-rc3Jagan Teki
Update all A83T devicetree dtsi and dtsi files from Linux-v4.18-rc3 with below commit: commit 221cb9fd2ee3042689fe0e6613d0f34eb46a5af6 Author: Mylène Josserand <mylene.josserand@bootlin.com> Date: Fri May 4 21:05:44 2018 +0200 ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC Note: bananapi-m3 and cubietruck-plus board dts files has usb_otg enabled in U-Boot which were not present in Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-10stm32mp1: add gpio led supportPatrick Delaunay
This patch add the 4 LED available on the ED1 board and activated gpio led driver. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-07Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini
2018-08-07Merge tag 'xilinx-for-v2018.09-rc2' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx fixes for v2018.09-rc2 xilinx: - Add support for zybo z7 and ultra96 - Tune zynq and zynqmp mini configurations - Move SYS_MALLOC_LEN to Kconfig fdt - make static funcs gpio: - Fix soft gpio driver - Fix Zynq gpio driver by using platdata microblaze: - Fix Kconfig entry spi - Move ISSI to Kconfig
2018-08-07arm: zynq: dts: add spi flash node to zedboardLuis Araneda
Add a flash node to fix the detection of the memory IC. With the changes introduced with commit 8fee8845e754 ("enf_sf: reuse setup_flash_device instead of open coding it") the SPI speed is now read from device-tree or a default value is applied. This replaced the old behavior of setting the SPI speed to CONFIG_ENV_SPI_MAX_HZ. As this board didn't have a flash node, the default value was applied to the SPI speed, producing an error when probing the flash memory (speed too slow). Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-07ARM: kirkwood: add SBx81LIFXCAT boardChris Packham
This is a series of line cards for Allied Telesis's SBx8100 chassis switch. The CPU block is common to the SBx81GP24 and SBx81GT24 cards cards collectively referred to as SBx81LIFXCAT in u-boot. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07arm: mvebu: clearfog: add u-boot, dm-spl tag for spiJon Nettleton
This is required so SPL and u-boot can boot from spi flash devices that use the dm drivers. Signed-off-by: Jon Nettleton <jon@solid-run.com> [baruch: use -u-boot.dtsi] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07arm: mvebu: helios4: remove duplicate sdhci pins nodeBaruch Siach
The same pinctrl node appears in the solidrun-microsom dtsi. Use that instead. Cc: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Dennis Gilmore <dennis@ausil.us> Tested-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07arm: mvebu: Better align Clearfog dts file with Linux kernelJon Nettleton
This makes changes so the u-boot dts file is structured more similar to the mainline linux dtsi file. It provides a minimal common dts that can work for most boards based on the ClearFog platform. Ethernet support is only supported for eth0 however all devices are left enabled so u-boot can generate and provide mac addresses for all of the network interfaces. Signed-off-by: Jon Nettleton <jon@solid-run.com> [baruch: rebase on recent changes] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Dennis Gilmore <dennis@ausil.us> Tested-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07arm: mvebu: clearfog: use the microsom .dtsiBaruch Siach
Use hardware description from the recently introduced microsom .dtsi file to reduce duplication. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Dennis Gilmore <dennis@ausil.us> Tested-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07arm: mvebu: solidrun-microsom: update SPI flash compatibleBaruch Siach
Add the "spi-flash" compatible string so that the generic sf_probe driver can probe the SPI flash on the SolidRun SOM. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-06arm64: zynqmp: Add support for Avnet Ultra96Michal Simek
Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files and point to origin internal board name. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06arm: zynq: add support for the zybo z7 boardLuis Araneda
The board is manufactured by Digilent Main features: - Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20) - RAM: 1 GB DDR3L - FLASH: 16 MB QSPI - 1 Gbps Ethernet - USB 2.0 - microSD slot - Pcam camera connector - HDMI Tx and Rx - Audio codec: stereo out, stereo in, mic - 5 (Z7-10) or 6 (Z7-20) Pmod ports - 6 push-buttons, 4 switches, 5 LEDs - 1 (Z7-10) or 2 (Z7-20) RGB LEDs Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06arm: zynq: Fix indentation for zynq-cse targetsMichal Simek
Trivial DT style fixes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06arm: zynq: Remove fclk-enable property for cse-nor targetMichal Simek
Mini cse NOR configuration is running without PL that's why there is no reason to enable clock to PL. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06arm: zynqmp: Fix sdhci clock in emmc1 mini configurationMichal Simek
Add missing clocks property with fix clock-names property to be aligned with emmc0 configuration and binding doc. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06arm: spring: fix alias of mmc correctlyMinkyu Kang
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06arm: exynos5: fix warning of dtsMinkyu Kang
remove this warning: avoid_unnecessary_addr_size Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06arm: exynos4: fix warning of dtsMinkyu Kang
remove this warning: avoid_unnecessary_addr_size Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-04Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-08-03ARM: dts: stm32: remove cd-inverted for stm32429i-evalPatrice Chotard
As cd-inverted property is no more used by arm_pl180_mmci driver, remove it. Update cd-gpios active level accordingly. Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-01binman: Rename 'position' to 'offset'Simon Glass
After some thought, I believe there is an unfortunate naming flaw in binman. Entries have a position and size, but now that we support hierarchical sections it is unclear whether a position should be an absolute position within the image, or a relative position within its parent section. At present 'position' actually means the relative position. This indicates a need for an 'image position' for code that wants to find the location of an entry without having to do calculations back through parents to discover this image position. A better name for the current 'position' or 'pos' is 'offset'. It is not always an absolute position, but it is always an offset from its parent offset. It is unfortunate to rename this concept now, 18 months after binman was introduced. However I believe it is the right thing to do. The impact is mostly limited to binman itself and a few changes to in-tree users to binman: tegra sunxi x86 The change makes old binman definitions (e.g. downstream or out-of-tree) incompatible if they use the 'pos = <...>' property. Later work will adjust binman to generate an error when it is used. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-31board: sun50i: h6: Add OrangePi One Plus initial supportJagan Teki
OrangePi One Plus is Allwinner H6 based open-source SBC, which support: - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 - GPU Mali-T720 - 1GB LPDDR3 RAM - AXP805 PMIC - 1Gbps GMAC via RTL8211 - USB 2.0 Host, OTG - HDMI port - 5V/2A DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-31sunxi: add support for Pine H64 boardIcenowy Zheng
Pine H64 is a SBC with Allwinner H6 SoC produced by Pine64. It features 1GiB/2GiB/4GiB(3GiB usable) DRAM, two USB 2.0 ports, one USB 3.0 port and a mPCIE slot. Add support for it. The device tree is from Linux next-20180720. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31sunxi: add support for Allwinner H6 SoCIcenowy Zheng
Allwinner H6 is a new SoC from Allwinner features USB3 and PCIe interfaces. This patch adds support for it. The corresponding DTSI file, from Linux next-20180720, is also introduced. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-27Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2018-07-26tegra: beaver/apalis: Fix DTC warningTom Warren
Fix warning when compiling tegra30-beaver/-apalis.dts with latest DTC: "Warning (avoid_unnecessary_addr_size): /pci/pch@1f,0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property" Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26armv8: dts: fsl-ls1012a: add sata node supportYuantian Tang
One ls1012a, there is one SATA 3.0 advanced host controller interface which is a high-performance SATA solution that delivers comprehensive and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA capabilities, in accordance with the serial ATA revision 3.0 of Serial ATA International Organization. Add sata node to support this feature. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-25ARM: dts: socfpga: Adjust NAND register layout on Arria10Marek Vasut
Adjust the NAND register size on Arria10 to reflect reality. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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