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Many OMAP3 boards use a TWL4030 PMIC. This brings in the related
device tree information for common TWL4030 and TWL4030 with OMAP3.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
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Add device tree support to allow for CONFIG_OF_CONTROL in OMAP3630 boards.
DM3730 can use this same device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
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Add device tree support to allow for CONFIG_OF_CONTROL in OMAP3 boards.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
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This is needed to probe devices under that bus such as the SATA PHY.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The device tree source files of at91sam9263ek boards are copied from
the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
in board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The device tree source files of at91sam9rlek boards are copied from
the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
in board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The device tree source files of at91sam9g20ek and at91sam9260ek
boards are copied from the Linux v4.10, do the changes below.
- Fix the build error for the usb0 node.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
in board_init_f stage.
- Add the clk pinctrl of the mmc0 node.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The device tree source files of at91sam9m10g45ek boards are copied
from the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The device tree source files of at91sam9n12ek boards are copied from
the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Change the compatible of the spi flash to "spi-flash".
- Add the spi0 aliases.
- Fix the pinctrl-names of mmc0 node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The device tree source files of at91sam9x5ek board are copied from
the Linux v4.10, do the changes below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
- Change the compatible of the spi flash to "spi-flash".
- Add the spi0 aliases.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Add the "u-boot,dm-pre-reloc" property to determine which nodes
which are needed by SPL and by the board_init_f stage.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
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Add clock property for uart1 node.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
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Move existing configuration from header file to defconfig or dts as
appropriate.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
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Align PHY selectors register with Armada-CP-110 functional SPEC
update all relevant device trees with this change.
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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UTMI_PHY_TO_USB_HOST was used in USB3 UTMI dts node only, but there will
be USB2 UTMI dts node for some SoCs that have got USB2 controller, so rename
TO_USB_HOST to TO_USB3_HOST to distinguish TO_USB2_HOST in later on patches.
Signed-off-by: zachary <zhangzg@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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Use correct naming as done in the latest Marvell U-Boot version as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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Add NAND to CP master device tree. Add armada-7040-db-nand
device tree for the board configured with NAND boot device.
Add comment about boot device ID to armada-7040-db DTS.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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Sync the default configuration of Armada-8040-DB with
Marvell u-boot-2015 standard configuration "A" for the same board.
The standard configuration "A" enables 2 PCIe slots on CP0
and 3 PCIe slots on CP1.
This is the main configuration used for u-boot and Linux tests.
This patch also re-arranges the DTS file entries by grouping
all nodes related to CP0 and CP1.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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Enable I2C0 and I2C1 which is needed to enable usage of DM I2C.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Add aliases for I2C nodes required for the DM framework to probe the
davinci-i2c driver.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Add I2C nodes to the 66AK2Gx dtsi.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Remove unnecessary apb and ahb nodes and just override necessary
nodes/values.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.
The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.
The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.
So, the network driver would only need to enable these clocks, no need
to configure the rate.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Add Reset Driver configuration to ast2500 SoC Device Tree and bindings
for various reset signals
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Pull in the Device Tree for ast2500 from the mainline Linux kernel.
The file is copied from
https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This patch is required for correct SPL device tree creation by fdtgrep
as fdtgrep looks for u-boot,dm-pre-reloc property of the node to include
it in the spl device tree.
Not adding it in these subnodes ignores the pin muxing of peripherals
which is almost always in the subnodes.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This board support stm32f7 family device stm32f769-I with 2MB internal Flash &
512KB RAM.
STM32F769 lines offer the performance of the Cortex-M7 core (with double
precision floating point unit) running up to 216 MHz.
To compile for stm32f769 board, use same defconfig as stm32f746-disco,
the only difference is to pass "DEVICE_TREE=stm32f769-disco".
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
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Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
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Actually the sdram memory on stm32f746 discovery board is micron part
MT48LC_4M32_B2B5_6A. This patch does the modification required in the
device tree node & driver for the same.
Also we are passing here all the timing parameters in terms of clock
cycles, so no need to convert time(ns or ms) to cycles.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
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All discovery boards have one user button & one user LED. Here we are
just reading the button status & switching ON the user LED.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
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Also created alias for gpios for stm32f7 discovery board. Based on these
aliases, it would be possible to get gpio devices by sequence.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
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Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
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This patch also removes the sdram/fmc clock enable from board specific
code.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
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Also added DT binding doc for stm32 fmc(flexible memory controller).
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
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Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
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Fixes the following problem:
zynq-uboot> run dfu_ram
Setting bus to 1
g_dnl_register: failed!, error: -19
The cause appears to be that the USB framework is looking for a usbotg aliases,
so add the alias to point to our USB device.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add support for the Terasic DE10-Nano board. The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
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Lichee Pi Zero is a development board with a V3s SoC, which features
64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not
soldered in production batch), a 40-pin RGB LCD connector and some extra
pins available as 2.54mm pins or stamp holes.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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As we have now V3s support in board code, the V3s DTSI file should also
be added.
Add also some CCU include headers to satisfy the DTSI file.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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- Use - instead of @ for OPP tables
- Add input-delay properties to Cadence eMMC nodes
- Restore full license text because code-diff is annoying
- Fix NAND compatible strings
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The Bananapi M2 Ultra is the first publicly available development board
featuring the R40 SoC.
This patch add barebone dtsi/dts files for the R40 and Bananapi M2 Ultra,
as well as a defconfig for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Use CONFIG_ARCH_LS1021A instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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For using mipi display, we need to enable lcd3v3
which supplied by rk808,so enable rk808 first.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
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To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
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The RK3399-Q7 (Puma) DTS should (of course) be dual-licensed.
This updates the licensing info in the rk3399-puma.dts.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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