summaryrefslogtreecommitdiff
path: root/arch/arm/include/asm/arch-am33xx/ddr_defs.h
AgeCommit message (Collapse)Author
2012-10-25am33xx/ddr_defs.h: rename DDR2/DDR3 defines to their actual part numbersPeter Korsgaard
So other parts can be added. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2012-10-25am33xx: support board specific ddr settingsPeter Korsgaard
Move the hardcoded ddr2/ddr3 settings for the ti boards to board code, so other boards can use different types/timings. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com> [trini: Make apply with rtc32k_enable() in the file] Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Add DDR3 (Micron MT41J128M16JT-125) timings and supportTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Correct and clean up ddr_regs structTom Rini
The ddr_regs struct was incorrectly offset after the dt0wiratio0 entry. Correct this by documenting a missing register that will be used at some point in the future (when write leveling is supported). Further, the cmdNcs{force,delay} fields are undocumented and we have been setting them to zero, remove. Next, setting of the 'DATAn_REG_PHY_USE_RANK0_DELAYS field belongs with the rest of the ddr_data entries, so program it there. Finally, comment on how we are configuring the DATA1 registers that correspond to the DATA0 (dt0) registers defined in the struct. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Do not touch 'ratio1' fieldsTom Rini
The various ratio1 fields are not documented in any of the documentation I can find. Removing these and testing has yielded success, so remove the code that sets them and move their locations into the reserved fields. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Rework config_io_ctrl slightlyTom Rini
This function sets a number of related registers to the same value (the registers in question all have the same field descriptions and are related in operation). Rather than defining a struct and setting the value repeatedly, just pass in the value. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Use emif_regs struct for storing initialization valuesTom Rini
Rather than defining our own structs to note what to use when programming the EMIF and related re-use the emif_regs struct. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Turn a number of 'int' functions to 'void'Tom Rini
A number of memory initalization functions were int and always returned 0. Further it's not feasible to be doing error checking here, so simply turn them into void functions. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Document what we're doing with ddrctrl->ddrckectrlTom Rini
- Remove the call to set ddrctrl->ddrioctrl as it's all zeros. - Comment what we're really setting in ddrctrl->ddrckectrl which is that we're operating in the normal mode where EMIF/PHY clock is controlled by the PHY. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am335x: ddr_defs: Update EMIF parametersVaibhav Bedia
EMIF parameters are calculated based on the AC timing parameters from the SDRAM datasheet and the DDR frequency. Current values for these paramters in AM335x U-Boot code, though reliable, are not fully optimal. The most optimal settings can be derived based on the guidelines published at [1]. A pre-computed set of values with the most optimum settings for AM335x EVM and BeagleBone can be found at [2]. [1] http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips [2] http://processors.wiki.ti.com/index.php/OMAP_and_Sitara_CCS_support#AM335x Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Clean up unused DDR defines, prefix more with 'DDR2'Tom Rini
- Remove a handful of unused defines. - Prefix more values with 'DDR2' as DDR3 will require different values. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Pass to config_ddr the type of memory that is connectedTom Rini
We need to pass in the type of memory that is connected to the board. The only reliable way to do this is to know what type of board we are running on (which later will be knowable in s_init()). For now, pass in the value of DDR2. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Make config_cmd_ctrl / config_ddr_data take const structsTom Rini
Rework the EMIF4/DDR code slightly to setup the structs that config_cmd_ctrl and config_ddr_data take to be setup at compile time and mark them as const. This lets us simplify the calling path slightly as well as making it easier to deal with DDR3. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Convert to using <asm/emif.h> to describe the EMIFTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2012-02-27am33xx: ddr_defs.h: Change DDR timingsChase Maupin
* For cold silicon the DDR timings need to be relaxed in order for the device to boot with DDR at 266MHz * Fix proposed by James Doublesin Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
2012-01-16ARM:AM33XX: Fix ddr and timer register offsetChandan Nath
This patch is added to update incorrect ddr and timer register offset. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2011-10-27ARM:AM33XX: Add emif/ddr supportChandan Nath
This patch adds AM33xx emif/ddr support along with board specific defines. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
generated by cgit (git 2.34.1) at 2025-01-08 15:03:03 +0000