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2018-05-11arm64: zynqmp: Setup MMU map for DDR at run timeNitin Jain
This patch fills the MMU map for DDR at run time based on information read from Device Tree or automatically detected from static configuration. The patch is needed because for systems which has for example 1GB of memory but MMU map is 2GB there could be spurious accesses which was seen in past when mapping is not fitting with actual memory installed. Signed-off-by: Nitin Jain <nitin.jain@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-09fpga: zynqmp: Update zynqmp_load() as per latest xilfpgaSiva Durga Prasad Paladugu
Latest xilfpga expects to set BIT5 of flags for nonsecure bitsream and also expects length in bytes instead of words This patch does the same. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-23arm64: zynqmp: Add support for verifying secure imagesSiva Durga Prasad Paladugu
This patch adds new command "zynqmp" to handle zynqmp specific commands like "zynqmp secure". This secure command is used for verifying zynqmp specific secure images. The secure image can either be authenticated or encrypted or both encrypted and authenticated. The secure image is prepared using bootgen and will be in xilinx specific BOOT.BIN format. The optional key can be used for decryption of encrypted image if user key was specified while creation BOOT.BIN. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30arm64: zynqmp: Prepare psu_init reworkMichal Simek
Move generic functions to common location psu_spl_init.c. Function declarations are added to private header. These changes are done in connection to the fact that still files from HDF can be copied over and compilation should pass. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30arm64: zynqmp: Propagate error value from psu_init()Michal Simek
psu_init() returns int which wasn't declared and checked. The patch is fixing function declarations and code to handle return values properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14arm64: zynqmp: Add missing zynq_board_read_rom_ethaddr() prototypeMichal Simek
Add missing zynq_board_read_rom_ethaddr() prototype reported by sparse. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2017-11-28arm64: zynqmp: Add support for CG/EG/EV device detectionMichal Simek
Version string has unused fields 31:20 which can be used for exporting 9 bits from efuse IPDISABLE regs to recognize eg/cg/ev devices. These efuse bits are setup for certain devices. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Remove slcr with mio status pin detectionMichal Simek
This code is not used on this platform and it is not called. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Make chip_id a global routine()Siva Durga Prasad Paladugu
This patch makes chip_id() as a global routine so that it can be used in other places as required. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Modify chip_id routine to get either idcode or versionSiva Durga Prasad Paladugu
This patch modifies the chip_id routine to get either idcode or silicon version based on the argument received. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Define a way to intialize TCMSiva Durga Prasad Paladugu
TCM on ZynqMP needs to be intialized in a sequence and this patch provides a global routine to perform this as per requirement. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20arm64: zynqmp: Check pmufw versionMichal Simek
If PMUFW version is not v0.3 then panic. ZynqMP switch to CCF based clock driver which requires PMUFW to be present at certain version. This patch ensure that you use correct and tested PMUFW binary. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20arm64: zynqmp: Define routines for mmio write and readSiva Durga Prasad Paladugu
Define routines of mmio write and read functionalities for zynqmp platform. Also do not call SMC from SPL because SPL is running before ATF in EL3 that's why SMCs can't be called because there is nothing to call. zynqmp_mmio*() are doing direct read/write accesses and this patch does the same. PMUFW is up and running at this time and there is a way to talk to pmufw via IPI but there is no reason to implement IPI stuff in SPL if we need just simple read for getting clock driver to work. Also make invoke_smc as global so that it can be reused in multile places where ever possible. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-17net: zynq: Add clk framework support to zynq ethernet driverStefan Herbrechtsmeier
If available use the clock framework to set the tx clock rate of the zynq ethernet controller. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10ARM64: zynqmp: Generate handoff structure for ATFMichal Simek
Xilinx ATF extending options for passing images from BL2(FSBL) to BL31. U-Boot SPL is FSBL replacement that's why it should generate handoff structure the same. Support only one entry which is U-Boot in EL2 itself. When FIT image is adopted structure generate should be data driven. Currently ATF is placing this structure at the beggining of OCM which is rewriting early parts of ATF which should be unused at that time. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10net: zynq_gem: Use clock driver for ZynqMPSiva Durga Prasad Paladugu
Enable and use the clock driver routine defined in clock driver toset required clock appropriately. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-05-24ARM64: zynqmp: Add SPL support supportMichal Simek
Support RAM and MMC boot mode in SPL also with SPL_FIT images. In MMC boot mode two boot options are available: 1) Boot flow with ATF(EL3) and full U-Boot(EL2): aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000 -d bl31.bin atf.ub cp spl/boot.bin <sdcard fat partition> cp atf.ub <sdcard fat partition> cp u-boot.bin <sdcard fat partition> 2) Boot flow with full U-Boot(EL3): cp spl/boot.bin <sdcard> cp u-boot*.img <sdcard> 3) emmc boot mode dd if=/dev/zero of=sd.img bs=1024 count=1024 parted sd.img mktable msdos parted sd.img mkpart p fat32 0% 100% kpartx -a sd.img mkfs.vfat /dev/mapper/loop0p1 mount /dev/mapper/loop0p1 /mnt/ cp spl/boot.bin /mnt cp u-boot.img /mnt cp u-boot.bin /mnt cp atf.ub /mnt umount /dev/mapper/loop0p1 kpartx -d sd.img cp sd.img /tftpboot/ and program it via u-boot tftpb 10000 sd.img mmcinfo mmc write 10000 0 $filesize mmc rescan mmc part ls mmc 0 psu_init() function contains low level SoC setup generated for every HW design by Xilinx design tools. xil_io.h is only supporting file to fix all dependencies from tools. The same solution was used on Xilinx Zynq. The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which stays at the same location all the time. Bootrom expects starting address to be at 0xfffc0000 that's why this address is SPL_TEXT_BASE. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-12-07zynq: sdhci: Move driver to DMMichal Simek
Move driver to DM Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-07ARM64: zynqmp: Sync zynq_sdhci_init() declarationMichal Simek
This patch fix compilation error: drivers/mmc/zynq_sdhci.c:16:5: error: conflicting types for ‘zynq_sdhci_init’ int zynq_sdhci_init(phys_addr_t regbase) ^ In file included from drivers/mmc/zynq_sdhci.c:14:0: ./arch/arm/include/asm/arch/sys_proto.h:16:5: note: previous declaration of ‘zynq_sdhci_init’ was here int zynq_sdhci_init(unsigned long regbase); ^ Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28ARM: zynqmp: Wire up ethernet controllersMichal Simek
Wire up ethernet controllers and enable MII and BOOTP options. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28zynqmp: Add support for IP detection via SLCRMichal Simek
SLCR can be used for IP configuration setting. Add SLCR skeleton to enable run time checking. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-03-02arm64: Add Xilinx ZynqMP supportMichal Simek
Add basic Xilinx ZynqMP arm64 support. Serial and SD is supported. It supports emulation platfrom ep108 and QEMU. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>